Number systems
- Place values
- binary 2k, octal 8k, hex 16k
- To decimal
- Σ dk·bk
- From decimal
- divide by the base, read the remainders bottom-up
- Hex ↔ binary
- one hex digit = 4 bits
- Two’s complement
- invert the bits and add 1
Digital Electronics: cram pack
Formula sheets, the key method steps for every topic and 6 practice problems, with full solutions at the back.
1Formulas and methods
Digital logic: gates, K-maps & flip-flops
- Basic gates
- A·B, A + B, A′, (A·B)′, (A + B)′, A ⊕ B
- Boolean rules
- X + X′ = 1, X·X′ = 0, X + XY = X, XY + XY′ = X
- De Morgan
- (X·Y)′ = X′ + Y′, (X + Y)′ = X′·Y′
- Karnaugh map order
- 00, 01, 11, 10 (Gray code)
- Group of 2ᵏ cells
- loses k variables
- 4-to-1 multiplexer
- F = A′B′I0 + A′BI1 + AB′I2 + ABI3
- Flip-flops
- D: Q⁺ = D, T: Q⁺ = T ⊕ Q, JK: Q⁺ = JQ′ + K′Q
- Counters
- n-bit: 2ⁿ states; mod-N: smallest n with 2ⁿ ≥ N; fout = fclk/N
- Ripple counter
- fmax = 1/(n·tpd)
- Ring and Johnson counters
- n and 2n states
Method
- For a circuit, work from the inputs to the output one gate at a time and write the value on every wire, or write its expression and fill in the truth table.
- For simplification, put the 1s (and the don’t-cares as X) into a Karnaugh map with Gray-code rows and columns: 00, 01, 11, 10.
- Cover the 1s with as few and as large groups of 1, 2, 4, 8 or 16 cells as possible, wrapping round the edges; each group is one product term made of the variables that stay constant. Group the 0s for the POS form.
- For flip-flops and counters, read the inputs at each active clock edge, write the state after every edge, and remember that an n-bit counter wraps round after 2ⁿ states.
Data acquisition & sampling
- Nyquist criterion
- fs > 2·fmax, fN = fs/2
- Alias frequency
- fa = |f − k·fs|, k = round(f/fs)
- Step size
- 1 LSB = VFSR/2ᴺ
- Quantisation error (rounding)
- ±½ LSB
- Truncating ADC code
- D = ⌊Vin/LSB⌋
- Bits for a resolution r
- 2ᴺ ≥ span/r
- Ideal SQNR, full-scale sine
- SQNR = 6.02·N + 1.76 dB
- Data rate
- channels × fs × N bit/s
- Multiplexed ADC
- fs = 1/(n·(tc + tset))
- UART
- Tb = 1/baud; 8N1 = 10 bits per byte; bytes/s = baud/bits per frame
- Baud rate divider
- baud = fclk/(16·D)
Method
- Write down what is given: sampling rate, signal frequencies, number of bits, input range, baud rate.
- For sampling questions, compare each frequency with fs/2; a higher frequency appears at fa = |f − k·fs| with the nearest multiple of fs.
- For resolution questions, find 1 LSB = VFSR/2ᴺ, or the smallest N with 2ᴺ ≥ span/resolution.
- For data rates and UART links, count everything that is sent: channels, samples per second, bits or whole bytes per sample, and the start, parity and stop bits of every frame.
2Practice problems
1.Number systemsMedium
The 8-bit pattern 1000 1010 stores a signed integer in two's complement. What is its value N in decimal?
1000 10108 bit
N =
2.Number systemsHard
Set the bits to the 8-bit result of 1000 0100 >> 1. What is the result's value R in decimal?
1000 0100>> 1
R =
3.Digital logic: gates, K-maps & flip-flopsMedium
Simplify F = A′BC′ + BC′ + A′BC + AC to its minimal sum-of-products form. How many literals L does the simplified expression contain?
F = A′BC′ + BC′ + A′BC + AC
L =
4.Digital logic: gates, K-maps & flip-flopsHard
A positive-edge-triggered T flip-flop starts with Q = 0 and receives the inputs shown. Click the first clock edge at which Q goes from 1 back to 0.
Q₀ = 0T
- 1clock edge 1
- 2clock edge 2
- 3clock edge 3
- 4clock edge 4
- 5clock edge 5
- 6clock edge 6
- 7clock edge 7
- 8clock edge 8
5.Data acquisition & samplingMedium
Find the ideal signal-to-quantisation-noise ratio SQNR of an 8-bit ADC for a full-scale sine wave.
N = 8
SQNR = dB
6.Data acquisition & samplingHard
An audio measurement needs an ideal signal-to-quantisation-noise ratio of at least 85 dB for a full-scale sine wave. Find the smallest number of ADC bits N.
SQNR ≥ 85 dB
N =
3Solutions
1.Number systems
Answer: N = −118
Positional number systems: each digit is worth its value times a power of the base. In binary the places are worth 1, 2, 4, 8, 16, …; in hexadecimal 1, 16, 256, …, with A–F standing for 10–15. In 8-bit two's complement the leftmost bit is worth −128 instead of +128, which is how negative numbers are stored.
Add the place values
The other bits keep their normal positive values.
−128 + 8 + 2 = −118
Answer
N = −118
2.Number systems
Answer: R = 66
Setting bits: each bit is worth a power of two (128, 64, …, 1). One hex digit is exactly four bits, and in 8-bit two's complement the leftmost bit is worth −128. Bitwise operations work on each bit position separately.
Bit by bit
Shifting right by 1 moves every bit 1 places to the right; bits that fall off the right end are lost and zeros come in on the left.
1000 0100 >> 1
= 0100 0010
Value of the result
0100 0010₂ = 66
Answer
R = 66
3.Digital logic: gates, K-maps & flip-flops
Answer: L = 3
Boolean algebra: the rules that simplify expressions are X + X′ = 1 and X·X′ = 0, X + X = X, absorption X + X·Y = X, the combining rule X·Y + X·Y′ = X, X + X′Y = X + Y and the consensus theorem XY + X′Z + YZ = XY + X′Z. De Morgan's laws turn (X·Y)′ into X′ + Y′ and (X + Y)′ into X′·Y′. A Karnaugh map applies these rules graphically: every group of two neighbouring cells is one use of XY + XY′ = X.
Minterms of the expression
A′BC′ → m(2)
BC′ → m(2, 6)
A′BC → m(3)
AC → m(5, 7)
Group and read off
F = B + AC
Count the literals
L = 3
Answer
L = 3
4.Digital logic: gates, K-maps & flip-flops
Answer: clock edge 3
Flip-flops and counters: a flip-flop changes only at the active clock edge. D copies its input (Q⁺ = D); T toggles when T = 1; JK holds for 00, resets for 01, sets for 10 and toggles for 11. An n-bit binary counter has 2ⁿ states and counts modulo 2ⁿ; a mod-N counter goes 0, 1, …, N − 1 and back to 0, and needs the smallest n with 2ⁿ ≥ N flip-flops. Each stage of a ripple counter halves the frequency, so the last output of a mod-N counter runs at fclk/N. A Johnson counter of n flip-flops has 2n states, a ring counter n.
Q after every edge
A T flip-flop toggles at each rising edge with T = 1 and holds with T = 0.
1: T = 1 → Q = 1
2: T = 0 → Q = 1
3: T = 1 → Q = 0
4: T = 1 → Q = 1
5: T = 0 → Q = 1
6: T = 1 → Q = 0
7: T = 0 → Q = 0
8: T = 1 → Q = 1
First change from 1 to 0
clock edge 3
Answer
clock edge 3
5.Data acquisition & sampling
Answer: SQNR = 49.92 dB
ADC resolution: an N-bit converter divides its full-scale range VFSR into 2ᴺ codes, from 0 to 2ᴺ − 1. One step is 1 LSB = VFSR/2ᴺ: the smallest change the converter can show. A truncating ADC gives the code ⌊Vin/LSB⌋; a rounding ADC is never more than ½ LSB away from the true value, its quantisation error. Every extra bit halves the LSB and adds about 6 dB to the ideal signal-to-quantisation-noise ratio SQNR = 6.02·N + 1.76 dB for a full-scale sine. To reach a resolution r over a span, choose the smallest N with 2ᴺ ≥ span/r.
Ideal SQNR
SQNR = 6.02·8 + 1.76 = 49.92 dB
Answer
SQNR = 49.92 dB
6.Data acquisition & sampling
Answer: N = 14
ADC resolution: an N-bit converter divides its full-scale range VFSR into 2ᴺ codes, from 0 to 2ᴺ − 1. One step is 1 LSB = VFSR/2ᴺ: the smallest change the converter can show. A truncating ADC gives the code ⌊Vin/LSB⌋; a rounding ADC is never more than ½ LSB away from the true value, its quantisation error. Every extra bit halves the LSB and adds about 6 dB to the ideal signal-to-quantisation-noise ratio SQNR = 6.02·N + 1.76 dB for a full-scale sine. To reach a resolution r over a span, choose the smallest N with 2ᴺ ≥ span/r.
Solve for N
N ≥ (85 − 1.76)/6.02 = 13.83
Round up
N = 14
check: 6.02·14 + 1.76 = 86.04 dB ≥ 85 dB
Answer
N = 14
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