Digital Electronics: cram pack

Formula sheets, the key method steps for every topic and 6 practice problems, with full solutions at the back.

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1Formulas and methods

Number systems

Place values: binary 2^k, octal 8^k, hex 16^k
To decimal: Σ d_k·b^k
From decimal: divide by the base, read the remainders bottom-up
Hex ↔ binary: one hex digit = 4 bits
Two’s complement: invert the bits and add 1

Digital logic: gates, K-maps & flip-flops

Basic gates: A·B, A + B, A′, (A·B)′, (A + B)′, A ⊕ B
Boolean rules: X + X′ = 1, X·X′ = 0, X + XY = X, XY + XY′ = X
De Morgan: (X·Y)′ = X′ + Y′, (X + Y)′ = X′·Y′
Karnaugh map order: 00, 01, 11, 10 (Gray code)
Group of 2ᵏ cells: loses k variables
4-to-1 multiplexer: F = A′B′I₀ + A′BI₁ + AB′I₂ + ABI₃
Flip-flops: D: Q⁺ = D, T: Q⁺ = T ⊕ Q, JK: Q⁺ = JQ′ + K′Q
Counters: n-bit: 2ⁿ states; mod-N: smallest n with 2ⁿ ≥ N; f_out = f_clk/N
Ripple counter: f_max = 1/(n·t_pd)
Ring and Johnson counters: n and 2n states

Method

For a circuit, work from the inputs to the output one gate at a time and write the value on every wire, or write its expression and fill in the truth table.
For simplification, put the 1s (and the don’t-cares as X) into a Karnaugh map with Gray-code rows and columns: 00, 01, 11, 10.
Cover the 1s with as few and as large groups of 1, 2, 4, 8 or 16 cells as possible, wrapping round the edges; each group is one product term made of the variables that stay constant. Group the 0s for the POS form.
For flip-flops and counters, read the inputs at each active clock edge, write the state after every edge, and remember that an n-bit counter wraps round after 2ⁿ states.

Data acquisition & sampling

Nyquist criterion: f_s > 2·f_max, f_N = f_s/2
Alias frequency: f_a = |f − k·f_s|, k = round(f/f_s)
Step size: 1 LSB = V_FSR/2ᴺ
Quantisation error (rounding): ±½ LSB
Truncating ADC code: D = ⌊V_in/LSB⌋
Bits for a resolution r: 2ᴺ ≥ span/r
Ideal SQNR, full-scale sine: SQNR = 6.02·N + 1.76 dB
Data rate: channels × f_s × N bit/s
Multiplexed ADC: f_s = 1/(n·(t_c + t_set))
UART: T_b = 1/baud; 8N1 = 10 bits per byte; bytes/s = baud/bits per frame
Baud rate divider: baud = f_clk/(16·D)

Method

Write down what is given: sampling rate, signal frequencies, number of bits, input range, baud rate.
For sampling questions, compare each frequency with f_s/2; a higher frequency appears at f_a = |f − k·f_s| with the nearest multiple of f_s.
For resolution questions, find 1 LSB = V_FSR/2ᴺ, or the smallest N with 2ᴺ ≥ span/resolution.
For data rates and UART links, count everything that is sent: channels, samples per second, bits or whole bytes per sample, and the start, parity and stop bits of every frame.

2Practice problems

1.Number systemsMedium

Set the bits so they store −40 in 8-bit two's complement. Read as an unsigned number, what is the pattern's value U?

N = −408 bit

U =

2.Number systemsHard

A system must give every one of 3943 items its own binary code of the same length. What is the smallest number of bits b needed?

3943

b = bit

3.Digital logic: gates, K-maps & flip-flopsMedium

Use the Karnaugh map to find the minimal sum-of-products (SOP) form of F(A, B, C, D) = Σm(3, 4, 5, 6, 10, 14, 15). How many product terms N does it have?

F(A, B, C, D) = Σm(3, 4, 5, 6, 10, 14, 15)

N =

4.Digital logic: gates, K-maps & flip-flopsHard

A 4-bit ring counter Q₃Q₂Q₁Q₀ starts at 1100. At every clock edge the bits shift one place to the right (Q₃ → Q₂ → Q₁ → Q₀) and Q₃ receives Q₀. Give the state Q = Q₃Q₂Q₁Q₀ as a decimal number after 11 clock edges.

Q₃Q₂Q₁Q₀ = 110011

Q =

5.Data acquisition & samplingMedium

A recorder samples one channel at 10 kHz with a 10-bit ADC. Each sample is stored in whole bytes. Find the memory M needed for a 2 min recording, in MB (1 MB = 10⁶ bytes).

n = 1f_s = 10 kHzN = 10t = 2 min

M = MB

6.Data acquisition & samplingHard

A 10-bit ADC streams every sample over a UART at 460800 baud, format 8N1 (start bit, 8 data bits, 1 stop bit). Each sample is sent as 2 whole byte(s) and the link is busy all the time. Find the highest signal frequency f_max that can be sampled without aliasing, in Hz.

baud = 460800 BdN = 108N1

f_max = Hz

3Solutions

1.Number systems

Answer: U = 216

Setting bits: each bit is worth a power of two (128, 64, …, 1). One hex digit is exactly four bits, and in 8-bit two's complement the leftmost bit is worth −128. Bitwise operations work on each bit position separately.

Invert and add one

40 = 0010 1000

inverted: 1101 0111

+1 → 1101 1000

Read it as unsigned

1101 1000₂ = 256 − 40 = 216

Answer

U = 216

2.Number systems

Answer: b = 12 bit

Positional number systems: each digit is worth its value times a power of the base. In binary the places are worth 1, 2, 4, 8, 16, …; in hexadecimal 1, 16, 256, …, with A–F standing for 10–15. In 8-bit two's complement the leftmost bit is worth −128 instead of +128, which is how negative numbers are stored.

Powers of two

2¹¹ = 2048 < 3943

2¹² = 4096 ≥ 3943

Answer

b = 12

3.Digital logic: gates, K-maps & flip-flops

Answer: N = 5

Karnaugh maps: the cells are ordered in Gray code (00, 01, 11, 10), so neighbouring cells, including the ones across the edges, differ in exactly one variable. Group the 1s in rectangles of 1, 2, 4, 8 or 16 cells, as large as possible and as few as possible, until every 1 is covered. Each group is one product term: the variables that stay constant inside it. A group of 2ᵏ cells loses k variables. Don't-cares (X) may be used to make groups bigger but never have to be covered. Grouping the 0s instead gives the minimal POS form.

Group the 1s

Every group is a rectangle of 2ᵏ cells; edge cells are neighbours of the cells on the opposite edge.

BCD′

ACD′

A′BC′

ABC

A′B′CD

Minimal SOP form

F = BCD′ + ACD′ + A′BC′ + ABC + A′B′CD

N = 5

Answer

N = 5

Another grouping of the same size exists; it has the same number of terms and literals.

4.Digital logic: gates, K-maps & flip-flops

Answer: Q = 9

Flip-flops and counters: a flip-flop changes only at the active clock edge. D copies its input (Q⁺ = D); T toggles when T = 1; JK holds for 00, resets for 01, sets for 10 and toggles for 11. An n-bit binary counter has 2ⁿ states and counts modulo 2ⁿ; a mod-N counter goes 0, 1, …, N − 1 and back to 0, and needs the smallest n with 2ⁿ ≥ N flip-flops. Each stage of a ripple counter halves the frequency, so the last output of a mod-N counter runs at f_clk/N. A Johnson counter of n flip-flops has 2n states, a ring counter n.

State after every edge

1100 → 0110 → 0011 → 1001 → 1100 → 0110 → 0011 → 1001 → 1100 → 0110 → 0011 → 1001

Decimal value

1001₂ = 9

Answer

Q = 9

5.Data acquisition & sampling

Answer: M = 2.4 MB

Data rates: every channel delivers f_s samples per second of N bits, so the raw rate is channels × f_s × N bit/s. In memory a sample takes whole bytes (a 12-bit sample is stored in 2 bytes), so the memory for a recording is channels × f_s × bytes per sample × time. A multiplexed ADC converts the channels one after another: each conversion (with settling) takes t, so one round of n channels takes n·t and each channel is sampled at 1/(n·t).

Bytes per sample

⌈10/8⌉ = 2 B

Byte rate

1·10000·2 = 20000 B/s

Memory

M = 20000·120 = 2.4 × 10⁶ B = 2.4 MB

Answer

M = 2.4 MB

6.Data acquisition & sampling

Answer: f_max = 11520 Hz

UART: an asynchronous serial link sends each byte as a frame: one start bit (low), the data bits, an optional parity bit and one or two stop bits (high). The baud rate is the number of bits per second, so one bit lasts T_b = 1/baud and a frame of n bits lasts n/baud. The common 8N1 format has 10 bits per byte. The baud generator divides the clock: baud = f_clk/(16·D) with a whole number D, so the real baud rate differs slightly from the target; an error below about 2 % is usually acceptable.

Bits per sample on the line

2·10 = 20 bit

Highest sampling rate

f_s,max = 460800/20 = 23040 Hz

Nyquist limit

f_max = 23040/2 = 11520 Hz

Answer

f_max = 11520 Hz

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