Number systems
- Place values
- binary 2k, octal 8k, hex 16k
- To decimal
- Σ dk·bk
- From decimal
- divide by the base, read the remainders bottom-up
- Hex ↔ binary
- one hex digit = 4 bits
- Two’s complement
- invert the bits and add 1
Digital Electronics: cram pack
Formula sheets, the key method steps for every topic and 6 practice problems, with full solutions at the back.
1Formulas and methods
Digital logic: gates, K-maps & flip-flops
- Basic gates
- A·B, A + B, A′, (A·B)′, (A + B)′, A ⊕ B
- Boolean rules
- X + X′ = 1, X·X′ = 0, X + XY = X, XY + XY′ = X
- De Morgan
- (X·Y)′ = X′ + Y′, (X + Y)′ = X′·Y′
- Karnaugh map order
- 00, 01, 11, 10 (Gray code)
- Group of 2ᵏ cells
- loses k variables
- 4-to-1 multiplexer
- F = A′B′I0 + A′BI1 + AB′I2 + ABI3
- Flip-flops
- D: Q⁺ = D, T: Q⁺ = T ⊕ Q, JK: Q⁺ = JQ′ + K′Q
- Counters
- n-bit: 2ⁿ states; mod-N: smallest n with 2ⁿ ≥ N; fout = fclk/N
- Ripple counter
- fmax = 1/(n·tpd)
- Ring and Johnson counters
- n and 2n states
Method
- For a circuit, work from the inputs to the output one gate at a time and write the value on every wire, or write its expression and fill in the truth table.
- For simplification, put the 1s (and the don’t-cares as X) into a Karnaugh map with Gray-code rows and columns: 00, 01, 11, 10.
- Cover the 1s with as few and as large groups of 1, 2, 4, 8 or 16 cells as possible, wrapping round the edges; each group is one product term made of the variables that stay constant. Group the 0s for the POS form.
- For flip-flops and counters, read the inputs at each active clock edge, write the state after every edge, and remember that an n-bit counter wraps round after 2ⁿ states.
Data acquisition & sampling
- Nyquist criterion
- fs > 2·fmax, fN = fs/2
- Alias frequency
- fa = |f − k·fs|, k = round(f/fs)
- Step size
- 1 LSB = VFSR/2ᴺ
- Quantisation error (rounding)
- ±½ LSB
- Truncating ADC code
- D = ⌊Vin/LSB⌋
- Bits for a resolution r
- 2ᴺ ≥ span/r
- Ideal SQNR, full-scale sine
- SQNR = 6.02·N + 1.76 dB
- Data rate
- channels × fs × N bit/s
- Multiplexed ADC
- fs = 1/(n·(tc + tset))
- UART
- Tb = 1/baud; 8N1 = 10 bits per byte; bytes/s = baud/bits per frame
- Baud rate divider
- baud = fclk/(16·D)
Method
- Write down what is given: sampling rate, signal frequencies, number of bits, input range, baud rate.
- For sampling questions, compare each frequency with fs/2; a higher frequency appears at fa = |f − k·fs| with the nearest multiple of fs.
- For resolution questions, find 1 LSB = VFSR/2ᴺ, or the smallest N with 2ᴺ ≥ span/resolution.
- For data rates and UART links, count everything that is sent: channels, samples per second, bits or whole bytes per sample, and the start, parity and stop bits of every frame.
2Practice problems
1.Number systemsMedium
Set the bits so they store −44 in 8-bit two's complement. Read as an unsigned number, what is the pattern's value U?
N = −448 bit
U =
2.Number systemsHard
Set the bits to the 8-bit result of 0110 1001 OR 1010 0001. What is the result's value R in decimal?
0110 1001OR1010 0001
R =
3.Digital logic: gates, K-maps & flip-flopsMedium
In this Karnaugh map exactly one 1 has no neighbouring 1, so it stays a group of one cell (a full minterm of four literals) in the minimal SOP form. Neighbours across the map edges count. Click that cell.
F = Σm(0, 5, 8, 10, 14)
- 1AB = 00, CD = 00
- 2AB = 00, CD = 01
- 3AB = 00, CD = 11
- 4AB = 00, CD = 10
- 5AB = 01, CD = 00
- 6AB = 01, CD = 01
- 7AB = 01, CD = 11
- 8AB = 01, CD = 10
- 9AB = 11, CD = 00
- 10AB = 11, CD = 01
- 11AB = 11, CD = 11
- 12AB = 11, CD = 10
- 13AB = 10, CD = 00
- 14AB = 10, CD = 01
- 15AB = 10, CD = 11
- 16AB = 10, CD = 10
4.Digital logic: gates, K-maps & flip-flopsHard
A 3-bit ripple (asynchronous) counter is built from flip-flops with a propagation delay of 20 ns each. All outputs must have settled before the next clock edge. Find the maximum clock frequency fmax.
n = 3tpd = 20 ns
fmax = MHz
5.Data acquisition & samplingMedium
A recorder samples one channel at 20 kHz with a 12-bit ADC. Each sample is stored in whole bytes. Find the memory M needed for a 1 min recording, in MB (1 MB = 10⁶ bytes).
n = 1fs = 20 kHzN = 12t = 1 min
M = MB
6.Data acquisition & samplingHard
A microcontroller with a 24 MHz clock sets its UART baud rate as fclk/(16·D), with D a whole number rounded to the nearest value. The target is 4800 baud. Find the percentage error of the real baud rate (positive when it is too fast).
fclk = 24 MHztarget = 4800 Bd
e = %
3Solutions
1.Number systems
Answer: U = 212
Setting bits: each bit is worth a power of two (128, 64, …, 1). One hex digit is exactly four bits, and in 8-bit two's complement the leftmost bit is worth −128. Bitwise operations work on each bit position separately.
Invert and add one
44 = 0010 1100
inverted: 1101 0011
+1 → 1101 0100
Read it as unsigned
1101 0100₂ = 256 − 44 = 212
Answer
U = 212
2.Number systems
Answer: R = 233
Setting bits: each bit is worth a power of two (128, 64, …, 1). One hex digit is exactly four bits, and in 8-bit two's complement the leftmost bit is worth −128. Bitwise operations work on each bit position separately.
Bit by bit
OR gives 1 where at least one bit is 1.
0110 1001
OR 1010 0001
= 1110 1001
Value of the result
1110 1001₂ = 233
Answer
R = 233
3.Digital logic: gates, K-maps & flip-flops
Answer: AB = 01, CD = 01
Karnaugh maps: the cells are ordered in Gray code (00, 01, 11, 10), so neighbouring cells, including the ones across the edges, differ in exactly one variable. Group the 1s in rectangles of 1, 2, 4, 8 or 16 cells, as large as possible and as few as possible, until every 1 is covered. Each group is one product term: the variables that stay constant inside it. A group of 2ᵏ cells loses k variables. Don't-cares (X) may be used to make groups bigger but never have to be covered. Grouping the 0s instead gives the minimal POS form.
Neighbours of each 1
A 1 with a neighbouring 1 can join a group of two or more.
m5: m4, m7, m1, m13 → 0
The isolated 1
m5 = A′BC′D → AB = 01, CD = 01
Answer
AB = 01, CD = 01
4.Digital logic: gates, K-maps & flip-flops
Answer: fmax = 16.67 MHz
Flip-flops and counters: a flip-flop changes only at the active clock edge. D copies its input (Q⁺ = D); T toggles when T = 1; JK holds for 00, resets for 01, sets for 10 and toggles for 11. An n-bit binary counter has 2ⁿ states and counts modulo 2ⁿ; a mod-N counter goes 0, 1, …, N − 1 and back to 0, and needs the smallest n with 2ⁿ ≥ N flip-flops. Each stage of a ripple counter halves the frequency, so the last output of a mod-N counter runs at fclk/N. A Johnson counter of n flip-flops has 2n states, a ring counter n.
Worst-case settling time
T = 3·20 ns = 60 ns
Maximum frequency
fmax = 1/60 ns = 16.67 MHz
Answer
fmax = 16.67 MHz
5.Data acquisition & sampling
Answer: M = 2.4 MB
Data rates: every channel delivers fs samples per second of N bits, so the raw rate is channels × fs × N bit/s. In memory a sample takes whole bytes (a 12-bit sample is stored in 2 bytes), so the memory for a recording is channels × fs × bytes per sample × time. A multiplexed ADC converts the channels one after another: each conversion (with settling) takes t, so one round of n channels takes n·t and each channel is sampled at 1/(n·t).
Bytes per sample
⌈12/8⌉ = 2 B
Byte rate
1·20000·2 = 40000 B/s
Memory
M = 40000·60 = 2.4 × 10⁶ B = 2.4 MB
Answer
M = 2.4 MB
6.Data acquisition & sampling
Answer: e = −0.1597 %
UART: an asynchronous serial link sends each byte as a frame: one start bit (low), the data bits, an optional parity bit and one or two stop bits (high). The baud rate is the number of bits per second, so one bit lasts Tb = 1/baud and a frame of n bits lasts n/baud. The common 8N1 format has 10 bits per byte. The baud generator divides the clock: baud = fclk/(16·D) with a whole number D, so the real baud rate differs slightly from the target; an error below about 2 % is usually acceptable.
Divider
D = 24·10⁶/(16·4800) = 312.5 → 313
Real baud rate
24·10⁶/(16·313) = 4792 Bd
Error
(4792 − 4800)/4800·100 = −0.1597 %
Answer
e = −0.1597 %
An error below about 2 % is usually acceptable.
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