Digital Electronics: cram pack

Formula sheets, the key method steps for every topic and 6 practice problems, with full solutions at the back.

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1Formulas and methods

Number systems

Place values
binary 2k, octal 8k, hex 16k
To decimal
Σ dk·bk
From decimal
divide by the base, read the remainders bottom-up
Hex ↔ binary
one hex digit = 4 bits
Two’s complement
invert the bits and add 1

Digital logic: gates, K-maps & flip-flops

Basic gates
A·B, A + B, A′, (A·B)′, (A + B)′, A ⊕ B
Boolean rules
X + X′ = 1, X·X′ = 0, X + XY = X, XY + XY′ = X
De Morgan
(X·Y)′ = X′ + Y′, (X + Y)′ = X′·Y′
Karnaugh map order
00, 01, 11, 10 (Gray code)
Group of 2ᵏ cells
loses k variables
4-to-1 multiplexer
F = A′B′I0 + A′BI1 + AB′I2 + ABI3
Flip-flops
D: Q⁺ = D, T: Q⁺ = T ⊕ Q, JK: Q⁺ = JQ′ + K′Q
Counters
n-bit: 2ⁿ states; mod-N: smallest n with 2ⁿ ≥ N; fout = fclk/N
Ripple counter
fmax = 1/(n·tpd)
Ring and Johnson counters
n and 2n states

Method

  1. For a circuit, work from the inputs to the output one gate at a time and write the value on every wire, or write its expression and fill in the truth table.
  2. For simplification, put the 1s (and the don’t-cares as X) into a Karnaugh map with Gray-code rows and columns: 00, 01, 11, 10.
  3. Cover the 1s with as few and as large groups of 1, 2, 4, 8 or 16 cells as possible, wrapping round the edges; each group is one product term made of the variables that stay constant. Group the 0s for the POS form.
  4. For flip-flops and counters, read the inputs at each active clock edge, write the state after every edge, and remember that an n-bit counter wraps round after 2ⁿ states.

Data acquisition & sampling

Nyquist criterion
fs > 2·fmax, fN = fs/2
Alias frequency
fa = |f − k·fs|, k = round(f/fs)
Step size
1 LSB = VFSR/2ᴺ
Quantisation error (rounding)
±½ LSB
Truncating ADC code
D = ⌊Vin/LSB⌋
Bits for a resolution r
2ᴺ ≥ span/r
Ideal SQNR, full-scale sine
SQNR = 6.02·N + 1.76 dB
Data rate
channels × fs × N bit/s
Multiplexed ADC
fs = 1/(n·(tc + tset))
UART
Tb = 1/baud; 8N1 = 10 bits per byte; bytes/s = baud/bits per frame
Baud rate divider
baud = fclk/(16·D)

Method

  1. Write down what is given: sampling rate, signal frequencies, number of bits, input range, baud rate.
  2. For sampling questions, compare each frequency with fs/2; a higher frequency appears at fa = |f − k·fs| with the nearest multiple of fs.
  3. For resolution questions, find 1 LSB = VFSR/2ᴺ, or the smallest N with 2ᴺ ≥ span/resolution.
  4. For data rates and UART links, count everything that is sent: channels, samples per second, bits or whole bytes per sample, and the start, parity and stop bits of every frame.

2Practice problems

1.Number systemsMedium
8-bit two's complement0−12806403201608040201

Set the bits so they store −80 in 8-bit two's complement. Read as an unsigned number, what is the pattern's value U?

N = −808 bit
U =
2.Number systemsHard
click the bits to set them012806403201608040201

Set the bits to the 8-bit result of 0010 1000 XOR 1011 1011. What is the result's value R in decimal?

0010 1000XOR1011 1011
R =
3.Digital logic: gates, K-maps & flip-flopsMedium
ABC00011110010011131204150706

Use the Karnaugh map to find the minimal product-of-sums (POS) form of F(A, B, C) = Σm(1, 2, 3, 5). How many sum terms (factors) N does it have?

F(A, B, C) = Σm(1, 2, 3, 5)
N =
4.Digital logic: gates, K-maps & flip-flopsHard
ABCD0001111000011110101103X2040507X6112X1301511408X9011110

For F(A, B, C, D) = Σm(0, 1, 10, 12, 14) + d(2, 6, 9, 13), where d marks the don't-care conditions, find the number N of essential prime implicants.

F(A, B, C, D) = Σm(0, 1, 10, 12, 14) + d(2, 6, 9, 13)
N =
5.Data acquisition & samplingMedium
SD0​D1​D2​D3​D4​D5​D6​D7​PTb​11·Tb​1200 Bd, 8E1

A UART sends bytes at 1200 baud in the format 8E1: 8 data bits, an even parity bit and 1 stop bit(s), plus the start bit. Find the largest number of data bytes per second it can transfer.

baud = 1200 Bd8E1
RB = B/s
6.Data acquisition & samplingHard
SD0​D1​D2​D3​D4​D5​D6​D7​Tb​10·Tb​9600 Bd, 8N1

A 16-bit ADC streams every sample over a UART at 9600 baud, format 8N1 (start bit, 8 data bits, 1 stop bit). Each sample is sent as 2 whole byte(s) and the link is busy all the time. Find the highest signal frequency fmax that can be sampled without aliasing, in Hz.

baud = 9600 BdN = 168N1
fmax = Hz

3Solutions

1.Number systems

Answer: U = 176

Setting bits: each bit is worth a power of two (128, 64, …, 1). One hex digit is exactly four bits, and in 8-bit two's complement the leftmost bit is worth −128. Bitwise operations work on each bit position separately.

Invert and add one

80 = 0101 0000
inverted: 1010 1111
+1 → 1011 0000

Read it as unsigned

1011 0000₂ = 256 − 80 = 176

Answer

U = 176
2.Number systems

Answer: R = 147

Setting bits: each bit is worth a power of two (128, 64, …, 1). One hex digit is exactly four bits, and in 8-bit two's complement the leftmost bit is worth −128. Bitwise operations work on each bit position separately.

Bit by bit

XOR gives 1 where the two bits differ.

0010 1000
XOR 1011 1011
= 1001 0011

Value of the result

1001 0011₂ = 147

Answer

R = 147
3.Digital logic: gates, K-maps & flip-flops

Answer: N = 2

Karnaugh maps: the cells are ordered in Gray code (00, 01, 11, 10), so neighbouring cells, including the ones across the edges, differ in exactly one variable. Group the 1s in rectangles of 1, 2, 4, 8 or 16 cells, as large as possible and as few as possible, until every 1 is covered. Each group is one product term: the variables that stay constant inside it. A group of 2ᵏ cells loses k variables. Don't-cares (X) may be used to make groups bigger but never have to be covered. Grouping the 0s instead gives the minimal POS form.

ABC00011110010011131204150706

Group the 0s

Every group is a rectangle of 2ᵏ cells; edge cells are neighbours of the cells on the opposite edge.

(B + C)
(A′ + B′)

Minimal POS form

F = (B + C)(A′ + B′)
N = 2

Answer

N = 2
4.Digital logic: gates, K-maps & flip-flops

Answer: N = 1

Karnaugh maps: the cells are ordered in Gray code (00, 01, 11, 10), so neighbouring cells, including the ones across the edges, differ in exactly one variable. Group the 1s in rectangles of 1, 2, 4, 8 or 16 cells, as large as possible and as few as possible, until every 1 is covered. Each group is one product term: the variables that stay constant inside it. A group of 2ᵏ cells loses k variables. Don't-cares (X) may be used to make groups bigger but never have to be covered. Grouping the 0s instead gives the minimal POS form.

Prime implicants

The largest groups that can be formed from 1s and Xs.

CD′, B′C′D, A′B′D′, ABD′, A′B′C′, ABC′
ABCD0001111000011110101103X2040507X6112X1301511408X9011110

Essential prime implicants

CD′
N = 1

Answer

N = 1
5.Data acquisition & sampling

Answer: RB = 109.1 B/s

UART: an asynchronous serial link sends each byte as a frame: one start bit (low), the data bits, an optional parity bit and one or two stop bits (high). The baud rate is the number of bits per second, so one bit lasts Tb = 1/baud and a frame of n bits lasts n/baud. The common 8N1 format has 10 bits per byte. The baud generator divides the clock: baud = fclk/(16·D) with a whole number D, so the real baud rate differs slightly from the target; an error below about 2 % is usually acceptable.

Bits per frame

1 + 8 + 1 + 1 = 11

Byte rate

1200/11 = 109.1 B/s

Answer

RB = 109.1 B/s
6.Data acquisition & sampling

Answer: fmax = 240 Hz

UART: an asynchronous serial link sends each byte as a frame: one start bit (low), the data bits, an optional parity bit and one or two stop bits (high). The baud rate is the number of bits per second, so one bit lasts Tb = 1/baud and a frame of n bits lasts n/baud. The common 8N1 format has 10 bits per byte. The baud generator divides the clock: baud = fclk/(16·D) with a whole number D, so the real baud rate differs slightly from the target; an error below about 2 % is usually acceptable.

Bits per sample on the line

2·10 = 20 bit

Highest sampling rate

fs,max = 9600/20 = 480 Hz

Nyquist limit

fmax = 480/2 = 240 Hz

Answer

fmax = 240 Hz

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