Number systems
- Place values
- binary 2k, octal 8k, hex 16k
- To decimal
- Σ dk·bk
- From decimal
- divide by the base, read the remainders bottom-up
- Hex ↔ binary
- one hex digit = 4 bits
- Two’s complement
- invert the bits and add 1
Digital Electronics: cram pack
Formula sheets, the key method steps for every topic and 6 practice problems, with full solutions at the back.
1Formulas and methods
Digital logic: gates, K-maps & flip-flops
- Basic gates
- A·B, A + B, A′, (A·B)′, (A + B)′, A ⊕ B
- Boolean rules
- X + X′ = 1, X·X′ = 0, X + XY = X, XY + XY′ = X
- De Morgan
- (X·Y)′ = X′ + Y′, (X + Y)′ = X′·Y′
- Karnaugh map order
- 00, 01, 11, 10 (Gray code)
- Group of 2ᵏ cells
- loses k variables
- 4-to-1 multiplexer
- F = A′B′I0 + A′BI1 + AB′I2 + ABI3
- Flip-flops
- D: Q⁺ = D, T: Q⁺ = T ⊕ Q, JK: Q⁺ = JQ′ + K′Q
- Counters
- n-bit: 2ⁿ states; mod-N: smallest n with 2ⁿ ≥ N; fout = fclk/N
- Ripple counter
- fmax = 1/(n·tpd)
- Ring and Johnson counters
- n and 2n states
Method
- For a circuit, work from the inputs to the output one gate at a time and write the value on every wire, or write its expression and fill in the truth table.
- For simplification, put the 1s (and the don’t-cares as X) into a Karnaugh map with Gray-code rows and columns: 00, 01, 11, 10.
- Cover the 1s with as few and as large groups of 1, 2, 4, 8 or 16 cells as possible, wrapping round the edges; each group is one product term made of the variables that stay constant. Group the 0s for the POS form.
- For flip-flops and counters, read the inputs at each active clock edge, write the state after every edge, and remember that an n-bit counter wraps round after 2ⁿ states.
Data acquisition & sampling
- Nyquist criterion
- fs > 2·fmax, fN = fs/2
- Alias frequency
- fa = |f − k·fs|, k = round(f/fs)
- Step size
- 1 LSB = VFSR/2ᴺ
- Quantisation error (rounding)
- ±½ LSB
- Truncating ADC code
- D = ⌊Vin/LSB⌋
- Bits for a resolution r
- 2ᴺ ≥ span/r
- Ideal SQNR, full-scale sine
- SQNR = 6.02·N + 1.76 dB
- Data rate
- channels × fs × N bit/s
- Multiplexed ADC
- fs = 1/(n·(tc + tset))
- UART
- Tb = 1/baud; 8N1 = 10 bits per byte; bytes/s = baud/bits per frame
- Baud rate divider
- baud = fclk/(16·D)
Method
- Write down what is given: sampling rate, signal frequencies, number of bits, input range, baud rate.
- For sampling questions, compare each frequency with fs/2; a higher frequency appears at fa = |f − k·fs| with the nearest multiple of fs.
- For resolution questions, find 1 LSB = VFSR/2ᴺ, or the smallest N with 2ᴺ ≥ span/resolution.
- For data rates and UART links, count everything that is sent: channels, samples per second, bits or whole bytes per sample, and the start, parity and stop bits of every frame.
2Practice problems
1.Number systemsMedium
Set the bits so they store −49 in 8-bit two's complement. Read as an unsigned number, what is the pattern's value U?
N = −498 bit
U =
2.Number systemsHard
An uncompressed image is 1024 × 768 pixels with 24 bits per pixel. How much memory M does it take, in KiB (1 KiB = 1024 bytes)?
1024 × 768 px24 bit/px1 KiB = 1024 B
M = KiB
3.Digital logic: gates, K-maps & flip-flopsMedium
Use the Karnaugh map to find the minimal sum-of-products (SOP) form of F(A, B, C, D) = Σm(0, 2, 3, 6, 13, 14). How many literals L does it contain in total (a primed variable counts as one literal)?
F(A, B, C, D) = Σm(0, 2, 3, 6, 13, 14)
L =
4.Digital logic: gates, K-maps & flip-flopsHard
A positive-edge-triggered JK flip-flop starts with Q = 0 and receives the inputs shown. Click the first clock edge at which Q goes from 1 back to 0.
Q₀ = 0JK
- 1clock edge 1
- 2clock edge 2
- 3clock edge 3
- 4clock edge 4
- 5clock edge 5
- 6clock edge 6
- 7clock edge 7
5.Data acquisition & samplingMedium
A UART sends bytes at 2400 baud in the format 8E1: 8 data bits, an even parity bit and 1 stop bit(s), plus the start bit. Find the largest number of data bytes per second it can transfer.
baud = 2400 Bd8E1
RB = B/s
6.Data acquisition & samplingHard
An audio measurement needs an ideal signal-to-quantisation-noise ratio of at least 100 dB for a full-scale sine wave. Find the smallest number of ADC bits N.
SQNR ≥ 100 dB
N =
3Solutions
1.Number systems
Answer: U = 207
Setting bits: each bit is worth a power of two (128, 64, …, 1). One hex digit is exactly four bits, and in 8-bit two's complement the leftmost bit is worth −128. Bitwise operations work on each bit position separately.
Invert and add one
49 = 0011 0001
inverted: 1100 1110
+1 → 1100 1111
Read it as unsigned
1100 1111₂ = 256 − 49 = 207
Answer
U = 207
2.Number systems
Answer: M = 2304 KiB
Positional number systems: each digit is worth its value times a power of the base. In binary the places are worth 1, 2, 4, 8, 16, …; in hexadecimal 1, 16, 256, …, with A–F standing for 10–15. In 8-bit two's complement the leftmost bit is worth −128 instead of +128, which is how negative numbers are stored.
Bits and bytes
1024·768·24 = 18874368 bit = 2359296 B
Convert to KiB
2359296/1024 = 2304 KiB
Answer
M = 2304 KiB
3.Digital logic: gates, K-maps & flip-flops
Answer: L = 13
Karnaugh maps: the cells are ordered in Gray code (00, 01, 11, 10), so neighbouring cells, including the ones across the edges, differ in exactly one variable. Group the 1s in rectangles of 1, 2, 4, 8 or 16 cells, as large as possible and as few as possible, until every 1 is covered. Each group is one product term: the variables that stay constant inside it. A group of 2ᵏ cells loses k variables. Don't-cares (X) may be used to make groups bigger but never have to be covered. Grouping the 0s instead gives the minimal POS form.
Group the 1s
Every group is a rectangle of 2ᵏ cells; edge cells are neighbours of the cells on the opposite edge.
BCD′
A′B′D′
A′B′C
ABC′D
Minimal SOP form
F = BCD′ + A′B′D′ + A′B′C + ABC′D
L = 13
Answer
L = 13
4.Digital logic: gates, K-maps & flip-flops
Answer: clock edge 5
Flip-flops and counters: a flip-flop changes only at the active clock edge. D copies its input (Q⁺ = D); T toggles when T = 1; JK holds for 00, resets for 01, sets for 10 and toggles for 11. An n-bit binary counter has 2ⁿ states and counts modulo 2ⁿ; a mod-N counter goes 0, 1, …, N − 1 and back to 0, and needs the smallest n with 2ⁿ ≥ N flip-flops. Each stage of a ripple counter halves the frequency, so the last output of a mod-N counter runs at fclk/N. A Johnson counter of n flip-flops has 2n states, a ring counter n.
Q after every edge
A JK flip-flop: 00 holds, 01 resets (Q = 0), 10 sets (Q = 1), 11 toggles.
1: J = 0, K = 1 → Q = 0
2: J = 0, K = 1 → Q = 0
3: J = 0, K = 1 → Q = 0
4: J = 1, K = 1 → Q = 1
5: J = 0, K = 1 → Q = 0
6: J = 0, K = 1 → Q = 0
7: J = 0, K = 0 → Q = 0
First change from 1 to 0
clock edge 5
Answer
clock edge 5
5.Data acquisition & sampling
Answer: RB = 218.2 B/s
UART: an asynchronous serial link sends each byte as a frame: one start bit (low), the data bits, an optional parity bit and one or two stop bits (high). The baud rate is the number of bits per second, so one bit lasts Tb = 1/baud and a frame of n bits lasts n/baud. The common 8N1 format has 10 bits per byte. The baud generator divides the clock: baud = fclk/(16·D) with a whole number D, so the real baud rate differs slightly from the target; an error below about 2 % is usually acceptable.
Bits per frame
1 + 8 + 1 + 1 = 11
Byte rate
2400/11 = 218.2 B/s
Answer
RB = 218.2 B/s
6.Data acquisition & sampling
Answer: N = 17
ADC resolution: an N-bit converter divides its full-scale range VFSR into 2ᴺ codes, from 0 to 2ᴺ − 1. One step is 1 LSB = VFSR/2ᴺ: the smallest change the converter can show. A truncating ADC gives the code ⌊Vin/LSB⌋; a rounding ADC is never more than ½ LSB away from the true value, its quantisation error. Every extra bit halves the LSB and adds about 6 dB to the ideal signal-to-quantisation-noise ratio SQNR = 6.02·N + 1.76 dB for a full-scale sine. To reach a resolution r over a span, choose the smallest N with 2ᴺ ≥ span/r.
Solve for N
N ≥ (100 − 1.76)/6.02 = 16.32
Round up
N = 17
check: 6.02·17 + 1.76 = 104.1 dB ≥ 100 dB
Answer
N = 17
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