Digital Electronics: cram pack

Formula sheets, the key method steps for every topic and 6 practice problems, with full solutions at the back.

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1Formulas and methods

Number systems

Place values
binary 2k, octal 8k, hex 16k
To decimal
Σ dk·bk
From decimal
divide by the base, read the remainders bottom-up
Hex ↔ binary
one hex digit = 4 bits
Two’s complement
invert the bits and add 1

Digital logic: gates, K-maps & flip-flops

Basic gates
A·B, A + B, A′, (A·B)′, (A + B)′, A ⊕ B
Boolean rules
X + X′ = 1, X·X′ = 0, X + XY = X, XY + XY′ = X
De Morgan
(X·Y)′ = X′ + Y′, (X + Y)′ = X′·Y′
Karnaugh map order
00, 01, 11, 10 (Gray code)
Group of 2ᵏ cells
loses k variables
4-to-1 multiplexer
F = A′B′I0 + A′BI1 + AB′I2 + ABI3
Flip-flops
D: Q⁺ = D, T: Q⁺ = T ⊕ Q, JK: Q⁺ = JQ′ + K′Q
Counters
n-bit: 2ⁿ states; mod-N: smallest n with 2ⁿ ≥ N; fout = fclk/N
Ripple counter
fmax = 1/(n·tpd)
Ring and Johnson counters
n and 2n states

Method

  1. For a circuit, work from the inputs to the output one gate at a time and write the value on every wire, or write its expression and fill in the truth table.
  2. For simplification, put the 1s (and the don’t-cares as X) into a Karnaugh map with Gray-code rows and columns: 00, 01, 11, 10.
  3. Cover the 1s with as few and as large groups of 1, 2, 4, 8 or 16 cells as possible, wrapping round the edges; each group is one product term made of the variables that stay constant. Group the 0s for the POS form.
  4. For flip-flops and counters, read the inputs at each active clock edge, write the state after every edge, and remember that an n-bit counter wraps round after 2ⁿ states.

Data acquisition & sampling

Nyquist criterion
fs > 2·fmax, fN = fs/2
Alias frequency
fa = |f − k·fs|, k = round(f/fs)
Step size
1 LSB = VFSR/2ᴺ
Quantisation error (rounding)
±½ LSB
Truncating ADC code
D = ⌊Vin/LSB⌋
Bits for a resolution r
2ᴺ ≥ span/r
Ideal SQNR, full-scale sine
SQNR = 6.02·N + 1.76 dB
Data rate
channels × fs × N bit/s
Multiplexed ADC
fs = 1/(n·(tc + tset))
UART
Tb = 1/baud; 8N1 = 10 bits per byte; bytes/s = baud/bits per frame
Baud rate divider
baud = fclk/(16·D)

Method

  1. Write down what is given: sampling rate, signal frequencies, number of bits, input range, baud rate.
  2. For sampling questions, compare each frequency with fs/2; a higher frequency appears at fa = |f − k·fs| with the nearest multiple of fs.
  3. For resolution questions, find 1 LSB = VFSR/2ᴺ, or the smallest N with 2ᴺ ≥ span/resolution.
  4. For data rates and UART links, count everything that is sent: channels, samples per second, bits or whole bytes per sample, and the start, parity and stop bits of every frame.

2Practice problems

1.Number systemsMedium
8-bit two's complement?−128?64?32?16?8?4?2?1

Write −23 as an 8-bit two's complement pattern. Read the pattern as an unsigned binary number: what is its value U in decimal?

N = −238 bit
U =
2.Number systemsHard
click the bits to set them012806403201608040201

Set the bits to the 8-bit result of 1000 1111 >> 2. What is the result's value R in decimal?

1000 1111>> 2
R =
3.Digital logic: gates, K-maps & flip-flopsMedium
ABCD000111100001111000010302040517160121131150141819011010

Use the Karnaugh map to find the minimal sum-of-products (SOP) form of F(A, B, C, D) = Σm(6, 7, 8, 9, 13, 15). How many literals L does it contain in total (a primed variable counts as one literal)?

F(A, B, C, D) = Σm(6, 7, 8, 9, 13, 15)
L =
4.Digital logic: gates, K-maps & flip-flopsHard
ABCD000111100001111010111302040507X6X12013015014X8X9111X10

Find the minimal SOP form of F(A, B, C, D) = Σm(0, 1, 3, 11) + d(6, 8, 9, 10, 12), where d marks the don't-care conditions. How many literals L does it contain?

F(A, B, C, D) = Σm(0, 1, 3, 11) + d(6, 8, 9, 10, 12)
L =
5.Data acquisition & samplingMedium
124⋮4 ch∿01N = 1410 kHz? MB

A recorder samples 4 channels at 10 kHz each with a 14-bit ADC. Each sample is stored in whole bytes. Find the memory M needed for a 5 min recording, in MB (1 MB = 10⁶ bytes).

n = 4fs = 10 kHzN = 14t = 5 min
M = MB
6.Data acquisition & samplingHard
SD0​D1​D2​D3​D4​D5​D6​D7​1/fbaud​24 MHz / (16·D)

A microcontroller with a 24 MHz clock sets its UART baud rate as fclk/(16·D), with D a whole number rounded to the nearest value. The target is 19200 baud. Find the percentage error of the real baud rate (positive when it is too fast).

fclk = 24 MHztarget = 19200 Bd
e = %

3Solutions

1.Number systems

Answer: U = 233

Positional number systems: each digit is worth its value times a power of the base. In binary the places are worth 1, 2, 4, 8, 16, …; in hexadecimal 1, 16, 256, …, with A–F standing for 10–15. In 8-bit two's complement the leftmost bit is worth −128 instead of +128, which is how negative numbers are stored.

Invert and add one

23 = 0001 0111
inverted: 1110 1000
+1 → 1110 1001

Read it as unsigned

1110 1001₂ = 256 − 23 = 233

Answer

U = 233
2.Number systems

Answer: R = 35

Setting bits: each bit is worth a power of two (128, 64, …, 1). One hex digit is exactly four bits, and in 8-bit two's complement the leftmost bit is worth −128. Bitwise operations work on each bit position separately.

Bit by bit

Shifting right by 2 moves every bit 2 places to the right; bits that fall off the right end are lost and zeros come in on the left.

1000 1111 >> 2
= 0010 0011

Value of the result

0010 0011₂ = 35

Answer

R = 35
3.Digital logic: gates, K-maps & flip-flops

Answer: L = 9

Karnaugh maps: the cells are ordered in Gray code (00, 01, 11, 10), so neighbouring cells, including the ones across the edges, differ in exactly one variable. Group the 1s in rectangles of 1, 2, 4, 8 or 16 cells, as large as possible and as few as possible, until every 1 is covered. Each group is one product term: the variables that stay constant inside it. A group of 2ᵏ cells loses k variables. Don't-cares (X) may be used to make groups bigger but never have to be covered. Grouping the 0s instead gives the minimal POS form.

ABCD000111100001111000010302040517160121131150141819011010

Group the 1s

Every group is a rectangle of 2ᵏ cells; edge cells are neighbours of the cells on the opposite edge.

ABD
A′BC
AB′C′

Minimal SOP form

F = ABD + A′BC + AB′C′
L = 9

Answer

L = 9
4.Digital logic: gates, K-maps & flip-flops

Answer: L = 4

Karnaugh maps: the cells are ordered in Gray code (00, 01, 11, 10), so neighbouring cells, including the ones across the edges, differ in exactly one variable. Group the 1s in rectangles of 1, 2, 4, 8 or 16 cells, as large as possible and as few as possible, until every 1 is covered. Each group is one product term: the variables that stay constant inside it. A group of 2ᵏ cells loses k variables. Don't-cares (X) may be used to make groups bigger but never have to be covered. Grouping the 0s instead gives the minimal POS form.

Prime implicants

The largest groups that can be formed from 1s and Xs.

B′D, B′C′, AB′
ABCD000111100001111010111302040507X6X12013015014X8X9111X10

Minimal cover

F = B′D + B′C′
L = 4

Answer

L = 4
5.Data acquisition & sampling

Answer: M = 24 MB

Data rates: every channel delivers fs samples per second of N bits, so the raw rate is channels × fs × N bit/s. In memory a sample takes whole bytes (a 12-bit sample is stored in 2 bytes), so the memory for a recording is channels × fs × bytes per sample × time. A multiplexed ADC converts the channels one after another: each conversion (with settling) takes t, so one round of n channels takes n·t and each channel is sampled at 1/(n·t).

Bytes per sample

⌈14/8⌉ = 2 B

Byte rate

4·10000·2 = 80000 B/s

Memory

M = 80000·300 = 2.4 × 10⁷ B = 24 MB

Answer

M = 24 MB
6.Data acquisition & sampling

Answer: e = 0.1603 %

UART: an asynchronous serial link sends each byte as a frame: one start bit (low), the data bits, an optional parity bit and one or two stop bits (high). The baud rate is the number of bits per second, so one bit lasts Tb = 1/baud and a frame of n bits lasts n/baud. The common 8N1 format has 10 bits per byte. The baud generator divides the clock: baud = fclk/(16·D) with a whole number D, so the real baud rate differs slightly from the target; an error below about 2 % is usually acceptable.

Divider

D = 24·10⁶/(16·19200) = 78.13 → 78

Real baud rate

24·10⁶/(16·78) = 19231 Bd

Error

(19231 − 19200)/19200·100 = 0.1603 %

Answer

e = 0.1603 %

An error below about 2 % is usually acceptable.

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