Number systems
- Place values
- binary 2k, octal 8k, hex 16k
- To decimal
- Σ dk·bk
- From decimal
- divide by the base, read the remainders bottom-up
- Hex ↔ binary
- one hex digit = 4 bits
- Two’s complement
- invert the bits and add 1
Digital Electronics: cram pack
Formula sheets, the key method steps for every topic and 6 practice problems, with full solutions at the back.
1Formulas and methods
Digital logic: gates, K-maps & flip-flops
- Basic gates
- A·B, A + B, A′, (A·B)′, (A + B)′, A ⊕ B
- Boolean rules
- X + X′ = 1, X·X′ = 0, X + XY = X, XY + XY′ = X
- De Morgan
- (X·Y)′ = X′ + Y′, (X + Y)′ = X′·Y′
- Karnaugh map order
- 00, 01, 11, 10 (Gray code)
- Group of 2ᵏ cells
- loses k variables
- 4-to-1 multiplexer
- F = A′B′I0 + A′BI1 + AB′I2 + ABI3
- Flip-flops
- D: Q⁺ = D, T: Q⁺ = T ⊕ Q, JK: Q⁺ = JQ′ + K′Q
- Counters
- n-bit: 2ⁿ states; mod-N: smallest n with 2ⁿ ≥ N; fout = fclk/N
- Ripple counter
- fmax = 1/(n·tpd)
- Ring and Johnson counters
- n and 2n states
Method
- For a circuit, work from the inputs to the output one gate at a time and write the value on every wire, or write its expression and fill in the truth table.
- For simplification, put the 1s (and the don’t-cares as X) into a Karnaugh map with Gray-code rows and columns: 00, 01, 11, 10.
- Cover the 1s with as few and as large groups of 1, 2, 4, 8 or 16 cells as possible, wrapping round the edges; each group is one product term made of the variables that stay constant. Group the 0s for the POS form.
- For flip-flops and counters, read the inputs at each active clock edge, write the state after every edge, and remember that an n-bit counter wraps round after 2ⁿ states.
Data acquisition & sampling
- Nyquist criterion
- fs > 2·fmax, fN = fs/2
- Alias frequency
- fa = |f − k·fs|, k = round(f/fs)
- Step size
- 1 LSB = VFSR/2ᴺ
- Quantisation error (rounding)
- ±½ LSB
- Truncating ADC code
- D = ⌊Vin/LSB⌋
- Bits for a resolution r
- 2ᴺ ≥ span/r
- Ideal SQNR, full-scale sine
- SQNR = 6.02·N + 1.76 dB
- Data rate
- channels × fs × N bit/s
- Multiplexed ADC
- fs = 1/(n·(tc + tset))
- UART
- Tb = 1/baud; 8N1 = 10 bits per byte; bytes/s = baud/bits per frame
- Baud rate divider
- baud = fclk/(16·D)
Method
- Write down what is given: sampling rate, signal frequencies, number of bits, input range, baud rate.
- For sampling questions, compare each frequency with fs/2; a higher frequency appears at fa = |f − k·fs| with the nearest multiple of fs.
- For resolution questions, find 1 LSB = VFSR/2ᴺ, or the smallest N with 2ᴺ ≥ span/resolution.
- For data rates and UART links, count everything that is sent: channels, samples per second, bits or whole bytes per sample, and the start, parity and stop bits of every frame.
2Practice problems
1.Number systemsMedium
Set the bits so they store −47 in 8-bit two's complement. Read as an unsigned number, what is the pattern's value U?
N = −478 bit
U =
2.Number systemsHard
An uncompressed image is 256 × 256 pixels with 24 bits per pixel. How much memory M does it take, in KiB (1 KiB = 1024 bytes)?
256 × 256 px24 bit/px1 KiB = 1024 B
M = KiB
3.Digital logic: gates, K-maps & flip-flopsMedium
Simplify F = A′C′ + ABC + A′C to its minimal sum-of-products form. How many literals L does the simplified expression contain?
F = A′C′ + ABC + A′C
L =
4.Digital logic: gates, K-maps & flip-flopsHard
A positive-edge-triggered T flip-flop starts with Q = 0 and receives the inputs shown at 6 rising clock edges. How many times N does Q change state?
Q₀ = 0T
N =
5.Data acquisition & samplingMedium
A sensor measures temperature over a span of 150 °C, and its output fills the whole input range of an ADC. The reading must resolve 0.05 °C. Find the smallest number of bits N the ADC needs.
span = 150 °Cresolution = 0.05 °C
N =
6.Data acquisition & samplingHard
A microcontroller with a 32 MHz clock sets its UART baud rate as fclk/(16·D), with D a whole number rounded to the nearest value. The target is 115200 baud. Find the percentage error of the real baud rate (positive when it is too fast).
fclk = 32 MHztarget = 115200 Bd
e = %
3Solutions
1.Number systems
Answer: U = 209
Setting bits: each bit is worth a power of two (128, 64, …, 1). One hex digit is exactly four bits, and in 8-bit two's complement the leftmost bit is worth −128. Bitwise operations work on each bit position separately.
Invert and add one
47 = 0010 1111
inverted: 1101 0000
+1 → 1101 0001
Read it as unsigned
1101 0001₂ = 256 − 47 = 209
Answer
U = 209
2.Number systems
Answer: M = 192 KiB
Positional number systems: each digit is worth its value times a power of the base. In binary the places are worth 1, 2, 4, 8, 16, …; in hexadecimal 1, 16, 256, …, with A–F standing for 10–15. In 8-bit two's complement the leftmost bit is worth −128 instead of +128, which is how negative numbers are stored.
Bits and bytes
256·256·24 = 1572864 bit = 196608 B
Convert to KiB
196608/1024 = 192 KiB
Answer
M = 192 KiB
3.Digital logic: gates, K-maps & flip-flops
Answer: L = 3
Boolean algebra: the rules that simplify expressions are X + X′ = 1 and X·X′ = 0, X + X = X, absorption X + X·Y = X, the combining rule X·Y + X·Y′ = X, X + X′Y = X + Y and the consensus theorem XY + X′Z + YZ = XY + X′Z. De Morgan's laws turn (X·Y)′ into X′ + Y′ and (X + Y)′ into X′·Y′. A Karnaugh map applies these rules graphically: every group of two neighbouring cells is one use of XY + XY′ = X.
Minterms of the expression
A′C′ → m(0, 2)
ABC → m(7)
A′C → m(1, 3)
Group and read off
F = BC + A′
Count the literals
L = 3
Answer
L = 3
4.Digital logic: gates, K-maps & flip-flops
Answer: N = 2
Flip-flops and counters: a flip-flop changes only at the active clock edge. D copies its input (Q⁺ = D); T toggles when T = 1; JK holds for 00, resets for 01, sets for 10 and toggles for 11. An n-bit binary counter has 2ⁿ states and counts modulo 2ⁿ; a mod-N counter goes 0, 1, …, N − 1 and back to 0, and needs the smallest n with 2ⁿ ≥ N flip-flops. Each stage of a ripple counter halves the frequency, so the last output of a mod-N counter runs at fclk/N. A Johnson counter of n flip-flops has 2n states, a ring counter n.
Q after every edge
A T flip-flop toggles at each rising edge with T = 1 and holds with T = 0.
1: T = 1 → Q = 1
2: T = 0 → Q = 1
3: T = 0 → Q = 1
4: T = 0 → Q = 1
5: T = 1 → Q = 0
6: T = 0 → Q = 0
Count the changes
0 → 1 → 1 → 1 → 1 → 0 → 0
N = 2
Answer
N = 2
5.Data acquisition & sampling
Answer: N = 12
ADC resolution: an N-bit converter divides its full-scale range VFSR into 2ᴺ codes, from 0 to 2ᴺ − 1. One step is 1 LSB = VFSR/2ᴺ: the smallest change the converter can show. A truncating ADC gives the code ⌊Vin/LSB⌋; a rounding ADC is never more than ½ LSB away from the true value, its quantisation error. Every extra bit halves the LSB and adds about 6 dB to the ideal signal-to-quantisation-noise ratio SQNR = 6.02·N + 1.76 dB for a full-scale sine. To reach a resolution r over a span, choose the smallest N with 2ᴺ ≥ span/r.
Steps needed
150/0.05 = 3000
Bits
log₂(3000) = 11.55
211 = 2048 < 3000 ≤ 212 = 4096
N = 12
Answer
N = 12
6.Data acquisition & sampling
Answer: e = 2.124 %
UART: an asynchronous serial link sends each byte as a frame: one start bit (low), the data bits, an optional parity bit and one or two stop bits (high). The baud rate is the number of bits per second, so one bit lasts Tb = 1/baud and a frame of n bits lasts n/baud. The common 8N1 format has 10 bits per byte. The baud generator divides the clock: baud = fclk/(16·D) with a whole number D, so the real baud rate differs slightly from the target; an error below about 2 % is usually acceptable.
Divider
D = 32·10⁶/(16·115200) = 17.36 → 17
Real baud rate
32·10⁶/(16·17) = 117647 Bd
Error
(117647 − 115200)/115200·100 = 2.124 %
Answer
e = 2.124 %
An error above about 2 % makes the link unreliable: choose another clock or baud rate.
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