Number systems
- Place values
- binary 2k, octal 8k, hex 16k
- To decimal
- Σ dk·bk
- From decimal
- divide by the base, read the remainders bottom-up
- Hex ↔ binary
- one hex digit = 4 bits
- Two’s complement
- invert the bits and add 1
Digital Electronics: cram pack
Formula sheets, the key method steps for every topic and 6 practice problems, with full solutions at the back.
1Formulas and methods
Digital logic: gates, K-maps & flip-flops
- Basic gates
- A·B, A + B, A′, (A·B)′, (A + B)′, A ⊕ B
- Boolean rules
- X + X′ = 1, X·X′ = 0, X + XY = X, XY + XY′ = X
- De Morgan
- (X·Y)′ = X′ + Y′, (X + Y)′ = X′·Y′
- Karnaugh map order
- 00, 01, 11, 10 (Gray code)
- Group of 2ᵏ cells
- loses k variables
- 4-to-1 multiplexer
- F = A′B′I0 + A′BI1 + AB′I2 + ABI3
- Flip-flops
- D: Q⁺ = D, T: Q⁺ = T ⊕ Q, JK: Q⁺ = JQ′ + K′Q
- Counters
- n-bit: 2ⁿ states; mod-N: smallest n with 2ⁿ ≥ N; fout = fclk/N
- Ripple counter
- fmax = 1/(n·tpd)
- Ring and Johnson counters
- n and 2n states
Method
- For a circuit, work from the inputs to the output one gate at a time and write the value on every wire, or write its expression and fill in the truth table.
- For simplification, put the 1s (and the don’t-cares as X) into a Karnaugh map with Gray-code rows and columns: 00, 01, 11, 10.
- Cover the 1s with as few and as large groups of 1, 2, 4, 8 or 16 cells as possible, wrapping round the edges; each group is one product term made of the variables that stay constant. Group the 0s for the POS form.
- For flip-flops and counters, read the inputs at each active clock edge, write the state after every edge, and remember that an n-bit counter wraps round after 2ⁿ states.
Data acquisition & sampling
- Nyquist criterion
- fs > 2·fmax, fN = fs/2
- Alias frequency
- fa = |f − k·fs|, k = round(f/fs)
- Step size
- 1 LSB = VFSR/2ᴺ
- Quantisation error (rounding)
- ±½ LSB
- Truncating ADC code
- D = ⌊Vin/LSB⌋
- Bits for a resolution r
- 2ᴺ ≥ span/r
- Ideal SQNR, full-scale sine
- SQNR = 6.02·N + 1.76 dB
- Data rate
- channels × fs × N bit/s
- Multiplexed ADC
- fs = 1/(n·(tc + tset))
- UART
- Tb = 1/baud; 8N1 = 10 bits per byte; bytes/s = baud/bits per frame
- Baud rate divider
- baud = fclk/(16·D)
Method
- Write down what is given: sampling rate, signal frequencies, number of bits, input range, baud rate.
- For sampling questions, compare each frequency with fs/2; a higher frequency appears at fa = |f − k·fs| with the nearest multiple of fs.
- For resolution questions, find 1 LSB = VFSR/2ᴺ, or the smallest N with 2ᴺ ≥ span/resolution.
- For data rates and UART links, count everything that is sent: channels, samples per second, bits or whole bytes per sample, and the start, parity and stop bits of every frame.
2Practice problems
1.Number systemsMedium
Set the bits so they store −57 in 8-bit two's complement. Read as an unsigned number, what is the pattern's value U?
N = −578 bit
U =
2.Number systemsHard
An uncompressed image is 800 × 600 pixels with 32 bits per pixel. How much memory M does it take, in KiB (1 KiB = 1024 bytes)?
800 × 600 px32 bit/px1 KiB = 1024 B
M = KiB
3.Digital logic: gates, K-maps & flip-flopsMedium
Use the Karnaugh map to find the minimal product-of-sums (POS) form of F(A, B, C, D) = Σm(0, 3, 7, 9, 10, 12, 13, 15). How many sum terms (factors) N does it have?
F(A, B, C, D) = Σm(0, 3, 7, 9, 10, 12, 13, 15)
N =
4.Digital logic: gates, K-maps & flip-flopsHard
A 4-bit shift register Q₃Q₂Q₁Q₀ holds 0011. At every clock edge the bits shift one place to the right (Q₃ → Q₂ → Q₁ → Q₀, Q₀ is lost) and the serial input enters Q₃. The serial input is 1, 1, 0, 1 at the 4 edges. Give the final state Q = Q₃Q₂Q₁Q₀ as a decimal number.
Q₃Q₂Q₁Q₀ = 00111, 1, 0, 1
Q =
5.Data acquisition & samplingMedium
A 600 Hz sine wave is sampled at 1 kHz without an anti-aliasing filter. At which frequency fa does it appear in the samples? Give it in Hz.
f = 600 Hzfs = 1 kHz
fa = Hz
6.Data acquisition & samplingHard
A 4-channel multiplexer feeds one ADC. Each conversion takes 10 µs, and after every channel switch the input needs 2.5 µs to settle. The channels are scanned in turn without pause. Find the sampling rate fs of each channel, in kHz.
n = 4tc = 10 µstset = 2.5 µs
fs = kHz
3Solutions
1.Number systems
Answer: U = 199
Setting bits: each bit is worth a power of two (128, 64, …, 1). One hex digit is exactly four bits, and in 8-bit two's complement the leftmost bit is worth −128. Bitwise operations work on each bit position separately.
Invert and add one
57 = 0011 1001
inverted: 1100 0110
+1 → 1100 0111
Read it as unsigned
1100 0111₂ = 256 − 57 = 199
Answer
U = 199
2.Number systems
Answer: M = 1875 KiB
Positional number systems: each digit is worth its value times a power of the base. In binary the places are worth 1, 2, 4, 8, 16, …; in hexadecimal 1, 16, 256, …, with A–F standing for 10–15. In 8-bit two's complement the leftmost bit is worth −128 instead of +128, which is how negative numbers are stored.
Bits and bytes
800·600·32 = 15360000 bit = 1920000 B
Convert to KiB
1920000/1024 = 1875 KiB
Answer
M = 1875 KiB
3.Digital logic: gates, K-maps & flip-flops
Answer: N = 6
Karnaugh maps: the cells are ordered in Gray code (00, 01, 11, 10), so neighbouring cells, including the ones across the edges, differ in exactly one variable. Group the 1s in rectangles of 1, 2, 4, 8 or 16 cells, as large as possible and as few as possible, until every 1 is covered. Each group is one product term: the variables that stay constant inside it. A group of 2ᵏ cells loses k variables. Don't-cares (X) may be used to make groups bigger but never have to be covered. Grouping the 0s instead gives the minimal POS form.
Group the 0s
Every group is a rectangle of 2ᵏ cells; edge cells are neighbours of the cells on the opposite edge.
(B′ + C′ + D)
(A + C + D′)
(A + C′ + D)
(A + B′ + D)
(A′ + B + C + D)
(A′ + B + C′ + D′)
Minimal POS form
F = (B′ + C′ + D)(A + C + D′)(A + C′ + D)(A + B′ + D)(A′ + B + C + D)(A′ + B + C′ + D′)
N = 6
Answer
N = 6
Another grouping of the same size exists; it has the same number of terms and literals.
4.Digital logic: gates, K-maps & flip-flops
Answer: Q = 11
Flip-flops and counters: a flip-flop changes only at the active clock edge. D copies its input (Q⁺ = D); T toggles when T = 1; JK holds for 00, resets for 01, sets for 10 and toggles for 11. An n-bit binary counter has 2ⁿ states and counts modulo 2ⁿ; a mod-N counter goes 0, 1, …, N − 1 and back to 0, and needs the smallest n with 2ⁿ ≥ N flip-flops. Each stage of a ripple counter halves the frequency, so the last output of a mod-N counter runs at fclk/N. A Johnson counter of n flip-flops has 2n states, a ring counter n.
State after every edge
0011 → 1001 → 1100 → 0110 → 1011
Decimal value
1011₂ = 11
Answer
Q = 11
5.Data acquisition & sampling
Answer: fa = 400 Hz
Sampling: an ADC measures the signal fs times per second. By the Nyquist–Shannon theorem a frequency f is captured correctly only while f < fs/2, the Nyquist (folding) frequency, so the sampling rate must exceed twice the highest signal frequency. A higher frequency is not lost: it shows up as an alias at fa = |f − k·fs|, with the whole number k that brings the result between 0 and fs/2. The samples cannot tell the two apart, so an analogue anti-aliasing filter must remove everything above fs/2 before the ADC.
Nyquist frequency
fs/2 = 500 Hz < f = 600 Hz
Nearest multiple of the sampling rate
k = round(600/1000) = 1
Alias frequency
fa = |600 − 1·1000| = 400 Hz
Answer
fa = 400 Hz
The dashed curve in the figure is the alias: it passes through exactly the same samples.
6.Data acquisition & sampling
Answer: fs = 20 kHz
Data rates: every channel delivers fs samples per second of N bits, so the raw rate is channels × fs × N bit/s. In memory a sample takes whole bytes (a 12-bit sample is stored in 2 bytes), so the memory for a recording is channels × fs × bytes per sample × time. A multiplexed ADC converts the channels one after another: each conversion (with settling) takes t, so one round of n channels takes n·t and each channel is sampled at 1/(n·t).
Time per channel
10 + 2.5 = 12.5 µs
Time per scan
4·12.5 = 50 µs
Sampling rate per channel
fs = 1/50 µs = 20 kHz
Answer
fs = 20 kHz
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