Digital Electronics: cram pack

Formula sheets, the key method steps for every topic and 6 practice problems, with full solutions at the back.

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1Formulas and methods

Number systems

Place values
binary 2k, octal 8k, hex 16k
To decimal
Σ dk·bk
From decimal
divide by the base, read the remainders bottom-up
Hex ↔ binary
one hex digit = 4 bits
Two’s complement
invert the bits and add 1

Digital logic: gates, K-maps & flip-flops

Basic gates
A·B, A + B, A′, (A·B)′, (A + B)′, A ⊕ B
Boolean rules
X + X′ = 1, X·X′ = 0, X + XY = X, XY + XY′ = X
De Morgan
(X·Y)′ = X′ + Y′, (X + Y)′ = X′·Y′
Karnaugh map order
00, 01, 11, 10 (Gray code)
Group of 2ᵏ cells
loses k variables
4-to-1 multiplexer
F = A′B′I0 + A′BI1 + AB′I2 + ABI3
Flip-flops
D: Q⁺ = D, T: Q⁺ = T ⊕ Q, JK: Q⁺ = JQ′ + K′Q
Counters
n-bit: 2ⁿ states; mod-N: smallest n with 2ⁿ ≥ N; fout = fclk/N
Ripple counter
fmax = 1/(n·tpd)
Ring and Johnson counters
n and 2n states

Method

  1. For a circuit, work from the inputs to the output one gate at a time and write the value on every wire, or write its expression and fill in the truth table.
  2. For simplification, put the 1s (and the don’t-cares as X) into a Karnaugh map with Gray-code rows and columns: 00, 01, 11, 10.
  3. Cover the 1s with as few and as large groups of 1, 2, 4, 8 or 16 cells as possible, wrapping round the edges; each group is one product term made of the variables that stay constant. Group the 0s for the POS form.
  4. For flip-flops and counters, read the inputs at each active clock edge, write the state after every edge, and remember that an n-bit counter wraps round after 2ⁿ states.

Data acquisition & sampling

Nyquist criterion
fs > 2·fmax, fN = fs/2
Alias frequency
fa = |f − k·fs|, k = round(f/fs)
Step size
1 LSB = VFSR/2ᴺ
Quantisation error (rounding)
±½ LSB
Truncating ADC code
D = ⌊Vin/LSB⌋
Bits for a resolution r
2ᴺ ≥ span/r
Ideal SQNR, full-scale sine
SQNR = 6.02·N + 1.76 dB
Data rate
channels × fs × N bit/s
Multiplexed ADC
fs = 1/(n·(tc + tset))
UART
Tb = 1/baud; 8N1 = 10 bits per byte; bytes/s = baud/bits per frame
Baud rate divider
baud = fclk/(16·D)

Method

  1. Write down what is given: sampling rate, signal frequencies, number of bits, input range, baud rate.
  2. For sampling questions, compare each frequency with fs/2; a higher frequency appears at fa = |f − k·fs| with the nearest multiple of fs.
  3. For resolution questions, find 1 LSB = VFSR/2ᴺ, or the smallest N with 2ᴺ ≥ span/resolution.
  4. For data rates and UART links, count everything that is sent: channels, samples per second, bits or whole bytes per sample, and the start, parity and stop bits of every frame.

2Practice problems

1.Number systemsMedium
place values in two's complement1−12816413201618040211

The 8-bit pattern 1110 1001 stores a signed integer in two's complement. What is its value N in decimal?

1110 10018 bit
N =
2.Number systemsHard
16 bit1 px256 px256 pxM = ? KiB

An uncompressed image is 256 × 256 pixels with 16 bits per pixel. How much memory M does it take, in KiB (1 KiB = 1024 bytes)?

256 × 256 px16 bit/px1 KiB = 1024 B
M = KiB
3.Digital logic: gates, K-maps & flip-flopsMedium
ABCD000111100001111000010312140517060121130151140809011110

Use the Karnaugh map to find the minimal sum-of-products (SOP) form of F(A, B, C, D) = Σm(2, 4, 7, 10, 13, 14). How many literals L does it contain in total (a primed variable counts as one literal)?

F(A, B, C, D) = Σm(2, 4, 7, 10, 13, 14)
L =
4.Digital logic: gates, K-maps & flip-flopsHard
ABCD00011110000111100011030204151706012X1311511408X9011010

For F(A, B, C, D) = Σm(1, 5, 7, 14, 15) + d(9, 13), where d marks the don't-care conditions, find the number N of essential prime implicants.

F(A, B, C, D) = Σm(1, 5, 7, 14, 15) + d(9, 13)
N =
5.Data acquisition & samplingMedium
SD0​D1​D2​D3​D4​D5​D6​D7​PTb​11·Tb​38400 Bd, 8E1

A UART sends bytes at 38400 baud in the format 8E1: 8 data bits, an even parity bit and 1 stop bit(s), plus the start bit. Find the largest number of data bytes per second it can transfer.

baud = 38400 Bd8E1
RB = B/s
6.Data acquisition & samplingHard
SD0​D1​D2​D3​D4​D5​D6​D7​1/fbaud​24 MHz / (16·D)

A microcontroller with a 24 MHz clock sets its UART baud rate as fclk/(16·D), with D a whole number rounded to the nearest value. The target is 115200 baud. Find the percentage error of the real baud rate (positive when it is too fast).

fclk = 24 MHztarget = 115200 Bd
e = %

3Solutions

1.Number systems

Answer: N = −23

Positional number systems: each digit is worth its value times a power of the base. In binary the places are worth 1, 2, 4, 8, 16, …; in hexadecimal 1, 16, 256, …, with A–F standing for 10–15. In 8-bit two's complement the leftmost bit is worth −128 instead of +128, which is how negative numbers are stored.

Add the place values

The other bits keep their normal positive values.

−128 + 64 + 32 + 8 + 1 = −23

Answer

N = −23
2.Number systems

Answer: M = 128 KiB

Positional number systems: each digit is worth its value times a power of the base. In binary the places are worth 1, 2, 4, 8, 16, …; in hexadecimal 1, 16, 256, …, with A–F standing for 10–15. In 8-bit two's complement the leftmost bit is worth −128 instead of +128, which is how negative numbers are stored.

Bits and bytes

256·256·16 = 1048576 bit = 131072 B

Convert to KiB

131072/1024 = 128 KiB

Answer

M = 128 KiB
3.Digital logic: gates, K-maps & flip-flops

Answer: L = 18

Karnaugh maps: the cells are ordered in Gray code (00, 01, 11, 10), so neighbouring cells, including the ones across the edges, differ in exactly one variable. Group the 1s in rectangles of 1, 2, 4, 8 or 16 cells, as large as possible and as few as possible, until every 1 is covered. Each group is one product term: the variables that stay constant inside it. A group of 2ᵏ cells loses k variables. Don't-cares (X) may be used to make groups bigger but never have to be covered. Grouping the 0s instead gives the minimal POS form.

ABCD000111100001111000010312140517060121130151140809011110

Group the 1s

Every group is a rectangle of 2ᵏ cells; edge cells are neighbours of the cells on the opposite edge.

B′CD′
ACD′
A′BC′D′
A′BCD
ABC′D

Minimal SOP form

F = B′CD′ + ACD′ + A′BC′D′ + A′BCD + ABC′D
L = 18

Answer

L = 18
4.Digital logic: gates, K-maps & flip-flops

Answer: N = 3

Karnaugh maps: the cells are ordered in Gray code (00, 01, 11, 10), so neighbouring cells, including the ones across the edges, differ in exactly one variable. Group the 1s in rectangles of 1, 2, 4, 8 or 16 cells, as large as possible and as few as possible, until every 1 is covered. Each group is one product term: the variables that stay constant inside it. A group of 2ᵏ cells loses k variables. Don't-cares (X) may be used to make groups bigger but never have to be covered. Grouping the 0s instead gives the minimal POS form.

Prime implicants

The largest groups that can be formed from 1s and Xs.

C′D, BD, ABC
ABCD00011110000111100011030204151706012X1311511408X9011010

Essential prime implicants

C′D, BD, ABC
N = 3

Answer

N = 3
5.Data acquisition & sampling

Answer: RB = 3491 B/s

UART: an asynchronous serial link sends each byte as a frame: one start bit (low), the data bits, an optional parity bit and one or two stop bits (high). The baud rate is the number of bits per second, so one bit lasts Tb = 1/baud and a frame of n bits lasts n/baud. The common 8N1 format has 10 bits per byte. The baud generator divides the clock: baud = fclk/(16·D) with a whole number D, so the real baud rate differs slightly from the target; an error below about 2 % is usually acceptable.

Bits per frame

1 + 8 + 1 + 1 = 11

Byte rate

38400/11 = 3491 B/s

Answer

RB = 3491 B/s
6.Data acquisition & sampling

Answer: e = 0.1603 %

UART: an asynchronous serial link sends each byte as a frame: one start bit (low), the data bits, an optional parity bit and one or two stop bits (high). The baud rate is the number of bits per second, so one bit lasts Tb = 1/baud and a frame of n bits lasts n/baud. The common 8N1 format has 10 bits per byte. The baud generator divides the clock: baud = fclk/(16·D) with a whole number D, so the real baud rate differs slightly from the target; an error below about 2 % is usually acceptable.

Divider

D = 24·10⁶/(16·115200) = 13.02 → 13

Real baud rate

24·10⁶/(16·13) = 115385 Bd

Error

(115385 − 115200)/115200·100 = 0.1603 %

Answer

e = 0.1603 %

An error below about 2 % is usually acceptable.

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