Number systems
- Place values
- binary 2k, octal 8k, hex 16k
- To decimal
- Σ dk·bk
- From decimal
- divide by the base, read the remainders bottom-up
- Hex ↔ binary
- one hex digit = 4 bits
- Two’s complement
- invert the bits and add 1
Digital Electronics: cram pack
Formula sheets, the key method steps for every topic and 6 practice problems, with full solutions at the back.
1Formulas and methods
Digital logic: gates, K-maps & flip-flops
- Basic gates
- A·B, A + B, A′, (A·B)′, (A + B)′, A ⊕ B
- Boolean rules
- X + X′ = 1, X·X′ = 0, X + XY = X, XY + XY′ = X
- De Morgan
- (X·Y)′ = X′ + Y′, (X + Y)′ = X′·Y′
- Karnaugh map order
- 00, 01, 11, 10 (Gray code)
- Group of 2ᵏ cells
- loses k variables
- 4-to-1 multiplexer
- F = A′B′I0 + A′BI1 + AB′I2 + ABI3
- Flip-flops
- D: Q⁺ = D, T: Q⁺ = T ⊕ Q, JK: Q⁺ = JQ′ + K′Q
- Counters
- n-bit: 2ⁿ states; mod-N: smallest n with 2ⁿ ≥ N; fout = fclk/N
- Ripple counter
- fmax = 1/(n·tpd)
- Ring and Johnson counters
- n and 2n states
Method
- For a circuit, work from the inputs to the output one gate at a time and write the value on every wire, or write its expression and fill in the truth table.
- For simplification, put the 1s (and the don’t-cares as X) into a Karnaugh map with Gray-code rows and columns: 00, 01, 11, 10.
- Cover the 1s with as few and as large groups of 1, 2, 4, 8 or 16 cells as possible, wrapping round the edges; each group is one product term made of the variables that stay constant. Group the 0s for the POS form.
- For flip-flops and counters, read the inputs at each active clock edge, write the state after every edge, and remember that an n-bit counter wraps round after 2ⁿ states.
Data acquisition & sampling
- Nyquist criterion
- fs > 2·fmax, fN = fs/2
- Alias frequency
- fa = |f − k·fs|, k = round(f/fs)
- Step size
- 1 LSB = VFSR/2ᴺ
- Quantisation error (rounding)
- ±½ LSB
- Truncating ADC code
- D = ⌊Vin/LSB⌋
- Bits for a resolution r
- 2ᴺ ≥ span/r
- Ideal SQNR, full-scale sine
- SQNR = 6.02·N + 1.76 dB
- Data rate
- channels × fs × N bit/s
- Multiplexed ADC
- fs = 1/(n·(tc + tset))
- UART
- Tb = 1/baud; 8N1 = 10 bits per byte; bytes/s = baud/bits per frame
- Baud rate divider
- baud = fclk/(16·D)
Method
- Write down what is given: sampling rate, signal frequencies, number of bits, input range, baud rate.
- For sampling questions, compare each frequency with fs/2; a higher frequency appears at fa = |f − k·fs| with the nearest multiple of fs.
- For resolution questions, find 1 LSB = VFSR/2ᴺ, or the smallest N with 2ᴺ ≥ span/resolution.
- For data rates and UART links, count everything that is sent: channels, samples per second, bits or whole bytes per sample, and the start, parity and stop bits of every frame.
2Practice problems
1.Number systemsMedium
Set the bits so they store −101 in 8-bit two's complement. Read as an unsigned number, what is the pattern's value U?
N = −1018 bit
U =
2.Number systemsHard
Set the bits to the 8-bit result of 1100 1010 >> 3. What is the result's value R in decimal?
1100 1010>> 3
R =
3.Digital logic: gates, K-maps & flip-flopsMedium
A 4-to-1 multiplexer has its select inputs S₁ = A and S₀ = B, and its data inputs tied to I₀ = C′, I₁ = C′, I₂ = C, I₃ = 0. For how many of the 8 combinations of A, B and C is the output F = 1? Find N.
I₀ = C′I₁ = C′I₂ = CI₃ = 0
N =
4.Digital logic: gates, K-maps & flip-flopsHard
Find the minimal SOP form of F(A, B, C, D) = Σm(2, 3, 6, 9, 11, 14) + d(4, 12, 13), where d marks the don't-care conditions. How many literals L does it contain?
F(A, B, C, D) = Σm(2, 3, 6, 9, 11, 14) + d(4, 12, 13)
L =
5.Data acquisition & samplingMedium
A 10-bit ADC with an input range of 0 to 10 V truncates: its output code is ⌊Vin/LSB⌋ with 1 LSB = VFSR/2ᴺ. Find the decimal output code D for an input of 4.461 V.
N = 10VFSR = 10 VVin = 4.461 V
D =
6.Data acquisition & samplingHard
A 2.4 kHz square wave is sampled at 8 kHz with no anti-aliasing filter. A square wave contains the odd harmonics 3f₁, 5f₁, 7f₁, … At which frequency fa does its harmonic 3f₁ appear in the sampled data? Give it in Hz.
f₁ = 2.4 kHzfs = 8 kHzharmonic: 3f₁
fa = Hz
3Solutions
1.Number systems
Answer: U = 155
Setting bits: each bit is worth a power of two (128, 64, …, 1). One hex digit is exactly four bits, and in 8-bit two's complement the leftmost bit is worth −128. Bitwise operations work on each bit position separately.
Invert and add one
101 = 0110 0101
inverted: 1001 1010
+1 → 1001 1011
Read it as unsigned
1001 1011₂ = 256 − 101 = 155
Answer
U = 155
2.Number systems
Answer: R = 25
Setting bits: each bit is worth a power of two (128, 64, …, 1). One hex digit is exactly four bits, and in 8-bit two's complement the leftmost bit is worth −128. Bitwise operations work on each bit position separately.
Bit by bit
Shifting right by 3 moves every bit 3 places to the right; bits that fall off the right end are lost and zeros come in on the left.
1100 1010 >> 3
= 0001 1001
Value of the result
0001 1001₂ = 25
Answer
R = 25
3.Digital logic: gates, K-maps & flip-flops
Answer: N = 3
Multiplexer: a 2ⁿ-to-1 multiplexer passes one of its data inputs to the output; the select lines, read as a binary number, pick which one. For a 4-to-1 MUX with selects S₁S₀ = AB, F = A′B′·I₀ + A′B·I₁ + AB′·I₂ + AB·I₃. Tying the data inputs to 0, 1, C or C′ makes the MUX produce any function of A, B and C, which is a common way to build logic with one chip.
Output expression
F = A′B′C′ + A′BC′ + AB′C
Rows with F = 1
ABC = 000, 010, 101
N = 3
Answer
N = 3
4.Digital logic: gates, K-maps & flip-flops
Answer: L = 8
Karnaugh maps: the cells are ordered in Gray code (00, 01, 11, 10), so neighbouring cells, including the ones across the edges, differ in exactly one variable. Group the 1s in rectangles of 1, 2, 4, 8 or 16 cells, as large as possible and as few as possible, until every 1 is covered. Each group is one product term: the variables that stay constant inside it. A group of 2ᵏ cells loses k variables. Don't-cares (X) may be used to make groups bigger but never have to be covered. Grouping the 0s instead gives the minimal POS form.
Prime implicants
The largest groups that can be formed from 1s and Xs.
BD′, B′CD, A′CD′, AC′D, AB′D, A′B′C
Minimal cover
F = BD′ + AB′D + A′B′C
L = 8
Answer
L = 8
5.Data acquisition & sampling
Answer: D = 456
ADC resolution: an N-bit converter divides its full-scale range VFSR into 2ᴺ codes, from 0 to 2ᴺ − 1. One step is 1 LSB = VFSR/2ᴺ: the smallest change the converter can show. A truncating ADC gives the code ⌊Vin/LSB⌋; a rounding ADC is never more than ½ LSB away from the true value, its quantisation error. Every extra bit halves the LSB and adds about 6 dB to the ideal signal-to-quantisation-noise ratio SQNR = 6.02·N + 1.76 dB for a full-scale sine. To reach a resolution r over a span, choose the smallest N with 2ᴺ ≥ span/r.
Step size
1 LSB = 10/210 = 9.766 mV
Code
Vin/LSB = 4461/9.766 = 456.8
code = ⌊456.8⌋ = 456
Answer
D = 456
In binary that is 0111001000.
6.Data acquisition & sampling
Answer: fa = 800 Hz
Sampling: an ADC measures the signal fs times per second. By the Nyquist–Shannon theorem a frequency f is captured correctly only while f < fs/2, the Nyquist (folding) frequency, so the sampling rate must exceed twice the highest signal frequency. A higher frequency is not lost: it shows up as an alias at fa = |f − k·fs|, with the whole number k that brings the result between 0 and fs/2. The samples cannot tell the two apart, so an analogue anti-aliasing filter must remove everything above fs/2 before the ADC.
Harmonic frequency
3f₁ = 3·2.4 kHz = 7.2 kHz
Nearest multiple of the sampling rate
m = round(0.9) = 1
Alias frequency
fa = |7200 − 1·8000| = 800 Hz
Answer
fa = 800 Hz
The alias lands inside the signal band, where no digital filter can remove it. Only an analogue filter before the ADC helps.
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