Digital Electronics: cram pack

Formula sheets, the key method steps for every topic and 6 practice problems, with full solutions at the back.

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1Formulas and methods

Number systems

Place values
binary 2k, octal 8k, hex 16k
To decimal
Σ dk·bk
From decimal
divide by the base, read the remainders bottom-up
Hex ↔ binary
one hex digit = 4 bits
Two’s complement
invert the bits and add 1

Digital logic: gates, K-maps & flip-flops

Basic gates
A·B, A + B, A′, (A·B)′, (A + B)′, A ⊕ B
Boolean rules
X + X′ = 1, X·X′ = 0, X + XY = X, XY + XY′ = X
De Morgan
(X·Y)′ = X′ + Y′, (X + Y)′ = X′·Y′
Karnaugh map order
00, 01, 11, 10 (Gray code)
Group of 2ᵏ cells
loses k variables
4-to-1 multiplexer
F = A′B′I0 + A′BI1 + AB′I2 + ABI3
Flip-flops
D: Q⁺ = D, T: Q⁺ = T ⊕ Q, JK: Q⁺ = JQ′ + K′Q
Counters
n-bit: 2ⁿ states; mod-N: smallest n with 2ⁿ ≥ N; fout = fclk/N
Ripple counter
fmax = 1/(n·tpd)
Ring and Johnson counters
n and 2n states

Method

  1. For a circuit, work from the inputs to the output one gate at a time and write the value on every wire, or write its expression and fill in the truth table.
  2. For simplification, put the 1s (and the don’t-cares as X) into a Karnaugh map with Gray-code rows and columns: 00, 01, 11, 10.
  3. Cover the 1s with as few and as large groups of 1, 2, 4, 8 or 16 cells as possible, wrapping round the edges; each group is one product term made of the variables that stay constant. Group the 0s for the POS form.
  4. For flip-flops and counters, read the inputs at each active clock edge, write the state after every edge, and remember that an n-bit counter wraps round after 2ⁿ states.

Data acquisition & sampling

Nyquist criterion
fs > 2·fmax, fN = fs/2
Alias frequency
fa = |f − k·fs|, k = round(f/fs)
Step size
1 LSB = VFSR/2ᴺ
Quantisation error (rounding)
±½ LSB
Truncating ADC code
D = ⌊Vin/LSB⌋
Bits for a resolution r
2ᴺ ≥ span/r
Ideal SQNR, full-scale sine
SQNR = 6.02·N + 1.76 dB
Data rate
channels × fs × N bit/s
Multiplexed ADC
fs = 1/(n·(tc + tset))
UART
Tb = 1/baud; 8N1 = 10 bits per byte; bytes/s = baud/bits per frame
Baud rate divider
baud = fclk/(16·D)

Method

  1. Write down what is given: sampling rate, signal frequencies, number of bits, input range, baud rate.
  2. For sampling questions, compare each frequency with fs/2; a higher frequency appears at fa = |f − k·fs| with the nearest multiple of fs.
  3. For resolution questions, find 1 LSB = VFSR/2ᴺ, or the smallest N with 2ᴺ ≥ span/resolution.
  4. For data rates and UART links, count everything that is sent: channels, samples per second, bits or whole bytes per sample, and the start, parity and stop bits of every frame.

2Practice problems

1.Number systemsMedium
8-bit two's complement0−12806403201608040201

Set the bits so they store −50 in 8-bit two's complement. Read as an unsigned number, what is the pattern's value U?

N = −508 bit
U =
2.Number systemsHard
32 bit1 px256 px256 pxM = ? KiB

An uncompressed image is 256 × 256 pixels with 32 bits per pixel. How much memory M does it take, in KiB (1 KiB = 1024 bytes)?

256 × 256 px32 bit/px1 KiB = 1024 B
M = KiB
3.Digital logic: gates, K-maps & flip-flopsMedium
ABCD000111100001111011111111

In this Karnaugh map exactly one 1 has no neighbouring 1, so it stays a group of one cell (a full minterm of four literals) in the minimal SOP form. Neighbours across the map edges count. Click that cell.

F = Σm(2, 3, 4, 7, 10, 13, 14, 15)
  1. 1AB = 00, CD = 00
  2. 2AB = 00, CD = 01
  3. 3AB = 00, CD = 11
  4. 4AB = 00, CD = 10
  5. 5AB = 01, CD = 00
  6. 6AB = 01, CD = 01
  7. 7AB = 01, CD = 11
  8. 8AB = 01, CD = 10
  9. 9AB = 11, CD = 00
  10. 10AB = 11, CD = 01
  11. 11AB = 11, CD = 11
  12. 12AB = 11, CD = 10
  13. 13AB = 10, CD = 00
  14. 14AB = 10, CD = 01
  15. 15AB = 10, CD = 11
  16. 16AB = 10, CD = 10
4.Digital logic: gates, K-maps & flip-flopsHard
DQ3​Q3​DQ2​Q2​DQ1​Q1​DQ0​Q0​CLKSHIFT

A 4-bit shift register Q₃Q₂Q₁Q₀ holds 0110. At every clock edge the bits shift one place to the right (Q₃ → Q₂ → Q₁ → Q₀, Q₀ is lost) and the serial input enters Q₃. The serial input is 1, 0, 1, 0, 1 at the 5 edges. Give the final state Q = Q₃Q₂Q₁Q₀ as a decimal number.

Q₃Q₂Q₁Q₀ = 01101, 0, 1, 0, 1
Q =
5.Data acquisition & samplingMedium
SD0​D1​D2​D3​D4​D5​D6​D7​Tb​10·Tb​38400 Bd, 8N1

A UART sends bytes at 38400 baud in the format 8N1: 8 data bits, no parity and 1 stop bit(s), plus the start bit. Find the largest number of data bytes per second it can transfer.

baud = 38400 Bd8N1
RB = B/s
6.Data acquisition & samplingHard
T10 mV/°C×1∿01N = 8, 5 V? °C/LSB

A temperature sensor gives 10 mV/°C (0 V at 0 °C). Its signal is amplified 1 times and fed to an 8-bit ADC with a range of 0 to 5 V (1 LSB = VFSR/2ᴺ). Find the temperature change ΔTLSB that corresponds to one LSB.

S = 10 mV/°CG = 1N = 8VFSR = 5 V
ΔTLSB = °C

3Solutions

1.Number systems

Answer: U = 206

Setting bits: each bit is worth a power of two (128, 64, …, 1). One hex digit is exactly four bits, and in 8-bit two's complement the leftmost bit is worth −128. Bitwise operations work on each bit position separately.

Invert and add one

50 = 0011 0010
inverted: 1100 1101
+1 → 1100 1110

Read it as unsigned

1100 1110₂ = 256 − 50 = 206

Answer

U = 206
2.Number systems

Answer: M = 256 KiB

Positional number systems: each digit is worth its value times a power of the base. In binary the places are worth 1, 2, 4, 8, 16, …; in hexadecimal 1, 16, 256, …, with A–F standing for 10–15. In 8-bit two's complement the leftmost bit is worth −128 instead of +128, which is how negative numbers are stored.

Bits and bytes

256·256·32 = 2097152 bit = 262144 B

Convert to KiB

262144/1024 = 256 KiB

Answer

M = 256 KiB
3.Digital logic: gates, K-maps & flip-flops

Answer: AB = 01, CD = 00

Karnaugh maps: the cells are ordered in Gray code (00, 01, 11, 10), so neighbouring cells, including the ones across the edges, differ in exactly one variable. Group the 1s in rectangles of 1, 2, 4, 8 or 16 cells, as large as possible and as few as possible, until every 1 is covered. Each group is one product term: the variables that stay constant inside it. A group of 2ᵏ cells loses k variables. Don't-cares (X) may be used to make groups bigger but never have to be covered. Grouping the 0s instead gives the minimal POS form.

Neighbours of each 1

A 1 with a neighbouring 1 can join a group of two or more.

m4: m5, m6, m0, m12 → 0
ABCD000111100001111011111111

The isolated 1

m4 = A′BC′D′ → AB = 01, CD = 00

Answer

AB = 01, CD = 00
4.Digital logic: gates, K-maps & flip-flops

Answer: Q = 10

Flip-flops and counters: a flip-flop changes only at the active clock edge. D copies its input (Q⁺ = D); T toggles when T = 1; JK holds for 00, resets for 01, sets for 10 and toggles for 11. An n-bit binary counter has 2ⁿ states and counts modulo 2ⁿ; a mod-N counter goes 0, 1, …, N − 1 and back to 0, and needs the smallest n with 2ⁿ ≥ N flip-flops. Each stage of a ripple counter halves the frequency, so the last output of a mod-N counter runs at fclk/N. A Johnson counter of n flip-flops has 2n states, a ring counter n.

State after every edge

0110 → 1011 → 0101 → 1010 → 0101 → 1010

Decimal value

1010₂ = 10

Answer

Q = 10
5.Data acquisition & sampling

Answer: RB = 3840 B/s

UART: an asynchronous serial link sends each byte as a frame: one start bit (low), the data bits, an optional parity bit and one or two stop bits (high). The baud rate is the number of bits per second, so one bit lasts Tb = 1/baud and a frame of n bits lasts n/baud. The common 8N1 format has 10 bits per byte. The baud generator divides the clock: baud = fclk/(16·D) with a whole number D, so the real baud rate differs slightly from the target; an error below about 2 % is usually acceptable.

Bits per frame

1 + 8 + 0 + 1 = 10

Byte rate

38400/10 = 3840 B/s

Answer

RB = 3840 B/s
6.Data acquisition & sampling

Answer: ΔTLSB = 1.953 °C

ADC resolution: an N-bit converter divides its full-scale range VFSR into 2ᴺ codes, from 0 to 2ᴺ − 1. One step is 1 LSB = VFSR/2ᴺ: the smallest change the converter can show. A truncating ADC gives the code ⌊Vin/LSB⌋; a rounding ADC is never more than ½ LSB away from the true value, its quantisation error. Every extra bit halves the LSB and adds about 6 dB to the ideal signal-to-quantisation-noise ratio SQNR = 6.02·N + 1.76 dB for a full-scale sine. To reach a resolution r over a span, choose the smallest N with 2ᴺ ≥ span/r.

Step size

1 LSB = 5000/256 = 19.53 mV

Sensitivity at the ADC

10·1 = 10 mV/°C

Temperature resolution

ΔTLSB = 19.53/10 = 1.953 °C

Answer

ΔTLSB = 1.953 °C

The ADC reaches full scale at 500 °C.

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