Number systems
- Place values
- binary 2k, octal 8k, hex 16k
- To decimal
- Σ dk·bk
- From decimal
- divide by the base, read the remainders bottom-up
- Hex ↔ binary
- one hex digit = 4 bits
- Two’s complement
- invert the bits and add 1
Digital Electronics: cram pack
Formula sheets, the key method steps for every topic and 6 practice problems, with full solutions at the back.
1Formulas and methods
Digital logic: gates, K-maps & flip-flops
- Basic gates
- A·B, A + B, A′, (A·B)′, (A + B)′, A ⊕ B
- Boolean rules
- X + X′ = 1, X·X′ = 0, X + XY = X, XY + XY′ = X
- De Morgan
- (X·Y)′ = X′ + Y′, (X + Y)′ = X′·Y′
- Karnaugh map order
- 00, 01, 11, 10 (Gray code)
- Group of 2ᵏ cells
- loses k variables
- 4-to-1 multiplexer
- F = A′B′I0 + A′BI1 + AB′I2 + ABI3
- Flip-flops
- D: Q⁺ = D, T: Q⁺ = T ⊕ Q, JK: Q⁺ = JQ′ + K′Q
- Counters
- n-bit: 2ⁿ states; mod-N: smallest n with 2ⁿ ≥ N; fout = fclk/N
- Ripple counter
- fmax = 1/(n·tpd)
- Ring and Johnson counters
- n and 2n states
Method
- For a circuit, work from the inputs to the output one gate at a time and write the value on every wire, or write its expression and fill in the truth table.
- For simplification, put the 1s (and the don’t-cares as X) into a Karnaugh map with Gray-code rows and columns: 00, 01, 11, 10.
- Cover the 1s with as few and as large groups of 1, 2, 4, 8 or 16 cells as possible, wrapping round the edges; each group is one product term made of the variables that stay constant. Group the 0s for the POS form.
- For flip-flops and counters, read the inputs at each active clock edge, write the state after every edge, and remember that an n-bit counter wraps round after 2ⁿ states.
Data acquisition & sampling
- Nyquist criterion
- fs > 2·fmax, fN = fs/2
- Alias frequency
- fa = |f − k·fs|, k = round(f/fs)
- Step size
- 1 LSB = VFSR/2ᴺ
- Quantisation error (rounding)
- ±½ LSB
- Truncating ADC code
- D = ⌊Vin/LSB⌋
- Bits for a resolution r
- 2ᴺ ≥ span/r
- Ideal SQNR, full-scale sine
- SQNR = 6.02·N + 1.76 dB
- Data rate
- channels × fs × N bit/s
- Multiplexed ADC
- fs = 1/(n·(tc + tset))
- UART
- Tb = 1/baud; 8N1 = 10 bits per byte; bytes/s = baud/bits per frame
- Baud rate divider
- baud = fclk/(16·D)
Method
- Write down what is given: sampling rate, signal frequencies, number of bits, input range, baud rate.
- For sampling questions, compare each frequency with fs/2; a higher frequency appears at fa = |f − k·fs| with the nearest multiple of fs.
- For resolution questions, find 1 LSB = VFSR/2ᴺ, or the smallest N with 2ᴺ ≥ span/resolution.
- For data rates and UART links, count everything that is sent: channels, samples per second, bits or whole bytes per sample, and the start, parity and stop bits of every frame.
2Practice problems
1.Number systemsMedium
Write −105 as an 8-bit two's complement pattern. Read the pattern as an unsigned binary number: what is its value U in decimal?
N = −1058 bit
U =
2.Number systemsHard
A system must give every one of 75 items its own binary code of the same length. What is the smallest number of bits b needed?
75
b = bit
3.Digital logic: gates, K-maps & flip-flopsMedium
Use the Karnaugh map to find the minimal sum-of-products (SOP) form of F(A, B, C, D) = Σm(1, 5, 6, 8, 9, 12). How many literals L does it contain in total (a primed variable counts as one literal)?
F(A, B, C, D) = Σm(1, 5, 6, 8, 9, 12)
L =
4.Digital logic: gates, K-maps & flip-flopsHard
A positive-edge-triggered JK flip-flop starts with Q = 0 and receives the inputs shown at 7 rising clock edges. How many times N does Q change state?
Q₀ = 0JK
N =
5.Data acquisition & samplingMedium
An ADC with an input range of 0 to 1 V must resolve steps of 5 mV or smaller. Find the smallest number of bits N.
VFSR = 1 Vresolution = 5 mV
N =
6.Data acquisition & samplingHard
A 4-channel multiplexer feeds one ADC. Each conversion takes 2.5 µs, and after every channel switch the input needs 1 µs to settle. The channels are scanned in turn without pause. Find the sampling rate fs of each channel, in kHz.
n = 4tc = 2.5 µstset = 1 µs
fs = kHz
3Solutions
1.Number systems
Answer: U = 151
Positional number systems: each digit is worth its value times a power of the base. In binary the places are worth 1, 2, 4, 8, 16, …; in hexadecimal 1, 16, 256, …, with A–F standing for 10–15. In 8-bit two's complement the leftmost bit is worth −128 instead of +128, which is how negative numbers are stored.
Invert and add one
105 = 0110 1001
inverted: 1001 0110
+1 → 1001 0111
Read it as unsigned
1001 0111₂ = 256 − 105 = 151
Answer
U = 151
2.Number systems
Answer: b = 7 bit
Positional number systems: each digit is worth its value times a power of the base. In binary the places are worth 1, 2, 4, 8, 16, …; in hexadecimal 1, 16, 256, …, with A–F standing for 10–15. In 8-bit two's complement the leftmost bit is worth −128 instead of +128, which is how negative numbers are stored.
Powers of two
26 = 64 < 75
27 = 128 ≥ 75
Answer
b = 7
3.Digital logic: gates, K-maps & flip-flops
Answer: L = 13
Karnaugh maps: the cells are ordered in Gray code (00, 01, 11, 10), so neighbouring cells, including the ones across the edges, differ in exactly one variable. Group the 1s in rectangles of 1, 2, 4, 8 or 16 cells, as large as possible and as few as possible, until every 1 is covered. Each group is one product term: the variables that stay constant inside it. A group of 2ᵏ cells loses k variables. Don't-cares (X) may be used to make groups bigger but never have to be covered. Grouping the 0s instead gives the minimal POS form.
Group the 1s
Every group is a rectangle of 2ᵏ cells; edge cells are neighbours of the cells on the opposite edge.
B′C′D
A′C′D
AC′D′
A′BCD′
Minimal SOP form
F = B′C′D + A′C′D + AC′D′ + A′BCD′
L = 13
Answer
L = 13
Another grouping of the same size exists; it has the same number of terms and literals.
4.Digital logic: gates, K-maps & flip-flops
Answer: N = 3
Flip-flops and counters: a flip-flop changes only at the active clock edge. D copies its input (Q⁺ = D); T toggles when T = 1; JK holds for 00, resets for 01, sets for 10 and toggles for 11. An n-bit binary counter has 2ⁿ states and counts modulo 2ⁿ; a mod-N counter goes 0, 1, …, N − 1 and back to 0, and needs the smallest n with 2ⁿ ≥ N flip-flops. Each stage of a ripple counter halves the frequency, so the last output of a mod-N counter runs at fclk/N. A Johnson counter of n flip-flops has 2n states, a ring counter n.
Q after every edge
A JK flip-flop: 00 holds, 01 resets (Q = 0), 10 sets (Q = 1), 11 toggles.
1: J = 1, K = 1 → Q = 1
2: J = 0, K = 0 → Q = 1
3: J = 0, K = 0 → Q = 1
4: J = 1, K = 0 → Q = 1
5: J = 0, K = 0 → Q = 1
6: J = 1, K = 1 → Q = 0
7: J = 1, K = 1 → Q = 1
Count the changes
0 → 1 → 1 → 1 → 1 → 1 → 0 → 1
N = 3
Answer
N = 3
5.Data acquisition & sampling
Answer: N = 8
ADC resolution: an N-bit converter divides its full-scale range VFSR into 2ᴺ codes, from 0 to 2ᴺ − 1. One step is 1 LSB = VFSR/2ᴺ: the smallest change the converter can show. A truncating ADC gives the code ⌊Vin/LSB⌋; a rounding ADC is never more than ½ LSB away from the true value, its quantisation error. Every extra bit halves the LSB and adds about 6 dB to the ideal signal-to-quantisation-noise ratio SQNR = 6.02·N + 1.76 dB for a full-scale sine. To reach a resolution r over a span, choose the smallest N with 2ᴺ ≥ span/r.
Steps needed
1000 mV/5 mV = 200
Bits
log₂(200) = 7.644
27 = 128 < 200 ≤ 28 = 256
N = 8
Answer
N = 8
6.Data acquisition & sampling
Answer: fs = 71.43 kHz
Data rates: every channel delivers fs samples per second of N bits, so the raw rate is channels × fs × N bit/s. In memory a sample takes whole bytes (a 12-bit sample is stored in 2 bytes), so the memory for a recording is channels × fs × bytes per sample × time. A multiplexed ADC converts the channels one after another: each conversion (with settling) takes t, so one round of n channels takes n·t and each channel is sampled at 1/(n·t).
Time per channel
2.5 + 1 = 3.5 µs
Time per scan
4·3.5 = 14 µs
Sampling rate per channel
fs = 1/14 µs = 71.43 kHz
Answer
fs = 71.43 kHz
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