Digital Electronics: cram pack

Formula sheets, the key method steps for every topic and 6 practice problems, with full solutions at the back.

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1Formulas and methods

Number systems

Place values
binary 2k, octal 8k, hex 16k
To decimal
Σ dk·bk
From decimal
divide by the base, read the remainders bottom-up
Hex ↔ binary
one hex digit = 4 bits
Two’s complement
invert the bits and add 1

Digital logic: gates, K-maps & flip-flops

Basic gates
A·B, A + B, A′, (A·B)′, (A + B)′, A ⊕ B
Boolean rules
X + X′ = 1, X·X′ = 0, X + XY = X, XY + XY′ = X
De Morgan
(X·Y)′ = X′ + Y′, (X + Y)′ = X′·Y′
Karnaugh map order
00, 01, 11, 10 (Gray code)
Group of 2ᵏ cells
loses k variables
4-to-1 multiplexer
F = A′B′I0 + A′BI1 + AB′I2 + ABI3
Flip-flops
D: Q⁺ = D, T: Q⁺ = T ⊕ Q, JK: Q⁺ = JQ′ + K′Q
Counters
n-bit: 2ⁿ states; mod-N: smallest n with 2ⁿ ≥ N; fout = fclk/N
Ripple counter
fmax = 1/(n·tpd)
Ring and Johnson counters
n and 2n states

Method

  1. For a circuit, work from the inputs to the output one gate at a time and write the value on every wire, or write its expression and fill in the truth table.
  2. For simplification, put the 1s (and the don’t-cares as X) into a Karnaugh map with Gray-code rows and columns: 00, 01, 11, 10.
  3. Cover the 1s with as few and as large groups of 1, 2, 4, 8 or 16 cells as possible, wrapping round the edges; each group is one product term made of the variables that stay constant. Group the 0s for the POS form.
  4. For flip-flops and counters, read the inputs at each active clock edge, write the state after every edge, and remember that an n-bit counter wraps round after 2ⁿ states.

Data acquisition & sampling

Nyquist criterion
fs > 2·fmax, fN = fs/2
Alias frequency
fa = |f − k·fs|, k = round(f/fs)
Step size
1 LSB = VFSR/2ᴺ
Quantisation error (rounding)
±½ LSB
Truncating ADC code
D = ⌊Vin/LSB⌋
Bits for a resolution r
2ᴺ ≥ span/r
Ideal SQNR, full-scale sine
SQNR = 6.02·N + 1.76 dB
Data rate
channels × fs × N bit/s
Multiplexed ADC
fs = 1/(n·(tc + tset))
UART
Tb = 1/baud; 8N1 = 10 bits per byte; bytes/s = baud/bits per frame
Baud rate divider
baud = fclk/(16·D)

Method

  1. Write down what is given: sampling rate, signal frequencies, number of bits, input range, baud rate.
  2. For sampling questions, compare each frequency with fs/2; a higher frequency appears at fa = |f − k·fs| with the nearest multiple of fs.
  3. For resolution questions, find 1 LSB = VFSR/2ᴺ, or the smallest N with 2ᴺ ≥ span/resolution.
  4. For data rates and UART links, count everything that is sent: channels, samples per second, bits or whole bytes per sample, and the start, parity and stop bits of every frame.

2Practice problems

1.Number systemsMedium
8-bit two's complement0−12806403201608040201

Set the bits so they store −4 in 8-bit two's complement. Read as an unsigned number, what is the pattern's value U?

N = −48 bit
U =
2.Number systemsHard
click the bits to set them012806403201608040201

Set the bits to the 8-bit result of 0011 0111 XOR 1110 0001. What is the result's value R in decimal?

0011 0111XOR1110 0001
R =
3.Digital logic: gates, K-maps & flip-flopsMedium
ABC000111100101324576

Simplify F = AB′ + AB + A′C′ to its minimal sum-of-products form. How many literals L does the simplified expression contain?

F = AB′ + AB + A′C′
L =
4.Digital logic: gates, K-maps & flip-flopsHard
TQ0​Q0​TQ1​Q1​TQ2​Q2​TQ3​Q3​CLKDOWN

A 4-bit binary down counter starts at 4 (decimal, Q = 0100). Which count Q (in decimal) does it show after 47 clock pulses?

Q0 = 447n = 4
Q =
5.Data acquisition & samplingMedium
Vin​N = ?400 °C2ᴺ − 10≤ 0.05 °C

A sensor measures temperature over a span of 400 °C, and its output fills the whole input range of an ADC. The reading must resolve 0.05 °C. Find the smallest number of bits N the ADC needs.

span = 400 °Cresolution = 0.05 °C
N =
6.Data acquisition & samplingHard
f0fs​/2fs​3 kHz7f₁?

A 3 kHz square wave is sampled at 20 kHz with no anti-aliasing filter. A square wave contains the odd harmonics 3f₁, 5f₁, 7f₁, … At which frequency fa does its harmonic 7f₁ appear in the sampled data? Give it in kHz.

f₁ = 3 kHzfs = 20 kHzharmonic: 7f₁
fa = kHz

3Solutions

1.Number systems

Answer: U = 252

Setting bits: each bit is worth a power of two (128, 64, …, 1). One hex digit is exactly four bits, and in 8-bit two's complement the leftmost bit is worth −128. Bitwise operations work on each bit position separately.

Invert and add one

4 = 0000 0100
inverted: 1111 1011
+1 → 1111 1100

Read it as unsigned

1111 1100₂ = 256 − 4 = 252

Answer

U = 252
2.Number systems

Answer: R = 214

Setting bits: each bit is worth a power of two (128, 64, …, 1). One hex digit is exactly four bits, and in 8-bit two's complement the leftmost bit is worth −128. Bitwise operations work on each bit position separately.

Bit by bit

XOR gives 1 where the two bits differ.

0011 0111
XOR 1110 0001
= 1101 0110

Value of the result

1101 0110₂ = 214

Answer

R = 214
3.Digital logic: gates, K-maps & flip-flops

Answer: L = 2

Boolean algebra: the rules that simplify expressions are X + X′ = 1 and X·X′ = 0, X + X = X, absorption X + X·Y = X, the combining rule X·Y + X·Y′ = X, X + X′Y = X + Y and the consensus theorem XY + X′Z + YZ = XY + X′Z. De Morgan's laws turn (X·Y)′ into X′ + Y′ and (X + Y)′ into X′·Y′. A Karnaugh map applies these rules graphically: every group of two neighbouring cells is one use of XY + XY′ = X.

Minterms of the expression

AB′ → m(4, 5)
AB → m(6, 7)
A′C′ → m(0, 2)
ABC00011110011001031214151716

Group and read off

F = C′ + A

Count the literals

L = 2

Answer

L = 2
4.Digital logic: gates, K-maps & flip-flops

Answer: Q = 5

Flip-flops and counters: a flip-flop changes only at the active clock edge. D copies its input (Q⁺ = D); T toggles when T = 1; JK holds for 00, resets for 01, sets for 10 and toggles for 11. An n-bit binary counter has 2ⁿ states and counts modulo 2ⁿ; a mod-N counter goes 0, 1, …, N − 1 and back to 0, and needs the smallest n with 2ⁿ ≥ N flip-flops. Each stage of a ripple counter halves the frequency, so the last output of a mod-N counter runs at fclk/N. A Johnson counter of n flip-flops has 2n states, a ring counter n.

Full cycles

Every 16 pulses bring the counter back to the same state.

47 = 2·16 + 15

Count after the remaining pulses

Q = (4 − 15) mod 16 = 5
Q = 0101₂

Answer

Q = 5
5.Data acquisition & sampling

Answer: N = 13

ADC resolution: an N-bit converter divides its full-scale range VFSR into 2ᴺ codes, from 0 to 2ᴺ − 1. One step is 1 LSB = VFSR/2ᴺ: the smallest change the converter can show. A truncating ADC gives the code ⌊Vin/LSB⌋; a rounding ADC is never more than ½ LSB away from the true value, its quantisation error. Every extra bit halves the LSB and adds about 6 dB to the ideal signal-to-quantisation-noise ratio SQNR = 6.02·N + 1.76 dB for a full-scale sine. To reach a resolution r over a span, choose the smallest N with 2ᴺ ≥ span/r.

Steps needed

400/0.05 = 8000

Bits

log₂(8000) = 12.97
212 = 4096 < 8000 ≤ 213 = 8192
N = 13

Answer

N = 13
6.Data acquisition & sampling

Answer: fa = 1 kHz

Sampling: an ADC measures the signal fs times per second. By the Nyquist–Shannon theorem a frequency f is captured correctly only while f < fs/2, the Nyquist (folding) frequency, so the sampling rate must exceed twice the highest signal frequency. A higher frequency is not lost: it shows up as an alias at fa = |f − k·fs|, with the whole number k that brings the result between 0 and fs/2. The samples cannot tell the two apart, so an analogue anti-aliasing filter must remove everything above fs/2 before the ADC.

Harmonic frequency

7f₁ = 7·3 kHz = 21 kHz

Nearest multiple of the sampling rate

m = round(1.05) = 1

Alias frequency

fa = |21 − 1·20| = 1 kHz

Answer

fa = 1 kHz

The alias lands inside the signal band, where no digital filter can remove it. Only an analogue filter before the ADC helps.

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