Digital Electronics: cram pack

Formula sheets, the key method steps for every topic and 6 practice problems, with full solutions at the back.

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1Formulas and methods

Number systems

Place values
binary 2k, octal 8k, hex 16k
To decimal
Σ dk·bk
From decimal
divide by the base, read the remainders bottom-up
Hex ↔ binary
one hex digit = 4 bits
Two’s complement
invert the bits and add 1

Digital logic: gates, K-maps & flip-flops

Basic gates
A·B, A + B, A′, (A·B)′, (A + B)′, A ⊕ B
Boolean rules
X + X′ = 1, X·X′ = 0, X + XY = X, XY + XY′ = X
De Morgan
(X·Y)′ = X′ + Y′, (X + Y)′ = X′·Y′
Karnaugh map order
00, 01, 11, 10 (Gray code)
Group of 2ᵏ cells
loses k variables
4-to-1 multiplexer
F = A′B′I0 + A′BI1 + AB′I2 + ABI3
Flip-flops
D: Q⁺ = D, T: Q⁺ = T ⊕ Q, JK: Q⁺ = JQ′ + K′Q
Counters
n-bit: 2ⁿ states; mod-N: smallest n with 2ⁿ ≥ N; fout = fclk/N
Ripple counter
fmax = 1/(n·tpd)
Ring and Johnson counters
n and 2n states

Method

  1. For a circuit, work from the inputs to the output one gate at a time and write the value on every wire, or write its expression and fill in the truth table.
  2. For simplification, put the 1s (and the don’t-cares as X) into a Karnaugh map with Gray-code rows and columns: 00, 01, 11, 10.
  3. Cover the 1s with as few and as large groups of 1, 2, 4, 8 or 16 cells as possible, wrapping round the edges; each group is one product term made of the variables that stay constant. Group the 0s for the POS form.
  4. For flip-flops and counters, read the inputs at each active clock edge, write the state after every edge, and remember that an n-bit counter wraps round after 2ⁿ states.

Data acquisition & sampling

Nyquist criterion
fs > 2·fmax, fN = fs/2
Alias frequency
fa = |f − k·fs|, k = round(f/fs)
Step size
1 LSB = VFSR/2ᴺ
Quantisation error (rounding)
±½ LSB
Truncating ADC code
D = ⌊Vin/LSB⌋
Bits for a resolution r
2ᴺ ≥ span/r
Ideal SQNR, full-scale sine
SQNR = 6.02·N + 1.76 dB
Data rate
channels × fs × N bit/s
Multiplexed ADC
fs = 1/(n·(tc + tset))
UART
Tb = 1/baud; 8N1 = 10 bits per byte; bytes/s = baud/bits per frame
Baud rate divider
baud = fclk/(16·D)

Method

  1. Write down what is given: sampling rate, signal frequencies, number of bits, input range, baud rate.
  2. For sampling questions, compare each frequency with fs/2; a higher frequency appears at fa = |f − k·fs| with the nearest multiple of fs.
  3. For resolution questions, find 1 LSB = VFSR/2ᴺ, or the smallest N with 2ᴺ ≥ span/resolution.
  4. For data rates and UART links, count everything that is sent: channels, samples per second, bits or whole bytes per sample, and the start, parity and stop bits of every frame.

2Practice problems

1.Number systemsMedium
place values in two's complement1−12816403211608140201

The 8-bit pattern 1101 0100 stores a signed integer in two's complement. What is its value N in decimal?

1101 01008 bit
N =
2.Number systemsHard
20-bit two's complement, N = ??sign???????????????????

What is the most negative integer N that can be stored in 20-bit two's complement?

20 bit
N =
3.Digital logic: gates, K-maps & flip-flopsMedium
ABC000111100101324576

Simplify F = ABC′ + A′C′ + A′B′ to its minimal sum-of-products form. How many literals L does the simplified expression contain?

F = ABC′ + A′C′ + A′B′
L =
4.Digital logic: gates, K-maps & flip-flopsHard
CLKD123456

A positive-edge-triggered D flip-flop starts with Q = 0 and receives the inputs shown. Click the first clock edge at which Q goes from 1 back to 0.

Q₀ = 0D
  1. 1clock edge 1
  2. 2clock edge 2
  3. 3clock edge 3
  4. 4clock edge 4
  5. 5clock edge 5
  6. 6clock edge 6
5.Data acquisition & samplingMedium
tTs​ = 1/fs​f = 3.6 kHzfs​ = 4 kHz

A 3.6 kHz sine wave is sampled at 4 kHz without an anti-aliasing filter. At which frequency fa does it appear in the samples? Give it in Hz.

f = 3.6 kHzfs = 4 kHz
fa = Hz
6.Data acquisition & samplingHard
T20 mV/°C×4∿01N = 8, 2.5 V? °C/LSB

A temperature sensor gives 20 mV/°C (0 V at 0 °C). Its signal is amplified 4 times and fed to an 8-bit ADC with a range of 0 to 2.5 V (1 LSB = VFSR/2ᴺ). Find the temperature change ΔTLSB that corresponds to one LSB.

S = 20 mV/°CG = 4N = 8VFSR = 2.5 V
ΔTLSB = °C

3Solutions

1.Number systems

Answer: N = −44

Positional number systems: each digit is worth its value times a power of the base. In binary the places are worth 1, 2, 4, 8, 16, …; in hexadecimal 1, 16, 256, …, with A–F standing for 10–15. In 8-bit two's complement the leftmost bit is worth −128 instead of +128, which is how negative numbers are stored.

Add the place values

The other bits keep their normal positive values.

−128 + 64 + 16 + 4 = −44

Answer

N = −44
2.Number systems

Answer: N = −524288

Positional number systems: each digit is worth its value times a power of the base. In binary the places are worth 1, 2, 4, 8, 16, …; in hexadecimal 1, 16, 256, …, with A–F standing for 10–15. In 8-bit two's complement the leftmost bit is worth −128 instead of +128, which is how negative numbers are stored.

Most negative value

−219 = −524288

Answer

N = −524288
3.Digital logic: gates, K-maps & flip-flops

Answer: L = 4

Boolean algebra: the rules that simplify expressions are X + X′ = 1 and X·X′ = 0, X + X = X, absorption X + X·Y = X, the combining rule X·Y + X·Y′ = X, X + X′Y = X + Y and the consensus theorem XY + X′Z + YZ = XY + X′Z. De Morgan's laws turn (X·Y)′ into X′ + Y′ and (X + Y)′ into X′·Y′. A Karnaugh map applies these rules graphically: every group of two neighbouring cells is one use of XY + XY′ = X.

Minterms of the expression

ABC′ → m(6)
A′C′ → m(0, 2)
A′B′ → m(0, 1)
ABC00011110011011031204050716

Group and read off

F = BC′ + A′B′

Count the literals

L = 4

Answer

L = 4
4.Digital logic: gates, K-maps & flip-flops

Answer: clock edge 5

Flip-flops and counters: a flip-flop changes only at the active clock edge. D copies its input (Q⁺ = D); T toggles when T = 1; JK holds for 00, resets for 01, sets for 10 and toggles for 11. An n-bit binary counter has 2ⁿ states and counts modulo 2ⁿ; a mod-N counter goes 0, 1, …, N − 1 and back to 0, and needs the smallest n with 2ⁿ ≥ N flip-flops. Each stage of a ripple counter halves the frequency, so the last output of a mod-N counter runs at fclk/N. A Johnson counter of n flip-flops has 2n states, a ring counter n.

Q after every edge

A D flip-flop copies D at each rising edge: Q⁺ = D.

1: D = 1 → Q = 1
2: D = 1 → Q = 1
3: D = 1 → Q = 1
4: D = 1 → Q = 1
5: D = 0 → Q = 0
6: D = 0 → Q = 0

First change from 1 to 0

clock edge 5

Answer

clock edge 5
5.Data acquisition & sampling

Answer: fa = 400 Hz

Sampling: an ADC measures the signal fs times per second. By the Nyquist–Shannon theorem a frequency f is captured correctly only while f < fs/2, the Nyquist (folding) frequency, so the sampling rate must exceed twice the highest signal frequency. A higher frequency is not lost: it shows up as an alias at fa = |f − k·fs|, with the whole number k that brings the result between 0 and fs/2. The samples cannot tell the two apart, so an analogue anti-aliasing filter must remove everything above fs/2 before the ADC.

Nyquist frequency

fs/2 = 2 kHz < f = 3.6 kHz

Nearest multiple of the sampling rate

k = round(3600/4000) = 1

Alias frequency

fa = |3600 − 1·4000| = 400 Hz

Answer

fa = 400 Hz

The dashed curve in the figure is the alias: it passes through exactly the same samples.

6.Data acquisition & sampling

Answer: ΔTLSB = 0.1221 °C

ADC resolution: an N-bit converter divides its full-scale range VFSR into 2ᴺ codes, from 0 to 2ᴺ − 1. One step is 1 LSB = VFSR/2ᴺ: the smallest change the converter can show. A truncating ADC gives the code ⌊Vin/LSB⌋; a rounding ADC is never more than ½ LSB away from the true value, its quantisation error. Every extra bit halves the LSB and adds about 6 dB to the ideal signal-to-quantisation-noise ratio SQNR = 6.02·N + 1.76 dB for a full-scale sine. To reach a resolution r over a span, choose the smallest N with 2ᴺ ≥ span/r.

Step size

1 LSB = 2500/256 = 9.766 mV

Sensitivity at the ADC

20·4 = 80 mV/°C

Temperature resolution

ΔTLSB = 9.766/80 = 0.1221 °C

Answer

ΔTLSB = 0.1221 °C

The ADC reaches full scale at 31.25 °C.

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