Digital Electronics: cram pack

Formula sheets, the key method steps for every topic and 6 practice problems, with full solutions at the back.

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1Formulas and methods

Number systems

Place values
binary 2k, octal 8k, hex 16k
To decimal
Σ dk·bk
From decimal
divide by the base, read the remainders bottom-up
Hex ↔ binary
one hex digit = 4 bits
Two’s complement
invert the bits and add 1

Digital logic: gates, K-maps & flip-flops

Basic gates
A·B, A + B, A′, (A·B)′, (A + B)′, A ⊕ B
Boolean rules
X + X′ = 1, X·X′ = 0, X + XY = X, XY + XY′ = X
De Morgan
(X·Y)′ = X′ + Y′, (X + Y)′ = X′·Y′
Karnaugh map order
00, 01, 11, 10 (Gray code)
Group of 2ᵏ cells
loses k variables
4-to-1 multiplexer
F = A′B′I0 + A′BI1 + AB′I2 + ABI3
Flip-flops
D: Q⁺ = D, T: Q⁺ = T ⊕ Q, JK: Q⁺ = JQ′ + K′Q
Counters
n-bit: 2ⁿ states; mod-N: smallest n with 2ⁿ ≥ N; fout = fclk/N
Ripple counter
fmax = 1/(n·tpd)
Ring and Johnson counters
n and 2n states

Method

  1. For a circuit, work from the inputs to the output one gate at a time and write the value on every wire, or write its expression and fill in the truth table.
  2. For simplification, put the 1s (and the don’t-cares as X) into a Karnaugh map with Gray-code rows and columns: 00, 01, 11, 10.
  3. Cover the 1s with as few and as large groups of 1, 2, 4, 8 or 16 cells as possible, wrapping round the edges; each group is one product term made of the variables that stay constant. Group the 0s for the POS form.
  4. For flip-flops and counters, read the inputs at each active clock edge, write the state after every edge, and remember that an n-bit counter wraps round after 2ⁿ states.

Data acquisition & sampling

Nyquist criterion
fs > 2·fmax, fN = fs/2
Alias frequency
fa = |f − k·fs|, k = round(f/fs)
Step size
1 LSB = VFSR/2ᴺ
Quantisation error (rounding)
±½ LSB
Truncating ADC code
D = ⌊Vin/LSB⌋
Bits for a resolution r
2ᴺ ≥ span/r
Ideal SQNR, full-scale sine
SQNR = 6.02·N + 1.76 dB
Data rate
channels × fs × N bit/s
Multiplexed ADC
fs = 1/(n·(tc + tset))
UART
Tb = 1/baud; 8N1 = 10 bits per byte; bytes/s = baud/bits per frame
Baud rate divider
baud = fclk/(16·D)

Method

  1. Write down what is given: sampling rate, signal frequencies, number of bits, input range, baud rate.
  2. For sampling questions, compare each frequency with fs/2; a higher frequency appears at fa = |f − k·fs| with the nearest multiple of fs.
  3. For resolution questions, find 1 LSB = VFSR/2ᴺ, or the smallest N with 2ᴺ ≥ span/resolution.
  4. For data rates and UART links, count everything that is sent: channels, samples per second, bits or whole bytes per sample, and the start, parity and stop bits of every frame.

2Practice problems

1.Number systemsMedium
place values in two's complement1−12806403201608041211

The 8-bit pattern 1000 0011 stores a signed integer in two's complement. What is its value N in decimal?

1000 00118 bit
N =
2.Number systemsHard
click the bits to set them012806403201608040201

Set the bits to the 8-bit result of 1101 1000 OR 1000 0101. What is the result's value R in decimal?

1101 1000OR1000 0101
R =
3.Digital logic: gates, K-maps & flip-flopsMedium
MUX1I0​CI1​1I2​1I3​ABS1​S0​F

A 4-to-1 multiplexer has its select inputs S₁ = A and S₀ = B, and its data inputs tied to I₀ = 1, I₁ = C, I₂ = 1, I₃ = 1. For how many of the 8 combinations of A, B and C is the output F = 1? Find N.

I₀ = 1I₁ = CI₂ = 1I₃ = 1
N =
4.Digital logic: gates, K-maps & flip-flopsHard
CLKT12345678

A positive-edge-triggered T flip-flop starts with Q = 0 and receives the inputs shown. Click the first clock edge at which Q goes from 1 back to 0.

Q₀ = 0T
  1. 1clock edge 1
  2. 2clock edge 2
  3. 3clock edge 3
  4. 4clock edge 4
  5. 5clock edge 5
  6. 6clock edge 6
  7. 7clock edge 7
  8. 8clock edge 8
5.Data acquisition & samplingMedium
SD0​D1​D2​D3​D4​D5​D6​D7​PTb​11·Tb​9600 Bd, 8E1

A UART sends bytes at 9600 baud in the format 8E1: 8 data bits, an even parity bit and 1 stop bit(s), plus the start bit. Find the largest number of data bytes per second it can transfer.

baud = 9600 Bd8E1
RB = B/s
6.Data acquisition & samplingHard
T10 mV/°C×2.5∿01N = 10, 2.5 V? °C/LSB

A temperature sensor gives 10 mV/°C (0 V at 0 °C). Its signal is amplified 2.5 times and fed to a 10-bit ADC with a range of 0 to 2.5 V (1 LSB = VFSR/2ᴺ). Find the temperature change ΔTLSB that corresponds to one LSB.

S = 10 mV/°CG = 2.5N = 10VFSR = 2.5 V
ΔTLSB = °C

3Solutions

1.Number systems

Answer: N = −125

Positional number systems: each digit is worth its value times a power of the base. In binary the places are worth 1, 2, 4, 8, 16, …; in hexadecimal 1, 16, 256, …, with A–F standing for 10–15. In 8-bit two's complement the leftmost bit is worth −128 instead of +128, which is how negative numbers are stored.

Add the place values

The other bits keep their normal positive values.

−128 + 2 + 1 = −125

Answer

N = −125
2.Number systems

Answer: R = 221

Setting bits: each bit is worth a power of two (128, 64, …, 1). One hex digit is exactly four bits, and in 8-bit two's complement the leftmost bit is worth −128. Bitwise operations work on each bit position separately.

Bit by bit

OR gives 1 where at least one bit is 1.

1101 1000
OR 1000 0101
= 1101 1101

Value of the result

1101 1101₂ = 221

Answer

R = 221
3.Digital logic: gates, K-maps & flip-flops

Answer: N = 7

Multiplexer: a 2ⁿ-to-1 multiplexer passes one of its data inputs to the output; the select lines, read as a binary number, pick which one. For a 4-to-1 MUX with selects S₁S₀ = AB, F = A′B′·I₀ + A′B·I₁ + AB′·I₂ + AB·I₃. Tying the data inputs to 0, 1, C or C′ makes the MUX produce any function of A, B and C, which is a common way to build logic with one chip.

Output expression

F = A′B′ + A′BC + AB′ + AB

Rows with F = 1

ABC = 000, 001, 011, 100, 101, 110, 111
N = 7

Answer

N = 7
4.Digital logic: gates, K-maps & flip-flops

Answer: clock edge 3

Flip-flops and counters: a flip-flop changes only at the active clock edge. D copies its input (Q⁺ = D); T toggles when T = 1; JK holds for 00, resets for 01, sets for 10 and toggles for 11. An n-bit binary counter has 2ⁿ states and counts modulo 2ⁿ; a mod-N counter goes 0, 1, …, N − 1 and back to 0, and needs the smallest n with 2ⁿ ≥ N flip-flops. Each stage of a ripple counter halves the frequency, so the last output of a mod-N counter runs at fclk/N. A Johnson counter of n flip-flops has 2n states, a ring counter n.

Q after every edge

A T flip-flop toggles at each rising edge with T = 1 and holds with T = 0.

1: T = 1 → Q = 1
2: T = 0 → Q = 1
3: T = 1 → Q = 0
4: T = 0 → Q = 0
5: T = 1 → Q = 1
6: T = 1 → Q = 0
7: T = 0 → Q = 0
8: T = 0 → Q = 0

First change from 1 to 0

clock edge 3

Answer

clock edge 3
5.Data acquisition & sampling

Answer: RB = 872.7 B/s

UART: an asynchronous serial link sends each byte as a frame: one start bit (low), the data bits, an optional parity bit and one or two stop bits (high). The baud rate is the number of bits per second, so one bit lasts Tb = 1/baud and a frame of n bits lasts n/baud. The common 8N1 format has 10 bits per byte. The baud generator divides the clock: baud = fclk/(16·D) with a whole number D, so the real baud rate differs slightly from the target; an error below about 2 % is usually acceptable.

Bits per frame

1 + 8 + 1 + 1 = 11

Byte rate

9600/11 = 872.7 B/s

Answer

RB = 872.7 B/s
6.Data acquisition & sampling

Answer: ΔTLSB = 0.09766 °C

ADC resolution: an N-bit converter divides its full-scale range VFSR into 2ᴺ codes, from 0 to 2ᴺ − 1. One step is 1 LSB = VFSR/2ᴺ: the smallest change the converter can show. A truncating ADC gives the code ⌊Vin/LSB⌋; a rounding ADC is never more than ½ LSB away from the true value, its quantisation error. Every extra bit halves the LSB and adds about 6 dB to the ideal signal-to-quantisation-noise ratio SQNR = 6.02·N + 1.76 dB for a full-scale sine. To reach a resolution r over a span, choose the smallest N with 2ᴺ ≥ span/r.

Step size

1 LSB = 2500/1024 = 2.441 mV

Sensitivity at the ADC

10·2.5 = 25 mV/°C

Temperature resolution

ΔTLSB = 2.441/25 = 0.09766 °C

Answer

ΔTLSB = 0.09766 °C

The ADC reaches full scale at 100 °C.

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