Digital Electronics: cram pack

Formula sheets, the key method steps for every topic and 6 practice problems, with full solutions at the back.

New problemsBack to the course

In the print window, choose “Save as PDF” to keep a copy on your device.

1Formulas and methods

Number systems

Place values
binary 2k, octal 8k, hex 16k
To decimal
Σ dk·bk
From decimal
divide by the base, read the remainders bottom-up
Hex ↔ binary
one hex digit = 4 bits
Two’s complement
invert the bits and add 1

Digital logic: gates, K-maps & flip-flops

Basic gates
A·B, A + B, A′, (A·B)′, (A + B)′, A ⊕ B
Boolean rules
X + X′ = 1, X·X′ = 0, X + XY = X, XY + XY′ = X
De Morgan
(X·Y)′ = X′ + Y′, (X + Y)′ = X′·Y′
Karnaugh map order
00, 01, 11, 10 (Gray code)
Group of 2ᵏ cells
loses k variables
4-to-1 multiplexer
F = A′B′I0 + A′BI1 + AB′I2 + ABI3
Flip-flops
D: Q⁺ = D, T: Q⁺ = T ⊕ Q, JK: Q⁺ = JQ′ + K′Q
Counters
n-bit: 2ⁿ states; mod-N: smallest n with 2ⁿ ≥ N; fout = fclk/N
Ripple counter
fmax = 1/(n·tpd)
Ring and Johnson counters
n and 2n states

Method

  1. For a circuit, work from the inputs to the output one gate at a time and write the value on every wire, or write its expression and fill in the truth table.
  2. For simplification, put the 1s (and the don’t-cares as X) into a Karnaugh map with Gray-code rows and columns: 00, 01, 11, 10.
  3. Cover the 1s with as few and as large groups of 1, 2, 4, 8 or 16 cells as possible, wrapping round the edges; each group is one product term made of the variables that stay constant. Group the 0s for the POS form.
  4. For flip-flops and counters, read the inputs at each active clock edge, write the state after every edge, and remember that an n-bit counter wraps round after 2ⁿ states.

Data acquisition & sampling

Nyquist criterion
fs > 2·fmax, fN = fs/2
Alias frequency
fa = |f − k·fs|, k = round(f/fs)
Step size
1 LSB = VFSR/2ᴺ
Quantisation error (rounding)
±½ LSB
Truncating ADC code
D = ⌊Vin/LSB⌋
Bits for a resolution r
2ᴺ ≥ span/r
Ideal SQNR, full-scale sine
SQNR = 6.02·N + 1.76 dB
Data rate
channels × fs × N bit/s
Multiplexed ADC
fs = 1/(n·(tc + tset))
UART
Tb = 1/baud; 8N1 = 10 bits per byte; bytes/s = baud/bits per frame
Baud rate divider
baud = fclk/(16·D)

Method

  1. Write down what is given: sampling rate, signal frequencies, number of bits, input range, baud rate.
  2. For sampling questions, compare each frequency with fs/2; a higher frequency appears at fa = |f − k·fs| with the nearest multiple of fs.
  3. For resolution questions, find 1 LSB = VFSR/2ᴺ, or the smallest N with 2ᴺ ≥ span/resolution.
  4. For data rates and UART links, count everything that is sent: channels, samples per second, bits or whole bytes per sample, and the start, parity and stop bits of every frame.

2Practice problems

1.Number systemsMedium
8-bit two's complement0−12806403201608040201

Set the bits so they store −38 in 8-bit two's complement. Read as an unsigned number, what is the pattern's value U?

N = −388 bit
U =
2.Number systemsHard
click the bits to set them012806403201608040201

Set the bits to the 8-bit result of 0010 0010 XOR 0011 0001. What is the result's value R in decimal?

0010 0010XOR0011 0001
R =
3.Digital logic: gates, K-maps & flip-flopsMedium
ABC000111100101324576

Simplify F = BC′ + A′C′ + A′B′C′ to its minimal sum-of-products form. How many literals L does the simplified expression contain?

F = BC′ + A′C′ + A′B′C′
L =
4.Digital logic: gates, K-maps & flip-flopsHard
TQ0​Q0​TQ1​Q1​TQ2​Q2​CLKMOD-7

A synchronous mod-7 counter counts 0, 1, …, 6 and then returns to 0. It starts at 1. Which count Q (in decimal) does it show after 24 clock pulses?

Q0 = 124N = 7
Q =
5.Data acquisition & samplingMedium
tTs​ = 1/fs​f = 7.2 kHzfs​ = 4 kHz

A 7.2 kHz sine wave is sampled at 4 kHz without an anti-aliasing filter. At which frequency fa does it appear in the samples? Give it in Hz.

f = 7.2 kHzfs = 4 kHz
fa = Hz
6.Data acquisition & samplingHard
Vin​N = ?VFSR​2ᴺ − 101 LSB

An audio measurement needs an ideal signal-to-quantisation-noise ratio of at least 75 dB for a full-scale sine wave. Find the smallest number of ADC bits N.

SQNR ≥ 75 dB
N =

3Solutions

1.Number systems

Answer: U = 218

Setting bits: each bit is worth a power of two (128, 64, …, 1). One hex digit is exactly four bits, and in 8-bit two's complement the leftmost bit is worth −128. Bitwise operations work on each bit position separately.

Invert and add one

38 = 0010 0110
inverted: 1101 1001
+1 → 1101 1010

Read it as unsigned

1101 1010₂ = 256 − 38 = 218

Answer

U = 218
2.Number systems

Answer: R = 19

Setting bits: each bit is worth a power of two (128, 64, …, 1). One hex digit is exactly four bits, and in 8-bit two's complement the leftmost bit is worth −128. Bitwise operations work on each bit position separately.

Bit by bit

XOR gives 1 where the two bits differ.

0010 0010
XOR 0011 0001
= 0001 0011

Value of the result

0001 0011₂ = 19

Answer

R = 19
3.Digital logic: gates, K-maps & flip-flops

Answer: L = 4

Boolean algebra: the rules that simplify expressions are X + X′ = 1 and X·X′ = 0, X + X = X, absorption X + X·Y = X, the combining rule X·Y + X·Y′ = X, X + X′Y = X + Y and the consensus theorem XY + X′Z + YZ = XY + X′Z. De Morgan's laws turn (X·Y)′ into X′ + Y′ and (X + Y)′ into X′·Y′. A Karnaugh map applies these rules graphically: every group of two neighbouring cells is one use of XY + XY′ = X.

Minterms of the expression

BC′ → m(2, 6)
A′C′ → m(0, 2)
A′B′C′ → m(0)
ABC00011110011001031204050716

Group and read off

F = BC′ + A′C′

Count the literals

L = 4

Answer

L = 4
4.Digital logic: gates, K-maps & flip-flops

Answer: Q = 4

Flip-flops and counters: a flip-flop changes only at the active clock edge. D copies its input (Q⁺ = D); T toggles when T = 1; JK holds for 00, resets for 01, sets for 10 and toggles for 11. An n-bit binary counter has 2ⁿ states and counts modulo 2ⁿ; a mod-N counter goes 0, 1, …, N − 1 and back to 0, and needs the smallest n with 2ⁿ ≥ N flip-flops. Each stage of a ripple counter halves the frequency, so the last output of a mod-N counter runs at fclk/N. A Johnson counter of n flip-flops has 2n states, a ring counter n.

Full cycles

Every 7 pulses bring the counter back to the same state.

24 = 3·7 + 3

Count after the remaining pulses

Q = (1 + 3) mod 7 = 4
Q = 100₂

Answer

Q = 4
5.Data acquisition & sampling

Answer: fa = 800 Hz

Sampling: an ADC measures the signal fs times per second. By the Nyquist–Shannon theorem a frequency f is captured correctly only while f < fs/2, the Nyquist (folding) frequency, so the sampling rate must exceed twice the highest signal frequency. A higher frequency is not lost: it shows up as an alias at fa = |f − k·fs|, with the whole number k that brings the result between 0 and fs/2. The samples cannot tell the two apart, so an analogue anti-aliasing filter must remove everything above fs/2 before the ADC.

Nyquist frequency

fs/2 = 2 kHz < f = 7.2 kHz

Nearest multiple of the sampling rate

k = round(7200/4000) = 2

Alias frequency

fa = |7200 − 2·4000| = 800 Hz

Answer

fa = 800 Hz

The dashed curve in the figure is the alias: it passes through exactly the same samples.

6.Data acquisition & sampling

Answer: N = 13

ADC resolution: an N-bit converter divides its full-scale range VFSR into 2ᴺ codes, from 0 to 2ᴺ − 1. One step is 1 LSB = VFSR/2ᴺ: the smallest change the converter can show. A truncating ADC gives the code ⌊Vin/LSB⌋; a rounding ADC is never more than ½ LSB away from the true value, its quantisation error. Every extra bit halves the LSB and adds about 6 dB to the ideal signal-to-quantisation-noise ratio SQNR = 6.02·N + 1.76 dB for a full-scale sine. To reach a resolution r over a span, choose the smallest N with 2ᴺ ≥ span/r.

Solve for N

N ≥ (75 − 1.76)/6.02 = 12.17

Round up

N = 13
check: 6.02·13 + 1.76 = 80.02 dB ≥ 75 dB

Answer

N = 13

ExamProblems · examproblems.com/courses/digital-electronics