Number systems
- Place values
- binary 2k, octal 8k, hex 16k
- To decimal
- Σ dk·bk
- From decimal
- divide by the base, read the remainders bottom-up
- Hex ↔ binary
- one hex digit = 4 bits
- Two’s complement
- invert the bits and add 1
Digital Electronics: cram pack
Formula sheets, the key method steps for every topic and 6 practice problems, with full solutions at the back.
1Formulas and methods
Digital logic: gates, K-maps & flip-flops
- Basic gates
- A·B, A + B, A′, (A·B)′, (A + B)′, A ⊕ B
- Boolean rules
- X + X′ = 1, X·X′ = 0, X + XY = X, XY + XY′ = X
- De Morgan
- (X·Y)′ = X′ + Y′, (X + Y)′ = X′·Y′
- Karnaugh map order
- 00, 01, 11, 10 (Gray code)
- Group of 2ᵏ cells
- loses k variables
- 4-to-1 multiplexer
- F = A′B′I0 + A′BI1 + AB′I2 + ABI3
- Flip-flops
- D: Q⁺ = D, T: Q⁺ = T ⊕ Q, JK: Q⁺ = JQ′ + K′Q
- Counters
- n-bit: 2ⁿ states; mod-N: smallest n with 2ⁿ ≥ N; fout = fclk/N
- Ripple counter
- fmax = 1/(n·tpd)
- Ring and Johnson counters
- n and 2n states
Method
- For a circuit, work from the inputs to the output one gate at a time and write the value on every wire, or write its expression and fill in the truth table.
- For simplification, put the 1s (and the don’t-cares as X) into a Karnaugh map with Gray-code rows and columns: 00, 01, 11, 10.
- Cover the 1s with as few and as large groups of 1, 2, 4, 8 or 16 cells as possible, wrapping round the edges; each group is one product term made of the variables that stay constant. Group the 0s for the POS form.
- For flip-flops and counters, read the inputs at each active clock edge, write the state after every edge, and remember that an n-bit counter wraps round after 2ⁿ states.
Data acquisition & sampling
- Nyquist criterion
- fs > 2·fmax, fN = fs/2
- Alias frequency
- fa = |f − k·fs|, k = round(f/fs)
- Step size
- 1 LSB = VFSR/2ᴺ
- Quantisation error (rounding)
- ±½ LSB
- Truncating ADC code
- D = ⌊Vin/LSB⌋
- Bits for a resolution r
- 2ᴺ ≥ span/r
- Ideal SQNR, full-scale sine
- SQNR = 6.02·N + 1.76 dB
- Data rate
- channels × fs × N bit/s
- Multiplexed ADC
- fs = 1/(n·(tc + tset))
- UART
- Tb = 1/baud; 8N1 = 10 bits per byte; bytes/s = baud/bits per frame
- Baud rate divider
- baud = fclk/(16·D)
Method
- Write down what is given: sampling rate, signal frequencies, number of bits, input range, baud rate.
- For sampling questions, compare each frequency with fs/2; a higher frequency appears at fa = |f − k·fs| with the nearest multiple of fs.
- For resolution questions, find 1 LSB = VFSR/2ᴺ, or the smallest N with 2ᴺ ≥ span/resolution.
- For data rates and UART links, count everything that is sent: channels, samples per second, bits or whole bytes per sample, and the start, parity and stop bits of every frame.
2Practice problems
1.Number systemsMedium
Write −84 as an 8-bit two's complement pattern. Read the pattern as an unsigned binary number: what is its value U in decimal?
N = −848 bit
U =
2.Number systemsHard
Set the bits to the 8-bit result of 1110 1001 >> 2. What is the result's value R in decimal?
1110 1001>> 2
R =
3.Digital logic: gates, K-maps & flip-flopsMedium
A 4-to-1 multiplexer has its select inputs S₁ = A and S₀ = B, and its data inputs tied to I₀ = 1, I₁ = 1, I₂ = 0, I₃ = 1. For how many of the 8 combinations of A, B and C is the output F = 1? Find N.
I₀ = 1I₁ = 1I₂ = 0I₃ = 1
N =
4.Digital logic: gates, K-maps & flip-flopsHard
A positive-edge-triggered D flip-flop starts with Q = 0 and receives the inputs shown at 8 rising clock edges. How many times N does Q change state?
Q₀ = 0D
N =
5.Data acquisition & samplingMedium
A UART sends bytes at 4800 baud in the format 8E2: 8 data bits, an even parity bit and 2 stop bit(s), plus the start bit. Find the largest number of data bytes per second it can transfer.
baud = 4800 Bd8E2
RB = B/s
6.Data acquisition & samplingHard
A 24-bit ADC streams every sample over a UART at 460800 baud, format 8N1 (start bit, 8 data bits, 1 stop bit). Each sample is sent as 3 whole byte(s) and the link is busy all the time. Find the highest signal frequency fmax that can be sampled without aliasing, in Hz.
baud = 460800 BdN = 248N1
fmax = Hz
3Solutions
1.Number systems
Answer: U = 172
Positional number systems: each digit is worth its value times a power of the base. In binary the places are worth 1, 2, 4, 8, 16, …; in hexadecimal 1, 16, 256, …, with A–F standing for 10–15. In 8-bit two's complement the leftmost bit is worth −128 instead of +128, which is how negative numbers are stored.
Invert and add one
84 = 0101 0100
inverted: 1010 1011
+1 → 1010 1100
Read it as unsigned
1010 1100₂ = 256 − 84 = 172
Answer
U = 172
2.Number systems
Answer: R = 58
Setting bits: each bit is worth a power of two (128, 64, …, 1). One hex digit is exactly four bits, and in 8-bit two's complement the leftmost bit is worth −128. Bitwise operations work on each bit position separately.
Bit by bit
Shifting right by 2 moves every bit 2 places to the right; bits that fall off the right end are lost and zeros come in on the left.
1110 1001 >> 2
= 0011 1010
Value of the result
0011 1010₂ = 58
Answer
R = 58
3.Digital logic: gates, K-maps & flip-flops
Answer: N = 6
Multiplexer: a 2ⁿ-to-1 multiplexer passes one of its data inputs to the output; the select lines, read as a binary number, pick which one. For a 4-to-1 MUX with selects S₁S₀ = AB, F = A′B′·I₀ + A′B·I₁ + AB′·I₂ + AB·I₃. Tying the data inputs to 0, 1, C or C′ makes the MUX produce any function of A, B and C, which is a common way to build logic with one chip.
Output expression
F = A′B′ + A′B + AB
Rows with F = 1
ABC = 000, 001, 010, 011, 110, 111
N = 6
Answer
N = 6
4.Digital logic: gates, K-maps & flip-flops
Answer: N = 2
Flip-flops and counters: a flip-flop changes only at the active clock edge. D copies its input (Q⁺ = D); T toggles when T = 1; JK holds for 00, resets for 01, sets for 10 and toggles for 11. An n-bit binary counter has 2ⁿ states and counts modulo 2ⁿ; a mod-N counter goes 0, 1, …, N − 1 and back to 0, and needs the smallest n with 2ⁿ ≥ N flip-flops. Each stage of a ripple counter halves the frequency, so the last output of a mod-N counter runs at fclk/N. A Johnson counter of n flip-flops has 2n states, a ring counter n.
Q after every edge
A D flip-flop copies D at each rising edge: Q⁺ = D.
1: D = 0 → Q = 0
2: D = 0 → Q = 0
3: D = 1 → Q = 1
4: D = 1 → Q = 1
5: D = 1 → Q = 1
6: D = 0 → Q = 0
7: D = 0 → Q = 0
8: D = 0 → Q = 0
Count the changes
0 → 0 → 0 → 1 → 1 → 1 → 0 → 0 → 0
N = 2
Answer
N = 2
5.Data acquisition & sampling
Answer: RB = 400 B/s
UART: an asynchronous serial link sends each byte as a frame: one start bit (low), the data bits, an optional parity bit and one or two stop bits (high). The baud rate is the number of bits per second, so one bit lasts Tb = 1/baud and a frame of n bits lasts n/baud. The common 8N1 format has 10 bits per byte. The baud generator divides the clock: baud = fclk/(16·D) with a whole number D, so the real baud rate differs slightly from the target; an error below about 2 % is usually acceptable.
Bits per frame
1 + 8 + 1 + 2 = 12
Byte rate
4800/12 = 400 B/s
Answer
RB = 400 B/s
6.Data acquisition & sampling
Answer: fmax = 7680 Hz
UART: an asynchronous serial link sends each byte as a frame: one start bit (low), the data bits, an optional parity bit and one or two stop bits (high). The baud rate is the number of bits per second, so one bit lasts Tb = 1/baud and a frame of n bits lasts n/baud. The common 8N1 format has 10 bits per byte. The baud generator divides the clock: baud = fclk/(16·D) with a whole number D, so the real baud rate differs slightly from the target; an error below about 2 % is usually acceptable.
Bits per sample on the line
3·10 = 30 bit
Highest sampling rate
fs,max = 460800/30 = 15360 Hz
Nyquist limit
fmax = 15360/2 = 7680 Hz
Answer
fmax = 7680 Hz
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