Digital Electronics: cram pack

Formula sheets, the key method steps for every topic and 6 practice problems, with full solutions at the back.

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1Formulas and methods

Number systems

Place values: binary 2^k, octal 8^k, hex 16^k
To decimal: Σ d_k·b^k
From decimal: divide by the base, read the remainders bottom-up
Hex ↔ binary: one hex digit = 4 bits
Two’s complement: invert the bits and add 1

Digital logic: gates, K-maps & flip-flops

Basic gates: A·B, A + B, A′, (A·B)′, (A + B)′, A ⊕ B
Boolean rules: X + X′ = 1, X·X′ = 0, X + XY = X, XY + XY′ = X
De Morgan: (X·Y)′ = X′ + Y′, (X + Y)′ = X′·Y′
Karnaugh map order: 00, 01, 11, 10 (Gray code)
Group of 2ᵏ cells: loses k variables
4-to-1 multiplexer: F = A′B′I₀ + A′BI₁ + AB′I₂ + ABI₃
Flip-flops: D: Q⁺ = D, T: Q⁺ = T ⊕ Q, JK: Q⁺ = JQ′ + K′Q
Counters: n-bit: 2ⁿ states; mod-N: smallest n with 2ⁿ ≥ N; f_out = f_clk/N
Ripple counter: f_max = 1/(n·t_pd)
Ring and Johnson counters: n and 2n states

Method

For a circuit, work from the inputs to the output one gate at a time and write the value on every wire, or write its expression and fill in the truth table.
For simplification, put the 1s (and the don’t-cares as X) into a Karnaugh map with Gray-code rows and columns: 00, 01, 11, 10.
Cover the 1s with as few and as large groups of 1, 2, 4, 8 or 16 cells as possible, wrapping round the edges; each group is one product term made of the variables that stay constant. Group the 0s for the POS form.
For flip-flops and counters, read the inputs at each active clock edge, write the state after every edge, and remember that an n-bit counter wraps round after 2ⁿ states.

Data acquisition & sampling

Nyquist criterion: f_s > 2·f_max, f_N = f_s/2
Alias frequency: f_a = |f − k·f_s|, k = round(f/f_s)
Step size: 1 LSB = V_FSR/2ᴺ
Quantisation error (rounding): ±½ LSB
Truncating ADC code: D = ⌊V_in/LSB⌋
Bits for a resolution r: 2ᴺ ≥ span/r
Ideal SQNR, full-scale sine: SQNR = 6.02·N + 1.76 dB
Data rate: channels × f_s × N bit/s
Multiplexed ADC: f_s = 1/(n·(t_c + t_set))
UART: T_b = 1/baud; 8N1 = 10 bits per byte; bytes/s = baud/bits per frame
Baud rate divider: baud = f_clk/(16·D)

Method

Write down what is given: sampling rate, signal frequencies, number of bits, input range, baud rate.
For sampling questions, compare each frequency with f_s/2; a higher frequency appears at f_a = |f − k·f_s| with the nearest multiple of f_s.
For resolution questions, find 1 LSB = V_FSR/2ᴺ, or the smallest N with 2ᴺ ≥ span/resolution.
For data rates and UART links, count everything that is sent: channels, samples per second, bits or whole bytes per sample, and the start, parity and stop bits of every frame.

2Practice problems

1.Number systemsMedium

Set the bits so they store −87 in 8-bit two's complement. Read as an unsigned number, what is the pattern's value U?

N = −878 bit

U =

2.Number systemsHard

Set the bits to the 8-bit result of 1101 0110 OR 1111 0101. What is the result's value R in decimal?

1101 0110OR1111 0101

R =

3.Digital logic: gates, K-maps & flip-flopsMedium

A 4-to-1 multiplexer has its select inputs S₁ = A and S₀ = B, and its data inputs tied to I₀ = C′, I₁ = C, I₂ = C′, I₃ = C. For how many of the 8 combinations of A, B and C is the output F = 1? Find N.

I₀ = C′I₁ = CI₂ = C′I₃ = C

N =

4.Digital logic: gates, K-maps & flip-flopsHard

Find the minimal SOP form of F(A, B, C, D) = Σm(1, 4, 5, 6, 9, 10, 12, 14) + d(2, 3, 11, 13), where d marks the don't-care conditions. How many product terms N does it have?

F(A, B, C, D) = Σm(1, 4, 5, 6, 9, 10, 12, 14) + d(2, 3, 11, 13)

N =

5.Data acquisition & samplingMedium

A sensor measures pressure over a span of 500 kPa, and its output fills the whole input range of an ADC. The reading must resolve 0.1 kPa. Find the smallest number of bits N the ADC needs.

span = 500 kParesolution = 0.1 kPa

N =

6.Data acquisition & samplingHard

An 8-channel multiplexer feeds one ADC. Each conversion takes 2 µs, and after every channel switch the input needs 1 µs to settle. The channels are scanned in turn without pause. Find the sampling rate f_s of each channel, in kHz.

n = 8t_c = 2 µst_set = 1 µs

f_s = kHz

3Solutions

1.Number systems

Answer: U = 169

Setting bits: each bit is worth a power of two (128, 64, …, 1). One hex digit is exactly four bits, and in 8-bit two's complement the leftmost bit is worth −128. Bitwise operations work on each bit position separately.

Invert and add one

87 = 0101 0111

inverted: 1010 1000

+1 → 1010 1001

Read it as unsigned

1010 1001₂ = 256 − 87 = 169

Answer

U = 169

2.Number systems

Answer: R = 247

Bit by bit

OR gives 1 where at least one bit is 1.

1101 0110

OR 1111 0101

= 1111 0111

Value of the result

1111 0111₂ = 247

Answer

R = 247

3.Digital logic: gates, K-maps & flip-flops

Answer: N = 4

Multiplexer: a 2ⁿ-to-1 multiplexer passes one of its data inputs to the output; the select lines, read as a binary number, pick which one. For a 4-to-1 MUX with selects S₁S₀ = AB, F = A′B′·I₀ + A′B·I₁ + AB′·I₂ + AB·I₃. Tying the data inputs to 0, 1, C or C′ makes the MUX produce any function of A, B and C, which is a common way to build logic with one chip.

Output expression

F = A′B′C′ + A′BC + AB′C′ + ABC

Rows with F = 1

ABC = 000, 011, 100, 111

N = 4

Answer

N = 4

4.Digital logic: gates, K-maps & flip-flops

Answer: N = 3

Karnaugh maps: the cells are ordered in Gray code (00, 01, 11, 10), so neighbouring cells, including the ones across the edges, differ in exactly one variable. Group the 1s in rectangles of 1, 2, 4, 8 or 16 cells, as large as possible and as few as possible, until every 1 is covered. Each group is one product term: the variables that stay constant inside it. A group of 2ᵏ cells loses k variables. Don't-cares (X) may be used to make groups bigger but never have to be covered. Grouping the 0s instead gives the minimal POS form.

Prime implicants

The largest groups that can be formed from 1s and Xs.

C′D, CD′, B′D, BD′, B′C, BC′

Minimal cover

F = C′D + CD′ + BD′

N = 3

Answer

N = 3

Another grouping of the same size exists; it has the same number of terms and literals.

5.Data acquisition & sampling

Answer: N = 13

ADC resolution: an N-bit converter divides its full-scale range V_FSR into 2ᴺ codes, from 0 to 2ᴺ − 1. One step is 1 LSB = V_FSR/2ᴺ: the smallest change the converter can show. A truncating ADC gives the code ⌊V_in/LSB⌋; a rounding ADC is never more than ½ LSB away from the true value, its quantisation error. Every extra bit halves the LSB and adds about 6 dB to the ideal signal-to-quantisation-noise ratio SQNR = 6.02·N + 1.76 dB for a full-scale sine. To reach a resolution r over a span, choose the smallest N with 2ᴺ ≥ span/r.

Steps needed

500/0.1 = 5000

Bits

log₂(5000) = 12.29

2¹² = 4096 < 5000 ≤ 2¹³ = 8192

N = 13

Answer

N = 13

6.Data acquisition & sampling

Answer: f_s = 41.67 kHz

Data rates: every channel delivers f_s samples per second of N bits, so the raw rate is channels × f_s × N bit/s. In memory a sample takes whole bytes (a 12-bit sample is stored in 2 bytes), so the memory for a recording is channels × f_s × bytes per sample × time. A multiplexed ADC converts the channels one after another: each conversion (with settling) takes t, so one round of n channels takes n·t and each channel is sampled at 1/(n·t).

Time per channel

2 + 1 = 3 µs

Time per scan

8·3 = 24 µs

Sampling rate per channel

f_s = 1/24 µs = 41.67 kHz

Answer

f_s = 41.67 kHz

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