Number systems
- Place values
- binary 2k, octal 8k, hex 16k
- To decimal
- Σ dk·bk
- From decimal
- divide by the base, read the remainders bottom-up
- Hex ↔ binary
- one hex digit = 4 bits
- Two’s complement
- invert the bits and add 1
Digital Electronics: cram pack
Formula sheets, the key method steps for every topic and 6 practice problems, with full solutions at the back.
1Formulas and methods
Digital logic: gates, K-maps & flip-flops
- Basic gates
- A·B, A + B, A′, (A·B)′, (A + B)′, A ⊕ B
- Boolean rules
- X + X′ = 1, X·X′ = 0, X + XY = X, XY + XY′ = X
- De Morgan
- (X·Y)′ = X′ + Y′, (X + Y)′ = X′·Y′
- Karnaugh map order
- 00, 01, 11, 10 (Gray code)
- Group of 2ᵏ cells
- loses k variables
- 4-to-1 multiplexer
- F = A′B′I0 + A′BI1 + AB′I2 + ABI3
- Flip-flops
- D: Q⁺ = D, T: Q⁺ = T ⊕ Q, JK: Q⁺ = JQ′ + K′Q
- Counters
- n-bit: 2ⁿ states; mod-N: smallest n with 2ⁿ ≥ N; fout = fclk/N
- Ripple counter
- fmax = 1/(n·tpd)
- Ring and Johnson counters
- n and 2n states
Method
- For a circuit, work from the inputs to the output one gate at a time and write the value on every wire, or write its expression and fill in the truth table.
- For simplification, put the 1s (and the don’t-cares as X) into a Karnaugh map with Gray-code rows and columns: 00, 01, 11, 10.
- Cover the 1s with as few and as large groups of 1, 2, 4, 8 or 16 cells as possible, wrapping round the edges; each group is one product term made of the variables that stay constant. Group the 0s for the POS form.
- For flip-flops and counters, read the inputs at each active clock edge, write the state after every edge, and remember that an n-bit counter wraps round after 2ⁿ states.
Data acquisition & sampling
- Nyquist criterion
- fs > 2·fmax, fN = fs/2
- Alias frequency
- fa = |f − k·fs|, k = round(f/fs)
- Step size
- 1 LSB = VFSR/2ᴺ
- Quantisation error (rounding)
- ±½ LSB
- Truncating ADC code
- D = ⌊Vin/LSB⌋
- Bits for a resolution r
- 2ᴺ ≥ span/r
- Ideal SQNR, full-scale sine
- SQNR = 6.02·N + 1.76 dB
- Data rate
- channels × fs × N bit/s
- Multiplexed ADC
- fs = 1/(n·(tc + tset))
- UART
- Tb = 1/baud; 8N1 = 10 bits per byte; bytes/s = baud/bits per frame
- Baud rate divider
- baud = fclk/(16·D)
Method
- Write down what is given: sampling rate, signal frequencies, number of bits, input range, baud rate.
- For sampling questions, compare each frequency with fs/2; a higher frequency appears at fa = |f − k·fs| with the nearest multiple of fs.
- For resolution questions, find 1 LSB = VFSR/2ᴺ, or the smallest N with 2ᴺ ≥ span/resolution.
- For data rates and UART links, count everything that is sent: channels, samples per second, bits or whole bytes per sample, and the start, parity and stop bits of every frame.
2Practice problems
1.Number systemsMedium
Set the bits so they store −69 in 8-bit two's complement. Read as an unsigned number, what is the pattern's value U?
N = −698 bit
U =
2.Number systemsHard
Set the bits to the 8-bit result of 1101 1010 AND 1000 0011. What is the result's value R in decimal?
1101 1010AND1000 0011
R =
3.Digital logic: gates, K-maps & flip-flopsMedium
In this Karnaugh map exactly one 1 has no neighbouring 1, so it stays a group of one cell (a full minterm of four literals) in the minimal SOP form. Neighbours across the map edges count. Click that cell.
F = Σm(0, 3, 8, 10, 12, 14, 15)
- 1AB = 00, CD = 00
- 2AB = 00, CD = 01
- 3AB = 00, CD = 11
- 4AB = 00, CD = 10
- 5AB = 01, CD = 00
- 6AB = 01, CD = 01
- 7AB = 01, CD = 11
- 8AB = 01, CD = 10
- 9AB = 11, CD = 00
- 10AB = 11, CD = 01
- 11AB = 11, CD = 11
- 12AB = 11, CD = 10
- 13AB = 10, CD = 00
- 14AB = 10, CD = 01
- 15AB = 10, CD = 11
- 16AB = 10, CD = 10
4.Digital logic: gates, K-maps & flip-flopsHard
A positive-edge-triggered D flip-flop starts with Q = 0 and receives the inputs shown at 6 rising clock edges. How many times N does Q change state?
Q₀ = 0D
N =
5.Data acquisition & samplingMedium
A UART sends bytes at 9600 baud in the format 8E1: 8 data bits, an even parity bit and 1 stop bit(s), plus the start bit. Find the largest number of data bytes per second it can transfer.
baud = 9600 Bd8E1
RB = B/s
6.Data acquisition & samplingHard
A 2.4 kHz square wave is sampled at 8 kHz with no anti-aliasing filter. A square wave contains the odd harmonics 3f₁, 5f₁, 7f₁, … At which frequency fa does its harmonic 3f₁ appear in the sampled data? Give it in Hz.
f₁ = 2.4 kHzfs = 8 kHzharmonic: 3f₁
fa = Hz
3Solutions
1.Number systems
Answer: U = 187
Setting bits: each bit is worth a power of two (128, 64, …, 1). One hex digit is exactly four bits, and in 8-bit two's complement the leftmost bit is worth −128. Bitwise operations work on each bit position separately.
Invert and add one
69 = 0100 0101
inverted: 1011 1010
+1 → 1011 1011
Read it as unsigned
1011 1011₂ = 256 − 69 = 187
Answer
U = 187
2.Number systems
Answer: R = 130
Setting bits: each bit is worth a power of two (128, 64, …, 1). One hex digit is exactly four bits, and in 8-bit two's complement the leftmost bit is worth −128. Bitwise operations work on each bit position separately.
Bit by bit
AND gives 1 only where both bits are 1.
1101 1010
AND 1000 0011
= 1000 0010
Value of the result
1000 0010₂ = 130
Answer
R = 130
3.Digital logic: gates, K-maps & flip-flops
Answer: AB = 00, CD = 11
Karnaugh maps: the cells are ordered in Gray code (00, 01, 11, 10), so neighbouring cells, including the ones across the edges, differ in exactly one variable. Group the 1s in rectangles of 1, 2, 4, 8 or 16 cells, as large as possible and as few as possible, until every 1 is covered. Each group is one product term: the variables that stay constant inside it. A group of 2ᵏ cells loses k variables. Don't-cares (X) may be used to make groups bigger but never have to be covered. Grouping the 0s instead gives the minimal POS form.
Neighbours of each 1
A 1 with a neighbouring 1 can join a group of two or more.
m3: m2, m1, m7, m11 → 0
The isolated 1
m3 = A′B′CD → AB = 00, CD = 11
Answer
AB = 00, CD = 11
4.Digital logic: gates, K-maps & flip-flops
Answer: N = 3
Flip-flops and counters: a flip-flop changes only at the active clock edge. D copies its input (Q⁺ = D); T toggles when T = 1; JK holds for 00, resets for 01, sets for 10 and toggles for 11. An n-bit binary counter has 2ⁿ states and counts modulo 2ⁿ; a mod-N counter goes 0, 1, …, N − 1 and back to 0, and needs the smallest n with 2ⁿ ≥ N flip-flops. Each stage of a ripple counter halves the frequency, so the last output of a mod-N counter runs at fclk/N. A Johnson counter of n flip-flops has 2n states, a ring counter n.
Q after every edge
A D flip-flop copies D at each rising edge: Q⁺ = D.
1: D = 0 → Q = 0
2: D = 1 → Q = 1
3: D = 0 → Q = 0
4: D = 0 → Q = 0
5: D = 0 → Q = 0
6: D = 1 → Q = 1
Count the changes
0 → 0 → 1 → 0 → 0 → 0 → 1
N = 3
Answer
N = 3
5.Data acquisition & sampling
Answer: RB = 872.7 B/s
UART: an asynchronous serial link sends each byte as a frame: one start bit (low), the data bits, an optional parity bit and one or two stop bits (high). The baud rate is the number of bits per second, so one bit lasts Tb = 1/baud and a frame of n bits lasts n/baud. The common 8N1 format has 10 bits per byte. The baud generator divides the clock: baud = fclk/(16·D) with a whole number D, so the real baud rate differs slightly from the target; an error below about 2 % is usually acceptable.
Bits per frame
1 + 8 + 1 + 1 = 11
Byte rate
9600/11 = 872.7 B/s
Answer
RB = 872.7 B/s
6.Data acquisition & sampling
Answer: fa = 800 Hz
Sampling: an ADC measures the signal fs times per second. By the Nyquist–Shannon theorem a frequency f is captured correctly only while f < fs/2, the Nyquist (folding) frequency, so the sampling rate must exceed twice the highest signal frequency. A higher frequency is not lost: it shows up as an alias at fa = |f − k·fs|, with the whole number k that brings the result between 0 and fs/2. The samples cannot tell the two apart, so an analogue anti-aliasing filter must remove everything above fs/2 before the ADC.
Harmonic frequency
3f₁ = 3·2.4 kHz = 7.2 kHz
Nearest multiple of the sampling rate
m = round(0.9) = 1
Alias frequency
fa = |7200 − 1·8000| = 800 Hz
Answer
fa = 800 Hz
The alias lands inside the signal band, where no digital filter can remove it. Only an analogue filter before the ADC helps.
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