Digital Electronics: cram pack

Formula sheets, the key method steps for every topic and 6 practice problems, with full solutions at the back.

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1Formulas and methods

Number systems

Place values
binary 2k, octal 8k, hex 16k
To decimal
Σ dk·bk
From decimal
divide by the base, read the remainders bottom-up
Hex ↔ binary
one hex digit = 4 bits
Two’s complement
invert the bits and add 1

Digital logic: gates, K-maps & flip-flops

Basic gates
A·B, A + B, A′, (A·B)′, (A + B)′, A ⊕ B
Boolean rules
X + X′ = 1, X·X′ = 0, X + XY = X, XY + XY′ = X
De Morgan
(X·Y)′ = X′ + Y′, (X + Y)′ = X′·Y′
Karnaugh map order
00, 01, 11, 10 (Gray code)
Group of 2ᵏ cells
loses k variables
4-to-1 multiplexer
F = A′B′I0 + A′BI1 + AB′I2 + ABI3
Flip-flops
D: Q⁺ = D, T: Q⁺ = T ⊕ Q, JK: Q⁺ = JQ′ + K′Q
Counters
n-bit: 2ⁿ states; mod-N: smallest n with 2ⁿ ≥ N; fout = fclk/N
Ripple counter
fmax = 1/(n·tpd)
Ring and Johnson counters
n and 2n states

Method

  1. For a circuit, work from the inputs to the output one gate at a time and write the value on every wire, or write its expression and fill in the truth table.
  2. For simplification, put the 1s (and the don’t-cares as X) into a Karnaugh map with Gray-code rows and columns: 00, 01, 11, 10.
  3. Cover the 1s with as few and as large groups of 1, 2, 4, 8 or 16 cells as possible, wrapping round the edges; each group is one product term made of the variables that stay constant. Group the 0s for the POS form.
  4. For flip-flops and counters, read the inputs at each active clock edge, write the state after every edge, and remember that an n-bit counter wraps round after 2ⁿ states.

Data acquisition & sampling

Nyquist criterion
fs > 2·fmax, fN = fs/2
Alias frequency
fa = |f − k·fs|, k = round(f/fs)
Step size
1 LSB = VFSR/2ᴺ
Quantisation error (rounding)
±½ LSB
Truncating ADC code
D = ⌊Vin/LSB⌋
Bits for a resolution r
2ᴺ ≥ span/r
Ideal SQNR, full-scale sine
SQNR = 6.02·N + 1.76 dB
Data rate
channels × fs × N bit/s
Multiplexed ADC
fs = 1/(n·(tc + tset))
UART
Tb = 1/baud; 8N1 = 10 bits per byte; bytes/s = baud/bits per frame
Baud rate divider
baud = fclk/(16·D)

Method

  1. Write down what is given: sampling rate, signal frequencies, number of bits, input range, baud rate.
  2. For sampling questions, compare each frequency with fs/2; a higher frequency appears at fa = |f − k·fs| with the nearest multiple of fs.
  3. For resolution questions, find 1 LSB = VFSR/2ᴺ, or the smallest N with 2ᴺ ≥ span/resolution.
  4. For data rates and UART links, count everything that is sent: channels, samples per second, bits or whole bytes per sample, and the start, parity and stop bits of every frame.

2Practice problems

1.Number systemsMedium
8-bit two's complement?−128?64?32?16?8?4?2?1

Write −10 as an 8-bit two's complement pattern. Read the pattern as an unsigned binary number: what is its value U in decimal?

N = −108 bit
U =
2.Number systemsHard
click the bits to set them012806403201608040201

Set the bits to the 8-bit result of 1110 1000 >> 1. What is the result's value R in decimal?

1110 1000>> 1
R =
3.Digital logic: gates, K-maps & flip-flopsMedium
ABC000111100101324576

Simplify F = A′C + A′C′ + B′C′ to its minimal sum-of-products form. How many literals L does the simplified expression contain?

F = A′C + A′C′ + B′C′
L =
4.Digital logic: gates, K-maps & flip-flopsHard
TQ0​Q0​TQ1​Q1​TQ2​Q2​CLKDOWN

A 3-bit binary down counter starts at 0 (decimal, Q = 000). Which count Q (in decimal) does it show after 20 clock pulses?

Q0 = 020n = 3
Q =
5.Data acquisition & samplingMedium
tTs​ = 1/fs​f = 18 kHzfs​ = 20 kHz

An 18 kHz sine wave is sampled at 20 kHz without an anti-aliasing filter. At which frequency fa does it appear in the samples? Give it in kHz.

f = 18 kHzfs = 20 kHz
fa = kHz
6.Data acquisition & samplingHard
SD0​D1​D2​D3​D4​D5​D6​D7​Tb​10·Tb​115200 Bd, 8N1

A 12-bit ADC streams every sample over a UART at 115200 baud, format 8N1 (start bit, 8 data bits, 1 stop bit). Each sample is sent as 2 whole byte(s) and the link is busy all the time. Find the highest signal frequency fmax that can be sampled without aliasing, in Hz.

baud = 115200 BdN = 128N1
fmax = Hz

3Solutions

1.Number systems

Answer: U = 246

Positional number systems: each digit is worth its value times a power of the base. In binary the places are worth 1, 2, 4, 8, 16, …; in hexadecimal 1, 16, 256, …, with A–F standing for 10–15. In 8-bit two's complement the leftmost bit is worth −128 instead of +128, which is how negative numbers are stored.

Invert and add one

10 = 0000 1010
inverted: 1111 0101
+1 → 1111 0110

Read it as unsigned

1111 0110₂ = 256 − 10 = 246

Answer

U = 246
2.Number systems

Answer: R = 116

Setting bits: each bit is worth a power of two (128, 64, …, 1). One hex digit is exactly four bits, and in 8-bit two's complement the leftmost bit is worth −128. Bitwise operations work on each bit position separately.

Bit by bit

Shifting right by 1 moves every bit 1 places to the right; bits that fall off the right end are lost and zeros come in on the left.

1110 1000 >> 1
= 0111 0100

Value of the result

0111 0100₂ = 116

Answer

R = 116
3.Digital logic: gates, K-maps & flip-flops

Answer: L = 3

Boolean algebra: the rules that simplify expressions are X + X′ = 1 and X·X′ = 0, X + X = X, absorption X + X·Y = X, the combining rule X·Y + X·Y′ = X, X + X′Y = X + Y and the consensus theorem XY + X′Z + YZ = XY + X′Z. De Morgan's laws turn (X·Y)′ into X′ + Y′ and (X + Y)′ into X′·Y′. A Karnaugh map applies these rules graphically: every group of two neighbouring cells is one use of XY + XY′ = X.

Minterms of the expression

A′C → m(1, 3)
A′C′ → m(0, 2)
B′C′ → m(0, 4)
ABC00011110011011131214050706

Group and read off

F = B′C′ + A′

Count the literals

L = 3

Answer

L = 3
4.Digital logic: gates, K-maps & flip-flops

Answer: Q = 4

Flip-flops and counters: a flip-flop changes only at the active clock edge. D copies its input (Q⁺ = D); T toggles when T = 1; JK holds for 00, resets for 01, sets for 10 and toggles for 11. An n-bit binary counter has 2ⁿ states and counts modulo 2ⁿ; a mod-N counter goes 0, 1, …, N − 1 and back to 0, and needs the smallest n with 2ⁿ ≥ N flip-flops. Each stage of a ripple counter halves the frequency, so the last output of a mod-N counter runs at fclk/N. A Johnson counter of n flip-flops has 2n states, a ring counter n.

Full cycles

Every 8 pulses bring the counter back to the same state.

20 = 2·8 + 4

Count after the remaining pulses

Q = (0 − 4) mod 8 = 4
Q = 100₂

Answer

Q = 4
5.Data acquisition & sampling

Answer: fa = 2 kHz

Sampling: an ADC measures the signal fs times per second. By the Nyquist–Shannon theorem a frequency f is captured correctly only while f < fs/2, the Nyquist (folding) frequency, so the sampling rate must exceed twice the highest signal frequency. A higher frequency is not lost: it shows up as an alias at fa = |f − k·fs|, with the whole number k that brings the result between 0 and fs/2. The samples cannot tell the two apart, so an analogue anti-aliasing filter must remove everything above fs/2 before the ADC.

Nyquist frequency

fs/2 = 10 kHz < f = 18 kHz

Nearest multiple of the sampling rate

k = round(18/20) = 1

Alias frequency

fa = |18 − 1·20| = 2 kHz

Answer

fa = 2 kHz

The dashed curve in the figure is the alias: it passes through exactly the same samples.

6.Data acquisition & sampling

Answer: fmax = 2880 Hz

UART: an asynchronous serial link sends each byte as a frame: one start bit (low), the data bits, an optional parity bit and one or two stop bits (high). The baud rate is the number of bits per second, so one bit lasts Tb = 1/baud and a frame of n bits lasts n/baud. The common 8N1 format has 10 bits per byte. The baud generator divides the clock: baud = fclk/(16·D) with a whole number D, so the real baud rate differs slightly from the target; an error below about 2 % is usually acceptable.

Bits per sample on the line

2·10 = 20 bit

Highest sampling rate

fs,max = 115200/20 = 5760 Hz

Nyquist limit

fmax = 5760/2 = 2880 Hz

Answer

fmax = 2880 Hz

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