Number systems
- Place values
- binary 2k, octal 8k, hex 16k
- To decimal
- Σ dk·bk
- From decimal
- divide by the base, read the remainders bottom-up
- Hex ↔ binary
- one hex digit = 4 bits
- Two’s complement
- invert the bits and add 1
Digital Electronics: cram pack
Formula sheets, the key method steps for every topic and 6 practice problems, with full solutions at the back.
1Formulas and methods
Digital logic: gates, K-maps & flip-flops
- Basic gates
- A·B, A + B, A′, (A·B)′, (A + B)′, A ⊕ B
- Boolean rules
- X + X′ = 1, X·X′ = 0, X + XY = X, XY + XY′ = X
- De Morgan
- (X·Y)′ = X′ + Y′, (X + Y)′ = X′·Y′
- Karnaugh map order
- 00, 01, 11, 10 (Gray code)
- Group of 2ᵏ cells
- loses k variables
- 4-to-1 multiplexer
- F = A′B′I0 + A′BI1 + AB′I2 + ABI3
- Flip-flops
- D: Q⁺ = D, T: Q⁺ = T ⊕ Q, JK: Q⁺ = JQ′ + K′Q
- Counters
- n-bit: 2ⁿ states; mod-N: smallest n with 2ⁿ ≥ N; fout = fclk/N
- Ripple counter
- fmax = 1/(n·tpd)
- Ring and Johnson counters
- n and 2n states
Method
- For a circuit, work from the inputs to the output one gate at a time and write the value on every wire, or write its expression and fill in the truth table.
- For simplification, put the 1s (and the don’t-cares as X) into a Karnaugh map with Gray-code rows and columns: 00, 01, 11, 10.
- Cover the 1s with as few and as large groups of 1, 2, 4, 8 or 16 cells as possible, wrapping round the edges; each group is one product term made of the variables that stay constant. Group the 0s for the POS form.
- For flip-flops and counters, read the inputs at each active clock edge, write the state after every edge, and remember that an n-bit counter wraps round after 2ⁿ states.
Data acquisition & sampling
- Nyquist criterion
- fs > 2·fmax, fN = fs/2
- Alias frequency
- fa = |f − k·fs|, k = round(f/fs)
- Step size
- 1 LSB = VFSR/2ᴺ
- Quantisation error (rounding)
- ±½ LSB
- Truncating ADC code
- D = ⌊Vin/LSB⌋
- Bits for a resolution r
- 2ᴺ ≥ span/r
- Ideal SQNR, full-scale sine
- SQNR = 6.02·N + 1.76 dB
- Data rate
- channels × fs × N bit/s
- Multiplexed ADC
- fs = 1/(n·(tc + tset))
- UART
- Tb = 1/baud; 8N1 = 10 bits per byte; bytes/s = baud/bits per frame
- Baud rate divider
- baud = fclk/(16·D)
Method
- Write down what is given: sampling rate, signal frequencies, number of bits, input range, baud rate.
- For sampling questions, compare each frequency with fs/2; a higher frequency appears at fa = |f − k·fs| with the nearest multiple of fs.
- For resolution questions, find 1 LSB = VFSR/2ᴺ, or the smallest N with 2ᴺ ≥ span/resolution.
- For data rates and UART links, count everything that is sent: channels, samples per second, bits or whole bytes per sample, and the start, parity and stop bits of every frame.
2Practice problems
1.Number systemsMedium
Write −70 as an 8-bit two's complement pattern. Read the pattern as an unsigned binary number: what is its value U in decimal?
N = −708 bit
U =
2.Number systemsHard
An uncompressed image is 256 × 256 pixels with 32 bits per pixel. How much memory M does it take, in KiB (1 KiB = 1024 bytes)?
256 × 256 px32 bit/px1 KiB = 1024 B
M = KiB
3.Digital logic: gates, K-maps & flip-flopsMedium
A 4-to-1 multiplexer has its select inputs S₁ = A and S₀ = B, and its data inputs tied to I₀ = 0, I₁ = 1, I₂ = C′, I₃ = C. For how many of the 8 combinations of A, B and C is the output F = 1? Find N.
I₀ = 0I₁ = 1I₂ = C′I₃ = C
N =
4.Digital logic: gates, K-maps & flip-flopsHard
A 4-bit ripple (asynchronous) counter is built from flip-flops with a propagation delay of 12 ns each. All outputs must have settled before the next clock edge. Find the maximum clock frequency fmax.
n = 4tpd = 12 ns
fmax = MHz
5.Data acquisition & samplingMedium
A sensor measures temperature over a span of 120 °C, and its output fills the whole input range of an ADC. The reading must resolve 0.2 °C. Find the smallest number of bits N the ADC needs.
span = 120 °Cresolution = 0.2 °C
N =
6.Data acquisition & samplingHard
A microcontroller with a 20 MHz clock sets its UART baud rate as fclk/(16·D), with D a whole number rounded to the nearest value. The target is 4800 baud. Find the percentage error of the real baud rate (positive when it is too fast).
fclk = 20 MHztarget = 4800 Bd
e = %
3Solutions
1.Number systems
Answer: U = 186
Positional number systems: each digit is worth its value times a power of the base. In binary the places are worth 1, 2, 4, 8, 16, …; in hexadecimal 1, 16, 256, …, with A–F standing for 10–15. In 8-bit two's complement the leftmost bit is worth −128 instead of +128, which is how negative numbers are stored.
Invert and add one
70 = 0100 0110
inverted: 1011 1001
+1 → 1011 1010
Read it as unsigned
1011 1010₂ = 256 − 70 = 186
Answer
U = 186
2.Number systems
Answer: M = 256 KiB
Positional number systems: each digit is worth its value times a power of the base. In binary the places are worth 1, 2, 4, 8, 16, …; in hexadecimal 1, 16, 256, …, with A–F standing for 10–15. In 8-bit two's complement the leftmost bit is worth −128 instead of +128, which is how negative numbers are stored.
Bits and bytes
256·256·32 = 2097152 bit = 262144 B
Convert to KiB
262144/1024 = 256 KiB
Answer
M = 256 KiB
3.Digital logic: gates, K-maps & flip-flops
Answer: N = 4
Multiplexer: a 2ⁿ-to-1 multiplexer passes one of its data inputs to the output; the select lines, read as a binary number, pick which one. For a 4-to-1 MUX with selects S₁S₀ = AB, F = A′B′·I₀ + A′B·I₁ + AB′·I₂ + AB·I₃. Tying the data inputs to 0, 1, C or C′ makes the MUX produce any function of A, B and C, which is a common way to build logic with one chip.
Output expression
F = A′B + AB′C′ + ABC
Rows with F = 1
ABC = 010, 011, 100, 111
N = 4
Answer
N = 4
4.Digital logic: gates, K-maps & flip-flops
Answer: fmax = 20.83 MHz
Flip-flops and counters: a flip-flop changes only at the active clock edge. D copies its input (Q⁺ = D); T toggles when T = 1; JK holds for 00, resets for 01, sets for 10 and toggles for 11. An n-bit binary counter has 2ⁿ states and counts modulo 2ⁿ; a mod-N counter goes 0, 1, …, N − 1 and back to 0, and needs the smallest n with 2ⁿ ≥ N flip-flops. Each stage of a ripple counter halves the frequency, so the last output of a mod-N counter runs at fclk/N. A Johnson counter of n flip-flops has 2n states, a ring counter n.
Worst-case settling time
T = 4·12 ns = 48 ns
Maximum frequency
fmax = 1/48 ns = 20.83 MHz
Answer
fmax = 20.83 MHz
5.Data acquisition & sampling
Answer: N = 10
ADC resolution: an N-bit converter divides its full-scale range VFSR into 2ᴺ codes, from 0 to 2ᴺ − 1. One step is 1 LSB = VFSR/2ᴺ: the smallest change the converter can show. A truncating ADC gives the code ⌊Vin/LSB⌋; a rounding ADC is never more than ½ LSB away from the true value, its quantisation error. Every extra bit halves the LSB and adds about 6 dB to the ideal signal-to-quantisation-noise ratio SQNR = 6.02·N + 1.76 dB for a full-scale sine. To reach a resolution r over a span, choose the smallest N with 2ᴺ ≥ span/r.
Steps needed
120/0.2 = 600
Bits
log₂(600) = 9.229
29 = 512 < 600 ≤ 210 = 1024
N = 10
Answer
N = 10
6.Data acquisition & sampling
Answer: e = 0.1603 %
UART: an asynchronous serial link sends each byte as a frame: one start bit (low), the data bits, an optional parity bit and one or two stop bits (high). The baud rate is the number of bits per second, so one bit lasts Tb = 1/baud and a frame of n bits lasts n/baud. The common 8N1 format has 10 bits per byte. The baud generator divides the clock: baud = fclk/(16·D) with a whole number D, so the real baud rate differs slightly from the target; an error below about 2 % is usually acceptable.
Divider
D = 20·10⁶/(16·4800) = 260.4 → 260
Real baud rate
20·10⁶/(16·260) = 4808 Bd
Error
(4808 − 4800)/4800·100 = 0.1603 %
Answer
e = 0.1603 %
An error below about 2 % is usually acceptable.
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