Number systems
- Place values
- binary 2k, octal 8k, hex 16k
- To decimal
- Σ dk·bk
- From decimal
- divide by the base, read the remainders bottom-up
- Hex ↔ binary
- one hex digit = 4 bits
- Two’s complement
- invert the bits and add 1
Digital Electronics: cram pack
Formula sheets, the key method steps for every topic and 6 practice problems, with full solutions at the back.
1Formulas and methods
Digital logic: gates, K-maps & flip-flops
- Basic gates
- A·B, A + B, A′, (A·B)′, (A + B)′, A ⊕ B
- Boolean rules
- X + X′ = 1, X·X′ = 0, X + XY = X, XY + XY′ = X
- De Morgan
- (X·Y)′ = X′ + Y′, (X + Y)′ = X′·Y′
- Karnaugh map order
- 00, 01, 11, 10 (Gray code)
- Group of 2ᵏ cells
- loses k variables
- 4-to-1 multiplexer
- F = A′B′I0 + A′BI1 + AB′I2 + ABI3
- Flip-flops
- D: Q⁺ = D, T: Q⁺ = T ⊕ Q, JK: Q⁺ = JQ′ + K′Q
- Counters
- n-bit: 2ⁿ states; mod-N: smallest n with 2ⁿ ≥ N; fout = fclk/N
- Ripple counter
- fmax = 1/(n·tpd)
- Ring and Johnson counters
- n and 2n states
Method
- For a circuit, work from the inputs to the output one gate at a time and write the value on every wire, or write its expression and fill in the truth table.
- For simplification, put the 1s (and the don’t-cares as X) into a Karnaugh map with Gray-code rows and columns: 00, 01, 11, 10.
- Cover the 1s with as few and as large groups of 1, 2, 4, 8 or 16 cells as possible, wrapping round the edges; each group is one product term made of the variables that stay constant. Group the 0s for the POS form.
- For flip-flops and counters, read the inputs at each active clock edge, write the state after every edge, and remember that an n-bit counter wraps round after 2ⁿ states.
Data acquisition & sampling
- Nyquist criterion
- fs > 2·fmax, fN = fs/2
- Alias frequency
- fa = |f − k·fs|, k = round(f/fs)
- Step size
- 1 LSB = VFSR/2ᴺ
- Quantisation error (rounding)
- ±½ LSB
- Truncating ADC code
- D = ⌊Vin/LSB⌋
- Bits for a resolution r
- 2ᴺ ≥ span/r
- Ideal SQNR, full-scale sine
- SQNR = 6.02·N + 1.76 dB
- Data rate
- channels × fs × N bit/s
- Multiplexed ADC
- fs = 1/(n·(tc + tset))
- UART
- Tb = 1/baud; 8N1 = 10 bits per byte; bytes/s = baud/bits per frame
- Baud rate divider
- baud = fclk/(16·D)
Method
- Write down what is given: sampling rate, signal frequencies, number of bits, input range, baud rate.
- For sampling questions, compare each frequency with fs/2; a higher frequency appears at fa = |f − k·fs| with the nearest multiple of fs.
- For resolution questions, find 1 LSB = VFSR/2ᴺ, or the smallest N with 2ᴺ ≥ span/resolution.
- For data rates and UART links, count everything that is sent: channels, samples per second, bits or whole bytes per sample, and the start, parity and stop bits of every frame.
2Practice problems
1.Number systemsMedium
Set the bits so they store −102 in 8-bit two's complement. Read as an unsigned number, what is the pattern's value U?
N = −1028 bit
U =
2.Number systemsHard
Set the bits to the 8-bit result of 1110 1010 >> 3. What is the result's value R in decimal?
1110 1010>> 3
R =
3.Digital logic: gates, K-maps & flip-flopsMedium
Use the Karnaugh map to find the minimal sum-of-products (SOP) form of F(A, B, C, D) = Σm(2, 3, 7, 8, 9, 10, 12, 13, 14, 15). How many product terms N does it have?
F(A, B, C, D) = Σm(2, 3, 7, 8, 9, 10, 12, 13, 14, 15)
N =
4.Digital logic: gates, K-maps & flip-flopsHard
Find the minimal SOP form of F(A, B, C, D) = Σm(3, 4, 6, 7, 9, 10, 13, 14) + d(5, 12, 15), where d marks the don't-care conditions. How many product terms N does it have?
F(A, B, C, D) = Σm(3, 4, 6, 7, 9, 10, 13, 14) + d(5, 12, 15)
N =
5.Data acquisition & samplingMedium
A 6.4 kHz sine wave is sampled at 8 kHz without an anti-aliasing filter. At which frequency fa does it appear in the samples? Give it in Hz.
f = 6.4 kHzfs = 8 kHz
fa = Hz
6.Data acquisition & samplingHard
A microcontroller with a 20 MHz clock sets its UART baud rate as fclk/(16·D), with D a whole number rounded to the nearest value. The target is 115200 baud. Find the percentage error of the real baud rate (positive when it is too fast).
fclk = 20 MHztarget = 115200 Bd
e = %
3Solutions
1.Number systems
Answer: U = 154
Setting bits: each bit is worth a power of two (128, 64, …, 1). One hex digit is exactly four bits, and in 8-bit two's complement the leftmost bit is worth −128. Bitwise operations work on each bit position separately.
Invert and add one
102 = 0110 0110
inverted: 1001 1001
+1 → 1001 1010
Read it as unsigned
1001 1010₂ = 256 − 102 = 154
Answer
U = 154
2.Number systems
Answer: R = 29
Setting bits: each bit is worth a power of two (128, 64, …, 1). One hex digit is exactly four bits, and in 8-bit two's complement the leftmost bit is worth −128. Bitwise operations work on each bit position separately.
Bit by bit
Shifting right by 3 moves every bit 3 places to the right; bits that fall off the right end are lost and zeros come in on the left.
1110 1010 >> 3
= 0001 1101
Value of the result
0001 1101₂ = 29
Answer
R = 29
3.Digital logic: gates, K-maps & flip-flops
Answer: N = 4
Karnaugh maps: the cells are ordered in Gray code (00, 01, 11, 10), so neighbouring cells, including the ones across the edges, differ in exactly one variable. Group the 1s in rectangles of 1, 2, 4, 8 or 16 cells, as large as possible and as few as possible, until every 1 is covered. Each group is one product term: the variables that stay constant inside it. A group of 2ᵏ cells loses k variables. Don't-cares (X) may be used to make groups bigger but never have to be covered. Grouping the 0s instead gives the minimal POS form.
Group the 1s
Every group is a rectangle of 2ᵏ cells; edge cells are neighbours of the cells on the opposite edge.
B′CD′
AC′
A′CD
AB
Minimal SOP form
F = B′CD′ + AC′ + A′CD + AB
N = 4
Answer
N = 4
Another grouping of the same size exists; it has the same number of terms and literals.
4.Digital logic: gates, K-maps & flip-flops
Answer: N = 4
Karnaugh maps: the cells are ordered in Gray code (00, 01, 11, 10), so neighbouring cells, including the ones across the edges, differ in exactly one variable. Group the 1s in rectangles of 1, 2, 4, 8 or 16 cells, as large as possible and as few as possible, until every 1 is covered. Each group is one product term: the variables that stay constant inside it. A group of 2ᵏ cells loses k variables. Don't-cares (X) may be used to make groups bigger but never have to be covered. Grouping the 0s instead gives the minimal POS form.
Prime implicants
The largest groups that can be formed from 1s and Xs.
B, A′CD, AC′D, ACD′
Minimal cover
F = B + A′CD + AC′D + ACD′
N = 4
Answer
N = 4
5.Data acquisition & sampling
Answer: fa = 1600 Hz
Sampling: an ADC measures the signal fs times per second. By the Nyquist–Shannon theorem a frequency f is captured correctly only while f < fs/2, the Nyquist (folding) frequency, so the sampling rate must exceed twice the highest signal frequency. A higher frequency is not lost: it shows up as an alias at fa = |f − k·fs|, with the whole number k that brings the result between 0 and fs/2. The samples cannot tell the two apart, so an analogue anti-aliasing filter must remove everything above fs/2 before the ADC.
Nyquist frequency
fs/2 = 4 kHz < f = 6.4 kHz
Nearest multiple of the sampling rate
k = round(6400/8000) = 1
Alias frequency
fa = |6400 − 1·8000| = 1600 Hz
Answer
fa = 1600 Hz
The dashed curve in the figure is the alias: it passes through exactly the same samples.
6.Data acquisition & sampling
Answer: e = −1.357 %
UART: an asynchronous serial link sends each byte as a frame: one start bit (low), the data bits, an optional parity bit and one or two stop bits (high). The baud rate is the number of bits per second, so one bit lasts Tb = 1/baud and a frame of n bits lasts n/baud. The common 8N1 format has 10 bits per byte. The baud generator divides the clock: baud = fclk/(16·D) with a whole number D, so the real baud rate differs slightly from the target; an error below about 2 % is usually acceptable.
Divider
D = 20·10⁶/(16·115200) = 10.85 → 11
Real baud rate
20·10⁶/(16·11) = 113636 Bd
Error
(113636 − 115200)/115200·100 = −1.357 %
Answer
e = −1.357 %
An error below about 2 % is usually acceptable.
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