Digital Electronics: cram pack

Formula sheets, the key method steps for every topic and 6 practice problems, with full solutions at the back.

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1Formulas and methods

Number systems

Place values
binary 2k, octal 8k, hex 16k
To decimal
Σ dk·bk
From decimal
divide by the base, read the remainders bottom-up
Hex ↔ binary
one hex digit = 4 bits
Two’s complement
invert the bits and add 1

Digital logic: gates, K-maps & flip-flops

Basic gates
A·B, A + B, A′, (A·B)′, (A + B)′, A ⊕ B
Boolean rules
X + X′ = 1, X·X′ = 0, X + XY = X, XY + XY′ = X
De Morgan
(X·Y)′ = X′ + Y′, (X + Y)′ = X′·Y′
Karnaugh map order
00, 01, 11, 10 (Gray code)
Group of 2ᵏ cells
loses k variables
4-to-1 multiplexer
F = A′B′I0 + A′BI1 + AB′I2 + ABI3
Flip-flops
D: Q⁺ = D, T: Q⁺ = T ⊕ Q, JK: Q⁺ = JQ′ + K′Q
Counters
n-bit: 2ⁿ states; mod-N: smallest n with 2ⁿ ≥ N; fout = fclk/N
Ripple counter
fmax = 1/(n·tpd)
Ring and Johnson counters
n and 2n states

Method

  1. For a circuit, work from the inputs to the output one gate at a time and write the value on every wire, or write its expression and fill in the truth table.
  2. For simplification, put the 1s (and the don’t-cares as X) into a Karnaugh map with Gray-code rows and columns: 00, 01, 11, 10.
  3. Cover the 1s with as few and as large groups of 1, 2, 4, 8 or 16 cells as possible, wrapping round the edges; each group is one product term made of the variables that stay constant. Group the 0s for the POS form.
  4. For flip-flops and counters, read the inputs at each active clock edge, write the state after every edge, and remember that an n-bit counter wraps round after 2ⁿ states.

Data acquisition & sampling

Nyquist criterion
fs > 2·fmax, fN = fs/2
Alias frequency
fa = |f − k·fs|, k = round(f/fs)
Step size
1 LSB = VFSR/2ᴺ
Quantisation error (rounding)
±½ LSB
Truncating ADC code
D = ⌊Vin/LSB⌋
Bits for a resolution r
2ᴺ ≥ span/r
Ideal SQNR, full-scale sine
SQNR = 6.02·N + 1.76 dB
Data rate
channels × fs × N bit/s
Multiplexed ADC
fs = 1/(n·(tc + tset))
UART
Tb = 1/baud; 8N1 = 10 bits per byte; bytes/s = baud/bits per frame
Baud rate divider
baud = fclk/(16·D)

Method

  1. Write down what is given: sampling rate, signal frequencies, number of bits, input range, baud rate.
  2. For sampling questions, compare each frequency with fs/2; a higher frequency appears at fa = |f − k·fs| with the nearest multiple of fs.
  3. For resolution questions, find 1 LSB = VFSR/2ᴺ, or the smallest N with 2ᴺ ≥ span/resolution.
  4. For data rates and UART links, count everything that is sent: channels, samples per second, bits or whole bytes per sample, and the start, parity and stop bits of every frame.

2Practice problems

1.Number systemsMedium
8-bit two's complement0−12806403201608040201

Set the bits so they store −17 in 8-bit two's complement. Read as an unsigned number, what is the pattern's value U?

N = −178 bit
U =
2.Number systemsHard
16 bit1 px1920 px1080 pxM = ? KiB

An uncompressed image is 1920 × 1080 pixels with 16 bits per pixel. How much memory M does it take, in KiB (1 KiB = 1024 bytes)?

1920 × 1080 px16 bit/px1 KiB = 1024 B
M = KiB
3.Digital logic: gates, K-maps & flip-flopsMedium
ABC000111100101324576

Simplify F = A′C′ + AC′ + ABC′ + AB to its minimal sum-of-products form. How many literals L does the simplified expression contain?

F = A′C′ + AC′ + ABC′ + AB
L =
4.Digital logic: gates, K-maps & flip-flopsHard
ABCD000111100001111010110302040507X6112113X15X140809111110

Find the minimal SOP form of F(A, B, C, D) = Σm(0, 1, 10, 11, 12, 13) + d(6, 14, 15), where d marks the don't-care conditions. How many product terms N does it have?

F(A, B, C, D) = Σm(0, 1, 10, 11, 12, 13) + d(6, 14, 15)
N =
5.Data acquisition & samplingMedium
Vin​N = 810 V2ᴺ − 11 LSB0.797 V?

An 8-bit ADC with an input range of 0 to 10 V truncates: its output code is ⌊Vin/LSB⌋ with 1 LSB = VFSR/2ᴺ. Find the decimal output code D for an input of 0.797 V.

N = 8VFSR = 10 VVin = 0.797 V
D =
6.Data acquisition & samplingHard
SD0​D1​D2​D3​D4​D5​D6​D7​Tb​10·Tb​9600 Bd, 8N1

A 12-bit ADC streams every sample over a UART at 9600 baud, format 8N1 (start bit, 8 data bits, 1 stop bit). Each sample is sent as 2 whole byte(s) and the link is busy all the time. Find the highest signal frequency fmax that can be sampled without aliasing, in Hz.

baud = 9600 BdN = 128N1
fmax = Hz

3Solutions

1.Number systems

Answer: U = 239

Setting bits: each bit is worth a power of two (128, 64, …, 1). One hex digit is exactly four bits, and in 8-bit two's complement the leftmost bit is worth −128. Bitwise operations work on each bit position separately.

Invert and add one

17 = 0001 0001
inverted: 1110 1110
+1 → 1110 1111

Read it as unsigned

1110 1111₂ = 256 − 17 = 239

Answer

U = 239
2.Number systems

Answer: M = 4050 KiB

Positional number systems: each digit is worth its value times a power of the base. In binary the places are worth 1, 2, 4, 8, 16, …; in hexadecimal 1, 16, 256, …, with A–F standing for 10–15. In 8-bit two's complement the leftmost bit is worth −128 instead of +128, which is how negative numbers are stored.

Bits and bytes

1920·1080·16 = 33177600 bit = 4147200 B

Convert to KiB

4147200/1024 = 4050 KiB

Answer

M = 4050 KiB
3.Digital logic: gates, K-maps & flip-flops

Answer: L = 3

Boolean algebra: the rules that simplify expressions are X + X′ = 1 and X·X′ = 0, X + X = X, absorption X + X·Y = X, the combining rule X·Y + X·Y′ = X, X + X′Y = X + Y and the consensus theorem XY + X′Z + YZ = XY + X′Z. De Morgan's laws turn (X·Y)′ into X′ + Y′ and (X + Y)′ into X′·Y′. A Karnaugh map applies these rules graphically: every group of two neighbouring cells is one use of XY + XY′ = X.

Minterms of the expression

A′C′ → m(0, 2)
AC′ → m(4, 6)
ABC′ → m(6)
AB → m(6, 7)
ABC00011110011001031214051716

Group and read off

F = C′ + AB

Count the literals

L = 3

Answer

L = 3
4.Digital logic: gates, K-maps & flip-flops

Answer: N = 3

Karnaugh maps: the cells are ordered in Gray code (00, 01, 11, 10), so neighbouring cells, including the ones across the edges, differ in exactly one variable. Group the 1s in rectangles of 1, 2, 4, 8 or 16 cells, as large as possible and as few as possible, until every 1 is covered. Each group is one product term: the variables that stay constant inside it. A group of 2ᵏ cells loses k variables. Don't-cares (X) may be used to make groups bigger but never have to be covered. Grouping the 0s instead gives the minimal POS form.

Prime implicants

The largest groups that can be formed from 1s and Xs.

AC, AB, A′B′C′
ABCD000111100001111010110302040507X6112113X15X140809111110

Minimal cover

F = AC + AB + A′B′C′
N = 3

Answer

N = 3
5.Data acquisition & sampling

Answer: D = 20

ADC resolution: an N-bit converter divides its full-scale range VFSR into 2ᴺ codes, from 0 to 2ᴺ − 1. One step is 1 LSB = VFSR/2ᴺ: the smallest change the converter can show. A truncating ADC gives the code ⌊Vin/LSB⌋; a rounding ADC is never more than ½ LSB away from the true value, its quantisation error. Every extra bit halves the LSB and adds about 6 dB to the ideal signal-to-quantisation-noise ratio SQNR = 6.02·N + 1.76 dB for a full-scale sine. To reach a resolution r over a span, choose the smallest N with 2ᴺ ≥ span/r.

Step size

1 LSB = 10/28 = 39.06 mV

Code

Vin/LSB = 797/39.06 = 20.4
code = ⌊20.4⌋ = 20

Answer

D = 20

In binary that is 00010100.

6.Data acquisition & sampling

Answer: fmax = 240 Hz

UART: an asynchronous serial link sends each byte as a frame: one start bit (low), the data bits, an optional parity bit and one or two stop bits (high). The baud rate is the number of bits per second, so one bit lasts Tb = 1/baud and a frame of n bits lasts n/baud. The common 8N1 format has 10 bits per byte. The baud generator divides the clock: baud = fclk/(16·D) with a whole number D, so the real baud rate differs slightly from the target; an error below about 2 % is usually acceptable.

Bits per sample on the line

2·10 = 20 bit

Highest sampling rate

fs,max = 9600/20 = 480 Hz

Nyquist limit

fmax = 480/2 = 240 Hz

Answer

fmax = 240 Hz

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