Digital Electronics: cram pack

Formula sheets, the key method steps for every topic and 6 practice problems, with full solutions at the back.

New problems Back to the course

In the print window, choose “Save as PDF” to keep a copy on your device.

1Formulas and methods

Number systems

Place values: binary 2^k, octal 8^k, hex 16^k
To decimal: Σ d_k·b^k
From decimal: divide by the base, read the remainders bottom-up
Hex ↔ binary: one hex digit = 4 bits
Two’s complement: invert the bits and add 1

Digital logic: gates, K-maps & flip-flops

Basic gates: A·B, A + B, A′, (A·B)′, (A + B)′, A ⊕ B
Boolean rules: X + X′ = 1, X·X′ = 0, X + XY = X, XY + XY′ = X
De Morgan: (X·Y)′ = X′ + Y′, (X + Y)′ = X′·Y′
Karnaugh map order: 00, 01, 11, 10 (Gray code)
Group of 2ᵏ cells: loses k variables
4-to-1 multiplexer: F = A′B′I₀ + A′BI₁ + AB′I₂ + ABI₃
Flip-flops: D: Q⁺ = D, T: Q⁺ = T ⊕ Q, JK: Q⁺ = JQ′ + K′Q
Counters: n-bit: 2ⁿ states; mod-N: smallest n with 2ⁿ ≥ N; f_out = f_clk/N
Ripple counter: f_max = 1/(n·t_pd)
Ring and Johnson counters: n and 2n states

Method

For a circuit, work from the inputs to the output one gate at a time and write the value on every wire, or write its expression and fill in the truth table.
For simplification, put the 1s (and the don’t-cares as X) into a Karnaugh map with Gray-code rows and columns: 00, 01, 11, 10.
Cover the 1s with as few and as large groups of 1, 2, 4, 8 or 16 cells as possible, wrapping round the edges; each group is one product term made of the variables that stay constant. Group the 0s for the POS form.
For flip-flops and counters, read the inputs at each active clock edge, write the state after every edge, and remember that an n-bit counter wraps round after 2ⁿ states.

Data acquisition & sampling

Nyquist criterion: f_s > 2·f_max, f_N = f_s/2
Alias frequency: f_a = |f − k·f_s|, k = round(f/f_s)
Step size: 1 LSB = V_FSR/2ᴺ
Quantisation error (rounding): ±½ LSB
Truncating ADC code: D = ⌊V_in/LSB⌋
Bits for a resolution r: 2ᴺ ≥ span/r
Ideal SQNR, full-scale sine: SQNR = 6.02·N + 1.76 dB
Data rate: channels × f_s × N bit/s
Multiplexed ADC: f_s = 1/(n·(t_c + t_set))
UART: T_b = 1/baud; 8N1 = 10 bits per byte; bytes/s = baud/bits per frame
Baud rate divider: baud = f_clk/(16·D)

Method

Write down what is given: sampling rate, signal frequencies, number of bits, input range, baud rate.
For sampling questions, compare each frequency with f_s/2; a higher frequency appears at f_a = |f − k·f_s| with the nearest multiple of f_s.
For resolution questions, find 1 LSB = V_FSR/2ᴺ, or the smallest N with 2ᴺ ≥ span/resolution.
For data rates and UART links, count everything that is sent: channels, samples per second, bits or whole bytes per sample, and the start, parity and stop bits of every frame.

2Practice problems

1.Number systemsMedium

Write −22 as an 8-bit two's complement pattern. Read the pattern as an unsigned binary number: what is its value U in decimal?

N = −228 bit

U =

2.Number systemsHard

What is the most negative integer N that can be stored in 12-bit two's complement?

12 bit

N =

3.Digital logic: gates, K-maps & flip-flopsMedium

In this Karnaugh map exactly one 1 has no neighbouring 1, so it stays a group of one cell (a full minterm of four literals) in the minimal SOP form. Neighbours across the map edges count. Click that cell.

F = Σm(0, 4, 6, 11, 12, 13, 14)

1AB = 00, CD = 00
2AB = 00, CD = 01
3AB = 00, CD = 11
4AB = 00, CD = 10
5AB = 01, CD = 00
6AB = 01, CD = 01
7AB = 01, CD = 11
8AB = 01, CD = 10
9AB = 11, CD = 00
10AB = 11, CD = 01
11AB = 11, CD = 11
12AB = 11, CD = 10
13AB = 10, CD = 00
14AB = 10, CD = 01
15AB = 10, CD = 11
16AB = 10, CD = 10

4.Digital logic: gates, K-maps & flip-flopsHard

A synchronous mod-11 counter counts 0, 1, …, 10 and then returns to 0. It starts at 5. Which count Q (in decimal) does it show after 21 clock pulses?

Q₀ = 521N = 11

Q =

5.Data acquisition & samplingMedium

A sensor measures distance over a span of 300 mm, and its output fills the whole input range of an ADC. The reading must resolve 0.1 mm. Find the smallest number of bits N the ADC needs.

span = 300 mmresolution = 0.1 mm

N =

6.Data acquisition & samplingHard

A 24-bit ADC streams every sample over a UART at 38400 baud, format 8E1 (start bit, 8 data bits, even parity, 1 stop bit). Each sample is sent as 3 whole byte(s) and the link is busy all the time. Find the highest signal frequency f_max that can be sampled without aliasing, in Hz.

baud = 38400 BdN = 248E1

f_max = Hz

3Solutions

1.Number systems

Answer: U = 234

Positional number systems: each digit is worth its value times a power of the base. In binary the places are worth 1, 2, 4, 8, 16, …; in hexadecimal 1, 16, 256, …, with A–F standing for 10–15. In 8-bit two's complement the leftmost bit is worth −128 instead of +128, which is how negative numbers are stored.

Invert and add one

22 = 0001 0110

inverted: 1110 1001

+1 → 1110 1010

Read it as unsigned

1110 1010₂ = 256 − 22 = 234

Answer

U = 234

2.Number systems

Answer: N = −2048

Most negative value

−2¹¹ = −2048

Answer

N = −2048

3.Digital logic: gates, K-maps & flip-flops

Answer: AB = 10, CD = 11

Karnaugh maps: the cells are ordered in Gray code (00, 01, 11, 10), so neighbouring cells, including the ones across the edges, differ in exactly one variable. Group the 1s in rectangles of 1, 2, 4, 8 or 16 cells, as large as possible and as few as possible, until every 1 is covered. Each group is one product term: the variables that stay constant inside it. A group of 2ᵏ cells loses k variables. Don't-cares (X) may be used to make groups bigger but never have to be covered. Grouping the 0s instead gives the minimal POS form.

Neighbours of each 1

A 1 with a neighbouring 1 can join a group of two or more.

m11: m10, m9, m15, m3 → 0

The isolated 1

m11 = AB′CD → AB = 10, CD = 11

Answer

AB = 10, CD = 11

4.Digital logic: gates, K-maps & flip-flops

Answer: Q = 4

Flip-flops and counters: a flip-flop changes only at the active clock edge. D copies its input (Q⁺ = D); T toggles when T = 1; JK holds for 00, resets for 01, sets for 10 and toggles for 11. An n-bit binary counter has 2ⁿ states and counts modulo 2ⁿ; a mod-N counter goes 0, 1, …, N − 1 and back to 0, and needs the smallest n with 2ⁿ ≥ N flip-flops. Each stage of a ripple counter halves the frequency, so the last output of a mod-N counter runs at f_clk/N. A Johnson counter of n flip-flops has 2n states, a ring counter n.

Full cycles

Every 11 pulses bring the counter back to the same state.

21 = 1·11 + 10

Count after the remaining pulses

Q = (5 + 10) mod 11 = 4

Q = 0100₂

Answer

Q = 4

5.Data acquisition & sampling

Answer: N = 12

ADC resolution: an N-bit converter divides its full-scale range V_FSR into 2ᴺ codes, from 0 to 2ᴺ − 1. One step is 1 LSB = V_FSR/2ᴺ: the smallest change the converter can show. A truncating ADC gives the code ⌊V_in/LSB⌋; a rounding ADC is never more than ½ LSB away from the true value, its quantisation error. Every extra bit halves the LSB and adds about 6 dB to the ideal signal-to-quantisation-noise ratio SQNR = 6.02·N + 1.76 dB for a full-scale sine. To reach a resolution r over a span, choose the smallest N with 2ᴺ ≥ span/r.

Steps needed

300/0.1 = 3000

Bits

log₂(3000) = 11.55

2¹¹ = 2048 < 3000 ≤ 2¹² = 4096

N = 12

Answer

N = 12

6.Data acquisition & sampling

Answer: f_max = 581.8 Hz

UART: an asynchronous serial link sends each byte as a frame: one start bit (low), the data bits, an optional parity bit and one or two stop bits (high). The baud rate is the number of bits per second, so one bit lasts T_b = 1/baud and a frame of n bits lasts n/baud. The common 8N1 format has 10 bits per byte. The baud generator divides the clock: baud = f_clk/(16·D) with a whole number D, so the real baud rate differs slightly from the target; an error below about 2 % is usually acceptable.

Bits per sample on the line

3·11 = 33 bit

Highest sampling rate

f_s,max = 38400/33 = 1164 Hz

Nyquist limit

f_max = 1164/2 = 581.8 Hz

Answer

f_max = 581.8 Hz

ExamProblems · examproblems.com/courses/digital-electronics