Digital Electronics: cram pack

Formula sheets, the key method steps for every topic and 6 practice problems, with full solutions at the back.

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1Formulas and methods

Number systems

Place values
binary 2k, octal 8k, hex 16k
To decimal
Σ dk·bk
From decimal
divide by the base, read the remainders bottom-up
Hex ↔ binary
one hex digit = 4 bits
Two’s complement
invert the bits and add 1

Digital logic: gates, K-maps & flip-flops

Basic gates
A·B, A + B, A′, (A·B)′, (A + B)′, A ⊕ B
Boolean rules
X + X′ = 1, X·X′ = 0, X + XY = X, XY + XY′ = X
De Morgan
(X·Y)′ = X′ + Y′, (X + Y)′ = X′·Y′
Karnaugh map order
00, 01, 11, 10 (Gray code)
Group of 2ᵏ cells
loses k variables
4-to-1 multiplexer
F = A′B′I0 + A′BI1 + AB′I2 + ABI3
Flip-flops
D: Q⁺ = D, T: Q⁺ = T ⊕ Q, JK: Q⁺ = JQ′ + K′Q
Counters
n-bit: 2ⁿ states; mod-N: smallest n with 2ⁿ ≥ N; fout = fclk/N
Ripple counter
fmax = 1/(n·tpd)
Ring and Johnson counters
n and 2n states

Method

  1. For a circuit, work from the inputs to the output one gate at a time and write the value on every wire, or write its expression and fill in the truth table.
  2. For simplification, put the 1s (and the don’t-cares as X) into a Karnaugh map with Gray-code rows and columns: 00, 01, 11, 10.
  3. Cover the 1s with as few and as large groups of 1, 2, 4, 8 or 16 cells as possible, wrapping round the edges; each group is one product term made of the variables that stay constant. Group the 0s for the POS form.
  4. For flip-flops and counters, read the inputs at each active clock edge, write the state after every edge, and remember that an n-bit counter wraps round after 2ⁿ states.

Data acquisition & sampling

Nyquist criterion
fs > 2·fmax, fN = fs/2
Alias frequency
fa = |f − k·fs|, k = round(f/fs)
Step size
1 LSB = VFSR/2ᴺ
Quantisation error (rounding)
±½ LSB
Truncating ADC code
D = ⌊Vin/LSB⌋
Bits for a resolution r
2ᴺ ≥ span/r
Ideal SQNR, full-scale sine
SQNR = 6.02·N + 1.76 dB
Data rate
channels × fs × N bit/s
Multiplexed ADC
fs = 1/(n·(tc + tset))
UART
Tb = 1/baud; 8N1 = 10 bits per byte; bytes/s = baud/bits per frame
Baud rate divider
baud = fclk/(16·D)

Method

  1. Write down what is given: sampling rate, signal frequencies, number of bits, input range, baud rate.
  2. For sampling questions, compare each frequency with fs/2; a higher frequency appears at fa = |f − k·fs| with the nearest multiple of fs.
  3. For resolution questions, find 1 LSB = VFSR/2ᴺ, or the smallest N with 2ᴺ ≥ span/resolution.
  4. For data rates and UART links, count everything that is sent: channels, samples per second, bits or whole bytes per sample, and the start, parity and stop bits of every frame.

2Practice problems

1.Number systemsMedium
place values in two's complement1−12816413201618140211

The 8-bit pattern 1110 1101 stores a signed integer in two's complement. What is its value N in decimal?

1110 11018 bit
N =
2.Number systemsHard
24-bit two's complement, N = ??sign???????????????????????

What is the most negative integer N that can be stored in 24-bit two's complement?

24 bit
N =
3.Digital logic: gates, K-maps & flip-flopsMedium
MUXCI0​C′I1​1I2​CI3​ABS1​S0​F

A 4-to-1 multiplexer has its select inputs S₁ = A and S₀ = B, and its data inputs tied to I₀ = C, I₁ = C′, I₂ = 1, I₃ = C. For how many of the 8 combinations of A, B and C is the output F = 1? Find N.

I₀ = CI₁ = C′I₂ = 1I₃ = C
N =
4.Digital logic: gates, K-maps & flip-flopsHard
TQ0​Q0​TQ1​Q1​TQ2​Q2​CLKUP

A 3-bit binary up counter starts at 6 (decimal, Q = 110). Which count Q (in decimal) does it show after 9 clock pulses?

Q0 = 69n = 3
Q =
5.Data acquisition & samplingMedium
124⋮4 ch∿01N = 1650 kHz? MB

A recorder samples 4 channels at 50 kHz each with a 16-bit ADC. Each sample is stored in whole bytes. Find the memory M needed for a 1 min recording, in MB (1 MB = 10⁶ bytes).

n = 4fs = 50 kHzN = 16t = 1 min
M = MB
6.Data acquisition & samplingHard
T10 mV/°C×4∿01N = 10, 10 V? °C/LSB

A temperature sensor gives 10 mV/°C (0 V at 0 °C). Its signal is amplified 4 times and fed to a 10-bit ADC with a range of 0 to 10 V (1 LSB = VFSR/2ᴺ). Find the temperature change ΔTLSB that corresponds to one LSB.

S = 10 mV/°CG = 4N = 10VFSR = 10 V
ΔTLSB = °C

3Solutions

1.Number systems

Answer: N = −19

Positional number systems: each digit is worth its value times a power of the base. In binary the places are worth 1, 2, 4, 8, 16, …; in hexadecimal 1, 16, 256, …, with A–F standing for 10–15. In 8-bit two's complement the leftmost bit is worth −128 instead of +128, which is how negative numbers are stored.

Add the place values

The other bits keep their normal positive values.

−128 + 64 + 32 + 8 + 4 + 1 = −19

Answer

N = −19
2.Number systems

Answer: N = −8.389 × 10⁶

Positional number systems: each digit is worth its value times a power of the base. In binary the places are worth 1, 2, 4, 8, 16, …; in hexadecimal 1, 16, 256, …, with A–F standing for 10–15. In 8-bit two's complement the leftmost bit is worth −128 instead of +128, which is how negative numbers are stored.

Most negative value

−223 = −8388608

Answer

N = −8388608
3.Digital logic: gates, K-maps & flip-flops

Answer: N = 5

Multiplexer: a 2ⁿ-to-1 multiplexer passes one of its data inputs to the output; the select lines, read as a binary number, pick which one. For a 4-to-1 MUX with selects S₁S₀ = AB, F = A′B′·I₀ + A′B·I₁ + AB′·I₂ + AB·I₃. Tying the data inputs to 0, 1, C or C′ makes the MUX produce any function of A, B and C, which is a common way to build logic with one chip.

Output expression

F = A′B′C + A′BC′ + AB′ + ABC

Rows with F = 1

ABC = 001, 010, 100, 101, 111
N = 5

Answer

N = 5
4.Digital logic: gates, K-maps & flip-flops

Answer: Q = 7

Flip-flops and counters: a flip-flop changes only at the active clock edge. D copies its input (Q⁺ = D); T toggles when T = 1; JK holds for 00, resets for 01, sets for 10 and toggles for 11. An n-bit binary counter has 2ⁿ states and counts modulo 2ⁿ; a mod-N counter goes 0, 1, …, N − 1 and back to 0, and needs the smallest n with 2ⁿ ≥ N flip-flops. Each stage of a ripple counter halves the frequency, so the last output of a mod-N counter runs at fclk/N. A Johnson counter of n flip-flops has 2n states, a ring counter n.

Full cycles

Every 8 pulses bring the counter back to the same state.

9 = 1·8 + 1

Count after the remaining pulses

Q = (6 + 1) mod 8 = 7
Q = 111₂

Answer

Q = 7
5.Data acquisition & sampling

Answer: M = 24 MB

Data rates: every channel delivers fs samples per second of N bits, so the raw rate is channels × fs × N bit/s. In memory a sample takes whole bytes (a 12-bit sample is stored in 2 bytes), so the memory for a recording is channels × fs × bytes per sample × time. A multiplexed ADC converts the channels one after another: each conversion (with settling) takes t, so one round of n channels takes n·t and each channel is sampled at 1/(n·t).

Bytes per sample

⌈16/8⌉ = 2 B

Byte rate

4·50000·2 = 400000 B/s

Memory

M = 400000·60 = 2.4 × 10⁷ B = 24 MB

Answer

M = 24 MB
6.Data acquisition & sampling

Answer: ΔTLSB = 0.2441 °C

ADC resolution: an N-bit converter divides its full-scale range VFSR into 2ᴺ codes, from 0 to 2ᴺ − 1. One step is 1 LSB = VFSR/2ᴺ: the smallest change the converter can show. A truncating ADC gives the code ⌊Vin/LSB⌋; a rounding ADC is never more than ½ LSB away from the true value, its quantisation error. Every extra bit halves the LSB and adds about 6 dB to the ideal signal-to-quantisation-noise ratio SQNR = 6.02·N + 1.76 dB for a full-scale sine. To reach a resolution r over a span, choose the smallest N with 2ᴺ ≥ span/r.

Step size

1 LSB = 10000/1024 = 9.766 mV

Sensitivity at the ADC

10·4 = 40 mV/°C

Temperature resolution

ΔTLSB = 9.766/40 = 0.2441 °C

Answer

ΔTLSB = 0.2441 °C

The ADC reaches full scale at 250 °C.

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