Identify the converter (buck, boost or buck-boost) and the duty cycle D from the voltage ratio.
Use volt-second balance on the inductor: the average inductor voltage over a period is zero.
Find the inductor voltage while the switch is on, then ΔIL = VL·D/(L·f).
For the output ripple, find the charge that flows in and out of the capacitor; for the CCM boundary, set the average inductor current equal to ΔIL/2.
Wheatstone bridge & strain gauges
Divider voltages
Va = VsR2/(R1 + R2), Vb = VsR4/(R3 + R4)
Output
Vab = Va − Vb
Balance
R1/R2 = R3/R4
Slide-wire bridge
R/Rx = l/(100 − l)
Thévenin resistance
Rth = R1∥R2 + R3∥R4
Gauge factor
ΔR/R = GF·ε
Bridge output
quarter Vs·GF·ε/4, half Vs·GF·ε/2, full Vs·GF·ε
Small change, one arm
Vab ≈ Vs·ΔR/(4R)
Stress
σ = E·ε
Method
Treat the bridge as two voltage dividers across the same supply.
For balance, set R₁/R₂ = R₃/R₄ and solve for the unknown resistor.
For an unbalanced bridge, find Va and Vb from the dividers and subtract; use the Thévenin equivalent when a meter loads the output.
For strain gauges, convert strain to ΔR/R = GF·ε and use Vs·GF·ε/4, /2 or ×1 for a quarter, half or full bridge.
Digital logic: gates, K-maps & flip-flops
Basic gates
A·B, A + B, A′, (A·B)′, (A + B)′, A ⊕ B
Boolean rules
X + X′ = 1, X·X′ = 0, X + XY = X, XY + XY′ = X
De Morgan
(X·Y)′ = X′ + Y′, (X + Y)′ = X′·Y′
Karnaugh map order
00, 01, 11, 10 (Gray code)
Group of 2ᵏ cells
loses k variables
4-to-1 multiplexer
F = A′B′I0 + A′BI1 + AB′I2 + ABI3
Flip-flops
D: Q⁺ = D, T: Q⁺ = T ⊕ Q, JK: Q⁺ = JQ′ + K′Q
Counters
n-bit: 2ⁿ states; mod-N: smallest n with 2ⁿ ≥ N; fout = fclk/N
Ripple counter
fmax = 1/(n·tpd)
Ring and Johnson counters
n and 2n states
Method
For a circuit, work from the inputs to the output one gate at a time and write the value on every wire, or write its expression and fill in the truth table.
For simplification, put the 1s (and the don’t-cares as X) into a Karnaugh map with Gray-code rows and columns: 00, 01, 11, 10.
Cover the 1s with as few and as large groups of 1, 2, 4, 8 or 16 cells as possible, wrapping round the edges; each group is one product term made of the variables that stay constant. Group the 0s for the POS form.
For flip-flops and counters, read the inputs at each active clock edge, write the state after every edge, and remember that an n-bit counter wraps round after 2ⁿ states.
2Practice problems
1.Diodes & transistorsMedium
An NPN transistor with β = 120 has voltage-divider bias from VCC = 12 V: R₁ = 33 kΩ from VCC to the base and R₂ = 15 kΩ from the base to ground. The collector resistor is RC = 2.2 kΩ and the emitter resistor is RE = 1.2 kΩ. Take VBE = 0.7 V and use the Thévenin equivalent of the divider (do not neglect the base current). Find the collector–emitter voltage VCE.
A diode is modelled as 0.65 V in series with 50 Ω (it conducts above 0.65 V). It is in series with a 1000 Ω resistor across a 9 V supply. Find the operating current ID where the diode line meets the load line.
Vs = 9 VR = 1000 ΩV0 = 0.65 Vrd = 50 Ω
ID = mA
3.Op-amp circuitsMedium
The op-amp is ideal and runs from ±15 V supplies; its output saturates at ±13 V. The inverting amplifier is driven by a sine wave. Find the largest input amplitude Vin,max (peak value) for which the output does not clip.
R1 = 47 kΩRf = 100 kΩVsat = ±13 V
Vin,max = V
4.Op-amp circuitsHard
The summing amplifier uses an ideal op-amp with ±15 V supplies. Find the output voltage Vout.
The inductor carries no current before the switch closes at t = 0. How long after the switch closes does the current reach 90% of its final value? Find t.
Vs = 10 VR = 10 ΩL = 47 mH
t = ms
6.RC & RL transientsHard
The switch has been closed for a long time, so the circuit is in steady state. At t = 0 the switch opens. Find the capacitor voltage vC at t = 60 ms.
Vs = 6 VR1 = 10 kΩR2 = 10 kΩC = 22 µFt = 60 ms
vC = V
7.Series & parallel resistorsMedium
Find the equivalent resistance Req seen by the source V1.
V1 = 12 VR1 = 8 ΩR2 = 20 ΩR3 = 6 ΩR4 = 2 Ω
Req = Ω
8.Series & parallel resistorsHard
Find the equivalent resistance Req seen by the source V1.
A buck converter turns 48 V into 36 V for a 20 Ω load. It switches at 500 kHz with L = 22 µH. Find the peak inductor current Imax.
Vin = 48 VVo = 36 Vf = 500 kHzL = 22 µHR = 20 Ω
Imax = A
10.DC-DC convertersHard
An ideal buck converter turns 9 V into 6.3 V for a 4 Ω load at 40 kHz. Find the smallest inductance Lcrit for continuous conduction.
Vin = 9 VVo = 6.3 Vf = 40 kHzR = 4 Ω
Lcrit = µH
11.Wheatstone bridge & strain gaugesMedium
A bridge with four 120 Ω arms is supplied with 6 V. When the sensor R₂ changes, the output reads Vab = 142.9 mV. Find the exact change ΔR of R₂.
Vs = 6 VR = 120 ΩVab = 142.9 mV
ΔR = Ω
12.Wheatstone bridge & strain gaugesHard
A bridge with 120 Ω arms is excited with 10 V and has two active gauges in adjacent arms, one in tension and one in compression (half bridge). The gauge factor is 2 and the strain is 1500 µε. Find the bridge output Vo in mV.
Simplify F = AC′ + ABC + A′BC + AB′C to its minimal sum-of-products form. How many literals L does the simplified expression contain?
F = AC′ + ABC + A′BC + AB′C
L =
14.Digital logic: gates, K-maps & flip-flopsHard
A 4-bit binary down counter starts at 1 (decimal, Q = 0001). Which count Q (in decimal) does it show after 42 clock pulses?
Q0 = 142n = 4
Q =
3Solutions
1.Diodes & transistors
Answer: VCE = 3.975 V
BJT bias point: in the active region VBE = 0.7 V, IC = β·IB and IE = (β + 1)·IB. Find IB from the base loop with KVL, then IC, then VCE from the collector–emitter loop. A voltage divider at the base is replaced by its Thévenin equivalent VTH = VCC·R₂/(R₁ + R₂), RTH = R₁∥R₂; an emitter resistor appears (β + 1) times larger in the base loop.
Thévenin equivalent of the divider
VTH = 12·15/(33 + 15) = 3.75 V
RTH = 33·15/(33 + 15) = 10.31 kΩ
Base current
KVL around the base loop; the emitter current is (β + 1)·IB.
IB = (3.75 − 0.7)/(10.31 + 121·1.2) = 19.61 µA
Collector current
IC = 120·19.61 µA = 2.354 mA
IE = 121·19.61 µA = 2.373 mA
Collector–emitter voltage
VCE = 12 − 2.354·2.2 − 2.373·1.2 = 3.975 V
Answer
VCE = 3.975 V
2.Diodes & transistors
Answer: ID = 7.952 mA
LED and diode circuits: a forward-biased LED drops roughly its forward voltage VF (about 2 V for red, 3 V for blue or white), whatever the current. A series resistor sets the current: R = (Vs − n·VF)/I for n LEDs in series. With a more exact diode model V = V₀ + I·rd, the operating point is where the diode line meets the load line I = (Vs − V)/R, so I = (Vs − V₀)/(R + rd).
Combine the two equations
9 = 0.65 + I·(1000 + 50)
Operating current
ID = 8.35/1050 = 7.952 mA
VD = 0.65 + 0.007952·50 = 1.048 V
Answer
ID = 7.952 mA
3.Op-amp circuits
Answer: Vin,max = 6.11 V
Ideal op-amp rules: with negative feedback, the op-amp drives its output so that its two inputs sit at the same voltage (V₋ = V₊), and no current flows into either input. Writing KCL at the inverting input with these two facts gives the output.
Gain
|Av| = Rf/R1 = 100/47 = 2.128
Largest input before clipping
Vin,max = Vsat/|Av| = 13/2.128 = 6.11 V
Answer
Vin,max = 6.11 V
4.Op-amp circuits
Answer: Vout = 1.171 V
Ideal op-amp rules: with negative feedback, the op-amp drives its output so that its two inputs sit at the same voltage (V₋ = V₊), and no current flows into either input. Writing KCL at the inverting input with these two facts gives the output.
Input currents
V₋ = 0, so each input resistor has its full input voltage across it.
I1 = V1/R1 = −1/4.7 = −0.2128 mA
I2 = V2/R2 = −0.8/22 = −0.03636 mA
If = I1 + I2 = −0.2491 mA
Output voltage
Vout = −Rf·If = −4.7·(−0.2491) = 1.171 V
Answer
Vout = 1.171 V
5.RC & RL transients
Answer: t = 10.82 ms
First-order transients: in a circuit with one capacitor or one inductor, every voltage and current moves exponentially from its initial value to its final value: x(t) = x(∞) + [x(0) − x(∞)]·e−t/τ, with τ = RC or τ = L/R. After about 5τ the circuit has settled.
Time constant and final current
Long after the switch closes the inductor behaves like a short circuit, so the final current is set by R alone.
τ = L/R = 47 mH / 10 Ω = 4.7 ms
i(∞) = Vs/R = 10/10 = 1 A
Solve for the time
0.9 = 1 − e−t/τ → t = −τ·ln(1 − 0.9)
t = −4.7·ln(0.1) = 10.82 ms
Answer
t = 10.82 ms
6.RC & RL transients
Answer: vC = 2.284 V
First-order transients: in a circuit with one capacitor or one inductor, every voltage and current moves exponentially from its initial value to its final value: x(t) = x(∞) + [x(0) − x(∞)]·e−t/τ, with τ = RC or τ = L/R. After about 5τ the circuit has settled.
Initial capacitor voltage
In steady state the capacitor is an open circuit, so R₁ and R₂ form a voltage divider. The capacitor voltage cannot jump when the switch opens.
vC(0) = 6·10/(10 + 10) = 3 V
Time constant after the switch opens
τ = R2·C = 10·22 = 220 ms
Discharge
vC(t) = 3·e−60/220 = 2.284 V
Answer
vC = 2.284 V
7.Series & parallel resistors
Answer: Req = 13.71 Ω
Series and parallel resistors: in series the same current flows through each resistor and R = R₁ + R₂ + …. In parallel each resistor has the same voltage and 1/R = 1/R₁ + 1/R₂ + …. A ladder network is reduced one pair at a time until a single equivalent resistance remains.
Combine resistors from the far end
Start at the end farthest from the source and work back towards it. Resistors carrying the same current are in series; resistors across the same two nodes are in parallel.
R3 + R4 = 6 + 2 = 8 Ω
R2 ∥ 8 = 20·8/(20+8) = 5.714 Ω
Req = R1 + 5.714 = 8 + 5.714 = 13.71 Ω
Answer
Req = 13.71 Ω
8.Series & parallel resistors
Answer: Req = 12.91 Ω
Series and parallel resistors: in series the same current flows through each resistor and R = R₁ + R₂ + …. In parallel each resistor has the same voltage and 1/R = 1/R₁ + 1/R₂ + …. A ladder network is reduced one pair at a time until a single equivalent resistance remains.
Combine resistors from the far end
Start at the end farthest from the source and work back towards it. Resistors carrying the same current are in series; resistors across the same two nodes are in parallel.
R5 + R6 = 12 + 12 = 24 Ω
R4 ∥ 24 = 2.667 Ω
R3 + 2.667 = 10.67 Ω
R2 ∥ 10.67 = 2.909 Ω
Req = R1 + 2.909 = 10 + 2.909 = 12.91 Ω
Answer
Req = 12.91 Ω
9.DC-DC converters
Answer: Imax = 2.209 A
DC-DC converters: a switch S turns on for the fraction D of each period T = 1/f. In steady state the average inductor voltage is zero (volt-second balance), which gives the ideal conversion ratios in continuous conduction: buck Vo = D·Vin, boost Vo = Vin/(1 − D), inverting buck-boost |Vo| = Vin·D/(1 − D). An ideal converter keeps the power: Vin·Iin = Vo·Io. While S is on the inductor current rises by ΔIL = VL·D·T/L, with VL = Vin − Vo for the buck and Vin for the boost and buck-boost. The output ripple is ΔVo = ΔIL/(8fC) for the buck and Io·D/(fC) for the boost and buck-boost. The inductor current just touches zero (the CCM boundary) when the average inductor current equals ΔIL/2.
Duty cycle
D = 36/48 = 0.75
Average and ripple current
Io = 36/20 = 1.8 A
ΔIL = VL·D/(L·f) = 12·0.75/(22·10⁻⁶·500·10³) = 0.8182 A
Peak current
Imax = 1.8 + 0.8182/2 = 2.209 A
Answer
Imax = 2.209 A
10.DC-DC converters
Answer: Lcrit = 15 µH
DC-DC converters: a switch S turns on for the fraction D of each period T = 1/f. In steady state the average inductor voltage is zero (volt-second balance), which gives the ideal conversion ratios in continuous conduction: buck Vo = D·Vin, boost Vo = Vin/(1 − D), inverting buck-boost |Vo| = Vin·D/(1 − D). An ideal converter keeps the power: Vin·Iin = Vo·Io. While S is on the inductor current rises by ΔIL = VL·D·T/L, with VL = Vin − Vo for the buck and Vin for the boost and buck-boost. The output ripple is ΔVo = ΔIL/(8fC) for the buck and Io·D/(fC) for the boost and buck-boost. The inductor current just touches zero (the CCM boundary) when the average inductor current equals ΔIL/2.
Duty cycle
D = 6.3/9 = 0.7
Boundary condition
Set the average inductor current equal to half the ripple current and solve for L.
Lcrit = (1 − D)·R/(2f)
Critical inductance
Lcrit = (1 − 0.7)·4/(240·10³) = 15 µH
Answer
Lcrit = 15 µH
11.Wheatstone bridge & strain gauges
Answer: ΔR = 12 Ω
Wheatstone bridge: two voltage dividers share one supply Vs. The left divider R1–R2 gives Va = Vs·R2/(R1 + R2) and the right divider R3–R4 gives Vb = Vs·R4/(R3 + R4); the output is Vab = Va − Vb. The bridge is balanced (Vab = 0, no current in the meter) when R1/R2 = R3/R4, that is R1·R4 = R2·R3. Seen from the output, the bridge is a Thévenin source with Rth = R1∥R2 + R3∥R4.
Node voltage
Va = 3 + 0.1429 = 3.143 V
Solve the divider
R₂ = 120·3.143/(6 − 3.143) = 132 Ω
ΔR = 132 − 120 = 12 Ω
Answer
ΔR = 12 Ω
12.Wheatstone bridge & strain gauges
Answer: Vo = 15 mV
Strain gauges: a gauge changes its resistance with strain: ΔR/R = GF·ε, where the gauge factor GF is about 2 for metal foil. In a bridge with all arms equal to R, one active gauge (quarter bridge) gives Vo ≈ Vs·GF·ε/4. Two active gauges with opposite strains in adjacent arms (half bridge) give Vs·GF·ε/2, and four (full bridge) give Vs·GF·ε. Stress follows from Hooke’s law, σ = E·ε. Load cells state their sensitivity in mV/V: the output at full load per volt of excitation.
Relative resistance change
ΔR/R = 2·1500·10⁻⁶ = 0.003
Bridge output
Vo = Vs·GF·ε/2 = 10·0.003/2 = 15 mV
Answer
Vo = 15 mV
13.Digital logic: gates, K-maps & flip-flops
Answer: L = 3
Boolean algebra: the rules that simplify expressions are X + X′ = 1 and X·X′ = 0, X + X = X, absorption X + X·Y = X, the combining rule X·Y + X·Y′ = X, X + X′Y = X + Y and the consensus theorem XY + X′Z + YZ = XY + X′Z. De Morgan's laws turn (X·Y)′ into X′ + Y′ and (X + Y)′ into X′·Y′. A Karnaugh map applies these rules graphically: every group of two neighbouring cells is one use of XY + XY′ = X.
Minterms of the expression
AC′ → m(4, 6)
ABC → m(7)
A′BC → m(3)
AB′C → m(5)
Group and read off
F = BC + A
Count the literals
L = 3
Answer
L = 3
14.Digital logic: gates, K-maps & flip-flops
Answer: Q = 7
Flip-flops and counters: a flip-flop changes only at the active clock edge. D copies its input (Q⁺ = D); T toggles when T = 1; JK holds for 00, resets for 01, sets for 10 and toggles for 11. An n-bit binary counter has 2ⁿ states and counts modulo 2ⁿ; a mod-N counter goes 0, 1, …, N − 1 and back to 0, and needs the smallest n with 2ⁿ ≥ N flip-flops. Each stage of a ripple counter halves the frequency, so the last output of a mod-N counter runs at fclk/N. A Johnson counter of n flip-flops has 2n states, a ring counter n.
Full cycles
Every 16 pulses bring the counter back to the same state.