Identify the converter (buck, boost or buck-boost) and the duty cycle D from the voltage ratio.
Use volt-second balance on the inductor: the average inductor voltage over a period is zero.
Find the inductor voltage while the switch is on, then ΔIL = VL·D/(L·f).
For the output ripple, find the charge that flows in and out of the capacitor; for the CCM boundary, set the average inductor current equal to ΔIL/2.
Wheatstone bridge & strain gauges
Divider voltages
Va = VsR2/(R1 + R2), Vb = VsR4/(R3 + R4)
Output
Vab = Va − Vb
Balance
R1/R2 = R3/R4
Slide-wire bridge
R/Rx = l/(100 − l)
Thévenin resistance
Rth = R1∥R2 + R3∥R4
Gauge factor
ΔR/R = GF·ε
Bridge output
quarter Vs·GF·ε/4, half Vs·GF·ε/2, full Vs·GF·ε
Small change, one arm
Vab ≈ Vs·ΔR/(4R)
Stress
σ = E·ε
Method
Treat the bridge as two voltage dividers across the same supply.
For balance, set R₁/R₂ = R₃/R₄ and solve for the unknown resistor.
For an unbalanced bridge, find Va and Vb from the dividers and subtract; use the Thévenin equivalent when a meter loads the output.
For strain gauges, convert strain to ΔR/R = GF·ε and use Vs·GF·ε/4, /2 or ×1 for a quarter, half or full bridge.
Digital logic: gates, K-maps & flip-flops
Basic gates
A·B, A + B, A′, (A·B)′, (A + B)′, A ⊕ B
Boolean rules
X + X′ = 1, X·X′ = 0, X + XY = X, XY + XY′ = X
De Morgan
(X·Y)′ = X′ + Y′, (X + Y)′ = X′·Y′
Karnaugh map order
00, 01, 11, 10 (Gray code)
Group of 2ᵏ cells
loses k variables
4-to-1 multiplexer
F = A′B′I0 + A′BI1 + AB′I2 + ABI3
Flip-flops
D: Q⁺ = D, T: Q⁺ = T ⊕ Q, JK: Q⁺ = JQ′ + K′Q
Counters
n-bit: 2ⁿ states; mod-N: smallest n with 2ⁿ ≥ N; fout = fclk/N
Ripple counter
fmax = 1/(n·tpd)
Ring and Johnson counters
n and 2n states
Method
For a circuit, work from the inputs to the output one gate at a time and write the value on every wire, or write its expression and fill in the truth table.
For simplification, put the 1s (and the don’t-cares as X) into a Karnaugh map with Gray-code rows and columns: 00, 01, 11, 10.
Cover the 1s with as few and as large groups of 1, 2, 4, 8 or 16 cells as possible, wrapping round the edges; each group is one product term made of the variables that stay constant. Group the 0s for the POS form.
For flip-flops and counters, read the inputs at each active clock edge, write the state after every edge, and remember that an n-bit counter wraps round after 2ⁿ states.
2Practice problems
1.Diodes & transistorsMedium
A 9.1 V Zener regulator is fed from 20 V through 150 Ω and supplies a 1000 Ω load. Find the Zener current IZ.
Vin = 20 VVZ = 9.1 VR = 150 ΩRL = 1000 Ω
IZ = mA
2.Diodes & transistorsHard
An NPN transistor with β = 50 switches a 680 Ω load resistor connected between VCC = 24 V and its collector. The emitter is grounded. The base is driven from a 5 V logic output through a base resistor RB. Take VBE = 0.7 V and VCE(sat) = 0.2 V. Find the largest base resistor RB, in kΩ, that still drives the transistor just into saturation.
The op-amp is ideal and runs from ±15 V supplies; its output saturates at ±12 V. The inverting amplifier is driven by a sine wave. Find the largest input amplitude Vin,max (peak value) for which the output does not clip.
R1 = 10 kΩRf = 100 kΩVsat = ±12 V
Vin,max = V
4.Op-amp circuitsHard
Two ideal op-amp stages are connected in cascade: an inverting amplifier (R1, Rf1) followed by a non-inverting amplifier (R2 to ground, Rf2 in the feedback). Both run from ±15 V supplies. The input is Vin = 0.15 V. Find the output voltage Vout.
The inductor carries no current before the switch closes at t = 0. Find the energy W(∞) stored in the inductor once the circuit has settled, in mJ.
Vs = 20 VR = 50 ΩL = 33 mH
W(∞) = mJ
6.RC & RL transientsHard
The switch across R2 has been closed for a long time, so the inductor current is steady. At t = 0 the switch opens. Find the inductor current i at t = 1 ms.
Vs = 9 VR1 = 47 ΩR2 = 10 ΩL = 68 mHt = 1 ms
i = A
7.Series & parallel resistorsMedium
Find the equivalent resistance Req seen by the source V1.
A buck converter turns 12 V into 9 V for a 2.5 Ω load. It switches at 20 kHz with L = 47 µH. Find the peak inductor current Imax.
Vin = 12 VVo = 9 Vf = 20 kHzL = 47 µHR = 2.5 Ω
Imax = A
10.DC-DC convertersHard
An ideal boost converter turns 36 V into 48 V for a 5 Ω load at 50 kHz. Find the smallest inductance Lcrit for continuous conduction.
Vin = 36 VVo = 48 Vf = 50 kHzR = 5 Ω
Lcrit = µH
11.Wheatstone bridge & strain gaugesMedium
A 400 Ω strain gauge is one arm (R₂) of a bridge with four equal 400 Ω arms and an excitation of 3 V. Find the power Pg dissipated in the gauge, in mW. Self-heating limits the excitation.
Vs = 3 VR = 400 Ω
Pg = mW
12.Wheatstone bridge & strain gaugesHard
A quarter bridge (one active gauge, GF = 2) is excited with 10 V. The largest strain to be measured is 1000 µε, and it must give 5 V at the input of an analogue-to-digital converter. Find the amplifier gain G.
Simplify F = AB′ + A′B′ + B′C′ to its minimal sum-of-products form. How many literals L does the simplified expression contain?
F = AB′ + A′B′ + B′C′
L =
14.Digital logic: gates, K-maps & flip-flopsHard
A positive-edge-triggered JK flip-flop starts with Q = 0 and receives the inputs shown at 6 rising clock edges. How many times N does Q change state?
Q₀ = 0JK
N =
3Solutions
1.Diodes & transistors
Answer: IZ = 63.57 mA
Zener regulator: a reverse-biased Zener diode holds its voltage VZ while its current stays above a minimum IZ,min. The series resistor R takes the difference between input and output: IR = (Vin − VZ)/R. That current splits between the load, IL = VZ/RL, and the Zener: IZ = IR − IL. Design for the worst cases: the lowest input with the largest load must still leave IZ,min, and the highest input with no load gives the largest Zener power PZ = VZ·IZ.
Resistor current
IR = 10.9/150 = 72.67 mA
Load current
IL = 9.1/1000 = 9.1 mA
Zener current
IZ = 72.67 − 9.1 = 63.57 mA
Answer
IZ = 63.57 mA
2.Diodes & transistors
Answer: RB = 6.143 kΩ
BJT as a switch: to switch a load fully on, the transistor is driven into saturation, where VCE = VCE(sat) and the collector current is set by the load: IC(sat) = (VCC − VCE(sat))/RC. Saturation needs at least IB = IC(sat)/β. If the base current is smaller, the transistor stays active and IC = β·IB.
Collector current in saturation
IC(sat) = (24 − 0.2)/680 = 35 mA
Minimum base current
IB(min) = IC(sat)/β = 35/50 = 700 µA
Base resistor
RB = (5 − 0.7)/IB = 4.3 V/0.7 mA = 6.143 kΩ
Answer
RB = 6.143 kΩ
Any smaller base resistor also saturates the transistor; in practice you pick one a few times smaller.
3.Op-amp circuits
Answer: Vin,max = 1.2 V
Ideal op-amp rules: with negative feedback, the op-amp drives its output so that its two inputs sit at the same voltage (V₋ = V₊), and no current flows into either input. Writing KCL at the inverting input with these two facts gives the output.
Gain
|Av| = Rf/R1 = 100/10 = 10
Largest input before clipping
Vin,max = Vsat/|Av| = 12/10 = 1.2 V
Answer
Vin,max = 1.2 V
4.Op-amp circuits
Answer: Vout = −1.41 V
Ideal op-amp rules: with negative feedback, the op-amp drives its output so that its two inputs sit at the same voltage (V₋ = V₊), and no current flows into either input. Writing KCL at the inverting input with these two facts gives the output.
Gain of each stage
A1 = −Rf1/R1 = −47/10 = −4.7
A2 = 1 + Rf2/R2 = 1 + 100/100 = 2
Stage by stage
V1 = −4.7·0.15 = −0.705 V
Vout = 2·(−0.705) = −1.41 V
Answer
Vout = −1.41 V
5.RC & RL transients
Answer: W(∞) = 2.64 mJ
First-order transients: in a circuit with one capacitor or one inductor, every voltage and current moves exponentially from its initial value to its final value: x(t) = x(∞) + [x(0) − x(∞)]·e−t/τ, with τ = RC or τ = L/R. After about 5τ the circuit has settled.
Time constant and final current
Long after the switch closes the inductor behaves like a short circuit, so the final current is set by R alone.
τ = L/R = 33 mH / 50 Ω = 0.66 ms
i(∞) = Vs/R = 20/50 = 0.4 A
Stored energy
W(∞) = ½·L·i(∞)² = ½·33·0.4² = 2.64 mJ
Answer
W(∞) = 2.64 mJ
6.RC & RL transients
Answer: i = 0.1724 A
First-order transients: in a circuit with one capacitor or one inductor, every voltage and current moves exponentially from its initial value to its final value: x(t) = x(∞) + [x(0) − x(∞)]·e−t/τ, with τ = RC or τ = L/R. After about 5τ the circuit has settled.
Initial value, final value, time constant
Before t = 0 the closed switch bypasses R₂; afterwards R₁ and R₂ are both in the loop.
i(0) = 9/47 = 0.1915 A
i(∞) = 9/(47 + 10) = 0.1579 A
τ = L/R = 68/57 = 1.193 ms
i(t) = 0.1579 + (0.1915 − 0.1579)·e−t/τ
Current at the given time
i(1) = 0.1579 + (0.03359)·e−1/1.193 = 0.1724 A
Answer
i = 0.1724 A
7.Series & parallel resistors
Answer: Req = 8.917 Ω
Series and parallel resistors: in series the same current flows through each resistor and R = R₁ + R₂ + …. In parallel each resistor has the same voltage and 1/R = 1/R₁ + 1/R₂ + …. A ladder network is reduced one pair at a time until a single equivalent resistance remains.
Combine resistors from the far end
Start at the end farthest from the source and work back towards it. Resistors carrying the same current are in series; resistors across the same two nodes are in parallel.
R3 + R4 = 2 + 5 = 7 Ω
R2 ∥ 7 = 5·7/(5+7) = 2.917 Ω
Req = R1 + 2.917 = 6 + 2.917 = 8.917 Ω
Answer
Req = 8.917 Ω
8.Series & parallel resistors
Answer: IR2 = 1.422 A
Series and parallel resistors: in series the same current flows through each resistor and R = R₁ + R₂ + …. In parallel each resistor has the same voltage and 1/R = 1/R₁ + 1/R₂ + …. A ladder network is reduced one pair at a time until a single equivalent resistance remains.
Combine resistors from the far end
Start at the end farthest from the source and work back towards it. Resistors carrying the same current are in series; resistors across the same two nodes are in parallel.
R5 + R6 = 2 + 12 = 14 Ω
R4 ∥ 14 = 9.545 Ω
R3 + 9.545 = 12.55 Ω
R2 ∥ 12.55 = 4.885 Ω
Req = R1 + 4.885 = 8 + 4.885 = 12.88 Ω
Current from the source
The source sees only Req, so Ohm’s law gives the current it delivers. That current flows through R₁.
IR1 = V1/Req = 30/12.88 = 2.328 A
Current through R₂
Subtract the drop across R₁ to get the voltage at node A, which is the voltage across R₂.
VA = V1 − IR1·R1 = 30 − 2.328·8 = 11.37 V
IR2 = VA/R2 = 11.37/8 = 1.422 A
Answer
IR2 = 1.422 A
9.DC-DC converters
Answer: Imax = 4.797 A
DC-DC converters: a switch S turns on for the fraction D of each period T = 1/f. In steady state the average inductor voltage is zero (volt-second balance), which gives the ideal conversion ratios in continuous conduction: buck Vo = D·Vin, boost Vo = Vin/(1 − D), inverting buck-boost |Vo| = Vin·D/(1 − D). An ideal converter keeps the power: Vin·Iin = Vo·Io. While S is on the inductor current rises by ΔIL = VL·D·T/L, with VL = Vin − Vo for the buck and Vin for the boost and buck-boost. The output ripple is ΔVo = ΔIL/(8fC) for the buck and Io·D/(fC) for the boost and buck-boost. The inductor current just touches zero (the CCM boundary) when the average inductor current equals ΔIL/2.
Duty cycle
D = 9/12 = 0.75
Average and ripple current
Io = 9/2.5 = 3.6 A
ΔIL = VL·D/(L·f) = 3·0.75/(47·10⁻⁶·20·10³) = 2.394 A
Peak current
Imax = 3.6 + 2.394/2 = 4.797 A
Answer
Imax = 4.797 A
10.DC-DC converters
Answer: Lcrit = 7.031 µH
DC-DC converters: a switch S turns on for the fraction D of each period T = 1/f. In steady state the average inductor voltage is zero (volt-second balance), which gives the ideal conversion ratios in continuous conduction: buck Vo = D·Vin, boost Vo = Vin/(1 − D), inverting buck-boost |Vo| = Vin·D/(1 − D). An ideal converter keeps the power: Vin·Iin = Vo·Io. While S is on the inductor current rises by ΔIL = VL·D·T/L, with VL = Vin − Vo for the buck and Vin for the boost and buck-boost. The output ripple is ΔVo = ΔIL/(8fC) for the buck and Io·D/(fC) for the boost and buck-boost. The inductor current just touches zero (the CCM boundary) when the average inductor current equals ΔIL/2.
Duty cycle
D = 1 − 36/48 = 0.25
Boundary condition
Set the average inductor current equal to half the ripple current and solve for L.
Lcrit = D(1 − D)²·R/(2f)
Critical inductance
Lcrit = 0.25(1 − 0.25)²·5/(250·10³) = 7.031 µH
Answer
Lcrit = 7.031 µH
11.Wheatstone bridge & strain gauges
Answer: Pg = 5.625 mW
Wheatstone bridge: two voltage dividers share one supply Vs. The left divider R1–R2 gives Va = Vs·R2/(R1 + R2) and the right divider R3–R4 gives Vb = Vs·R4/(R3 + R4); the output is Vab = Va − Vb. The bridge is balanced (Vab = 0, no current in the meter) when R1/R2 = R3/R4, that is R1·R4 = R2·R3. Seen from the output, the bridge is a Thévenin source with Rth = R1∥R2 + R3∥R4.
Voltage across the gauge
V = 3/2 = 1.5 V
Power
Pg = 1.5²/400 = 5.625 mW
Answer
Pg = 5.625 mW
12.Wheatstone bridge & strain gauges
Answer: G = 1000
Strain gauges: a gauge changes its resistance with strain: ΔR/R = GF·ε, where the gauge factor GF is about 2 for metal foil. In a bridge with all arms equal to R, one active gauge (quarter bridge) gives Vo ≈ Vs·GF·ε/4. Two active gauges with opposite strains in adjacent arms (half bridge) give Vs·GF·ε/2, and four (full bridge) give Vs·GF·ε. Stress follows from Hooke’s law, σ = E·ε. Load cells state their sensitivity in mV/V: the output at full load per volt of excitation.
Bridge output at full scale
Vo = 5 mV
Gain
G = 5/0.005 = 1000
Answer
G = 1000
13.Digital logic: gates, K-maps & flip-flops
Answer: L = 1
Boolean algebra: the rules that simplify expressions are X + X′ = 1 and X·X′ = 0, X + X = X, absorption X + X·Y = X, the combining rule X·Y + X·Y′ = X, X + X′Y = X + Y and the consensus theorem XY + X′Z + YZ = XY + X′Z. De Morgan's laws turn (X·Y)′ into X′ + Y′ and (X + Y)′ into X′·Y′. A Karnaugh map applies these rules graphically: every group of two neighbouring cells is one use of XY + XY′ = X.
Minterms of the expression
AB′ → m(4, 5)
A′B′ → m(0, 1)
B′C′ → m(0, 4)
Group and read off
F = B′
Count the literals
L = 1
Answer
L = 1
14.Digital logic: gates, K-maps & flip-flops
Answer: N = 4
Flip-flops and counters: a flip-flop changes only at the active clock edge. D copies its input (Q⁺ = D); T toggles when T = 1; JK holds for 00, resets for 01, sets for 10 and toggles for 11. An n-bit binary counter has 2ⁿ states and counts modulo 2ⁿ; a mod-N counter goes 0, 1, …, N − 1 and back to 0, and needs the smallest n with 2ⁿ ≥ N flip-flops. Each stage of a ripple counter halves the frequency, so the last output of a mod-N counter runs at fclk/N. A Johnson counter of n flip-flops has 2n states, a ring counter n.
Q after every edge
A JK flip-flop: 00 holds, 01 resets (Q = 0), 10 sets (Q = 1), 11 toggles.