Electronics 1: cram pack

Formula sheets, the key method steps for every topic and 14 practice problems, with full solutions at the back.

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1Formulas and methods

Diodes & transistors

Diode (constant drop)
VD = 0.7 V when conducting
Active region
VBE = 0.7 V, IC = β·IB, IE = (β + 1)·IB
Fixed bias
IB = (VCC − 0.7)/RB
Divider bias
IB = (VTH − 0.7)/(RTH + (β + 1)RE)
Thévenin of the divider
VTH = VCC·R2/(R1 + R2), RTH = R1∥R2
Collector loop
VCE = VCC − ICRC − IERE
Saturation
IC(sat) = (VCC − VCE(sat))/RC, IB ≥ IC(sat)/β

Op-amp circuits

Inverting amplifier
Vout = −(Rf/Rin)·Vin
Non-inverting amplifier
Vout = (1 + Rf/R1)·Vin
Summing amplifier
Vout = −Rf(V1/R1 + V2/R2)
Ideal op-amp
V+ = V−, Iin = 0

RC & RL transients

Time constant
τ = RC | τ = L/R
Response
x(t) = x(∞) + [x(0) − x(∞)]·e−t/τ
Capacitor at DC
open circuit; vC cannot jump
Inductor at DC
short circuit; iL cannot jump
Settled
t ≈ 5τ

Method

  1. Find the initial value just after switching: a capacitor voltage and an inductor current cannot jump.
  2. Find the final value long after switching: a capacitor acts as an open circuit, an inductor as a short circuit.
  3. Find the time constant: τ = RC or τ = L/R, using the resistance seen by the capacitor or inductor.
  4. Use x(t) = x(∞) + [x(0) − x(∞)]·e−t/τ.

Series & parallel resistors

Resistors in series
Req = R1 + R2 + …
Resistors in parallel
1/Req = 1/R1 + 1/R2 + …
Two in parallel
Req = R1R2 / (R1 + R2)
Ohm's law
V = I·R
Power
P = V·I = I²R = V²/R

Method

  1. Start at the end of the network furthest from the terminals.
  2. Combine resistors in series by adding them, and resistors in parallel with 1/R = 1/R₁ + 1/R₂ + …
  3. Redraw the circuit after each step.
  4. Repeat until one resistor is left between the terminals.

DC-DC converters

Buck
Vo = D·Vin
Boost
Vo = Vin/(1 − D)
Inverting buck-boost
|Vo| = Vin·D/(1 − D)
Ideal power balance
VinIin = VoIo
Inductor ripple
ΔIL = VL,on·D/(L·f); buck Vin − Vo, boost and buck-boost Vin
Average inductor current
buck Io; boost and buck-boost Io/(1 − D)
Output ripple
buck ΔIL/(8fC); boost and buck-boost Io·D/(fC)
CCM boundary
buck (1 − D)R/(2f); boost D(1 − D)²R/(2f); buck-boost (1 − D)²R/(2f)

Method

  1. Identify the converter (buck, boost or buck-boost) and the duty cycle D from the voltage ratio.
  2. Use volt-second balance on the inductor: the average inductor voltage over a period is zero.
  3. Find the inductor voltage while the switch is on, then ΔIL = VL·D/(L·f).
  4. For the output ripple, find the charge that flows in and out of the capacitor; for the CCM boundary, set the average inductor current equal to ΔIL/2.

Wheatstone bridge & strain gauges

Divider voltages
Va = VsR2/(R1 + R2), Vb = VsR4/(R3 + R4)
Output
Vab = Va − Vb
Balance
R1/R2 = R3/R4
Slide-wire bridge
R/Rx = l/(100 − l)
Thévenin resistance
Rth = R1∥R2 + R3∥R4
Gauge factor
ΔR/R = GF·ε
Bridge output
quarter Vs·GF·ε/4, half Vs·GF·ε/2, full Vs·GF·ε
Small change, one arm
Vab ≈ Vs·ΔR/(4R)
Stress
σ = E·ε

Method

  1. Treat the bridge as two voltage dividers across the same supply.
  2. For balance, set R₁/R₂ = R₃/R₄ and solve for the unknown resistor.
  3. For an unbalanced bridge, find Va and Vb from the dividers and subtract; use the Thévenin equivalent when a meter loads the output.
  4. For strain gauges, convert strain to ΔR/R = GF·ε and use Vs·GF·ε/4, /2 or ×1 for a quarter, half or full bridge.

Digital logic: gates, K-maps & flip-flops

Basic gates
A·B, A + B, A′, (A·B)′, (A + B)′, A ⊕ B
Boolean rules
X + X′ = 1, X·X′ = 0, X + XY = X, XY + XY′ = X
De Morgan
(X·Y)′ = X′ + Y′, (X + Y)′ = X′·Y′
Karnaugh map order
00, 01, 11, 10 (Gray code)
Group of 2ᵏ cells
loses k variables
4-to-1 multiplexer
F = A′B′I0 + A′BI1 + AB′I2 + ABI3
Flip-flops
D: Q⁺ = D, T: Q⁺ = T ⊕ Q, JK: Q⁺ = JQ′ + K′Q
Counters
n-bit: 2ⁿ states; mod-N: smallest n with 2ⁿ ≥ N; fout = fclk/N
Ripple counter
fmax = 1/(n·tpd)
Ring and Johnson counters
n and 2n states

Method

  1. For a circuit, work from the inputs to the output one gate at a time and write the value on every wire, or write its expression and fill in the truth table.
  2. For simplification, put the 1s (and the don’t-cares as X) into a Karnaugh map with Gray-code rows and columns: 00, 01, 11, 10.
  3. Cover the 1s with as few and as large groups of 1, 2, 4, 8 or 16 cells as possible, wrapping round the edges; each group is one product term made of the variables that stay constant. Group the 0s for the POS form.
  4. For flip-flops and counters, read the inputs at each active clock edge, write the state after every edge, and remember that an n-bit counter wraps round after 2ⁿ states.

2Practice problems

1.Diodes & transistorsMedium
RC​ = 1 kΩβ = 100VCC​ = 10 VRB​ = 820 kΩ

An NPN transistor with β = 100 is biased by a base resistor RB = 820 kΩ from the supply VCC = 10 V. The collector resistor is RC = 1 kΩ and the emitter is grounded. Take VBE = 0.7 V and assume the transistor is in the active region. Find the collector–emitter voltage VCE.

VCC = 10 VRB = 820 kΩRC = 1 kΩβ = 100VBE = 0.7 V
VCE = V
2.Diodes & transistorsHard
+−≤ 16 V330 Ω6.2 V

A 6.2 V Zener regulator has a 330 Ω series resistor. The input can rise to 16 V, and the load may be disconnected. Find the largest power PZ,max the Zener must dissipate.

Vin,max = 16 VVZ = 6.2 VR = 330 Ω
PZ,max = mW
3.Op-amp circuitsMedium
−+Vout​R2​ = 22 kΩV1​ = 1.6 VR1​ = 10 kΩV2​ = 2.2 VR3​ = 10 kΩR4​ = 22 kΩ

The difference amplifier uses an ideal op-amp with ±15 V supplies, with R3 = R1 and R4 = R2. Find the voltage V− at the inverting input.

V1 = 1.6 VV2 = 2.2 VR1 = R3 = 10 kΩR2 = R4 = 22 kΩ
V− = V
4.Op-amp circuitsHard
Vin​V1​Vout​stage 1: invertingR1​ = 2 kΩRf1​ = 22 kΩstage 2: non-invertingR2​ = 47 kΩRf2​ = 4.7 kΩ

Two ideal op-amp stages are connected in cascade: an inverting amplifier (R1, Rf1) followed by a non-inverting amplifier (R2 to ground, Rf2 in the feedback). Both run from ±15 V supplies. The input is Vin = 0.15 V. Find the output voltage Vout.

R1 = 2 kΩRf1 = 22 kΩR2 = 47 kΩRf2 = 4.7 kΩVin = 0.15 V
Vout = V
5.RC & RL transientsMedium
+−Vs​24 Vt = 0R = 47 ΩL68 mHi(t)

The inductor carries no current before the switch closes at t = 0. Find the current i at t = 1 ms.

Vs = 24 VR = 47 ΩL = 68 mHt = 1 ms
i = A
6.RC & RL transientsHard
+−Vs​15 Vt = 0R = ?C4.7 µF+−vC​

A timer starts charging an uncharged capacitor through a resistor from a 15 V supply at t = 0. It must trigger when the capacitor voltage reaches 7.5 V, exactly 20 ms after the start. With C = 4.7 µF, find the resistance R needed.

Vs = 15 VVth = 7.5 VT = 20 msC = 4.7 µF
R = kΩ
7.Series & parallel resistorsMedium
R1​ = 3 ΩIR1​R3​ = 6 Ω+−V1​12 VR2​8 ΩAR4​8 ΩB

Find the current IR1 delivered by the source, which flows through R1.

V1 = 12 VR1 = 3 ΩR2 = 8 ΩR3 = 6 ΩR4 = 8 Ω
IR1 = A
8.Series & parallel resistorsHard
R1​ = 3 ΩR3​ = 20 ΩR5​ = 25 Ω+−V1​9 VR2​8 ΩIR2​AR4​20 ΩBR6​4 Ω

Find the current IR2 through R2.

V1 = 9 VR1 = 3 ΩR2 = 8 ΩR3 = 20 ΩR4 = 20 ΩR5 = 25 ΩR6 = 4 Ω
IR2 = A
9.DC-DC convertersMedium
+−48 VLSCR = 8 Ω+−120 V

An ideal boost converter turns 48 V into 120 V for an 8 Ω load. Find the average inductor current IL.

Vin​ = 48 VVo​ = 120 VR = 8 Ω
IL = A
10.DC-DC convertersHard
tvo​Vo​ΔV = ?DTT2T

A buck converter turns 36 V into 10.8 V for a 12 Ω load at 25 kHz, with L = 330 µH and C = 470 µF. Find the peak-to-peak output voltage ripple ΔVo in mV.

Vin​ = 36 VVo​ = 10.8 Vf = 25 kHzL = 330 µHC = 470 µF
ΔVo = mV
11.Wheatstone bridge & strain gaugesMedium
+−5 V120 Ω120 Ω + ΔR120 Ω120 Ωab+−49.02 mV

A bridge with four 120 Ω arms is supplied with 5 V. When the sensor R₂ changes, the output reads Vab = 49.02 mV. Find the exact change ΔR of R₂.

Vs = 5 VR = 120 ΩVab = 49.02 mV
ΔR = Ω
12.Wheatstone bridge & strain gaugesHard
+−3 V120 Ω120 Ω + ΔR120 Ω120 Ωab+−2.25 mV

A strain gauge (GF = 2) on a member with E = 70 GPa forms a quarter bridge excited with 3 V. The output reads 2.25 mV. Find the axial stress σ in MPa.

Vs = 3 VGF = 2Vo = 2.25 mVE = 70 GPa
σ = MPa
13.Digital logic: gates, K-maps & flip-flopsMedium
ABCD000111100001111000010302141517160120131151141819111110

Use the Karnaugh map to find the minimal product-of-sums (POS) form of F(A, B, C, D) = Σm(4, 5, 6, 7, 8, 9, 10, 11, 14, 15). How many sum terms (factors) N does it have?

F(A, B, C, D) = Σm(4, 5, 6, 7, 8, 9, 10, 11, 14, 15)
N =
14.Digital logic: gates, K-maps & flip-flopsHard
FFQ0​Q0​FFQ1​Q1​FFQ2​Q2​CLKMOD-5

An 8 kHz clock drives a mod-5 counter. Find the frequency fout of its most significant output, which completes one cycle per counting cycle.

fclk = 8 kHzN = 5
fout = kHz

3Solutions

1.Diodes & transistors

Answer: VCE = 8.866 V

BJT bias point: in the active region VBE = 0.7 V, IC = β·IB and IE = (β + 1)·IB. Find IB from the base loop with KVL, then IC, then VCE from the collector–emitter loop. A voltage divider at the base is replaced by its Thévenin equivalent VTH = VCC·R₂/(R₁ + R₂), RTH = R₁∥R₂; an emitter resistor appears (β + 1) times larger in the base loop.

Base current

IB = (VCC − VBE)/RB = (10 − 0.7)/820 kΩ = 11.34 µA

Collector current

IC = β·IB = 100·11.34 µA = 1.134 mA

Collector–emitter voltage

VCE = 10 − 1.134 mA·1 kΩ = 8.866 V

Answer

VCE = 8.866 V
2.Diodes & transistors

Answer: PZ,max = 184.1 mW

Zener regulator: a reverse-biased Zener diode holds its voltage VZ while its current stays above a minimum IZ,min. The series resistor R takes the difference between input and output: IR = (Vin − VZ)/R. That current splits between the load, IL = VZ/RL, and the Zener: IZ = IR − IL. Design for the worst cases: the lowest input with the largest load must still leave IZ,min, and the highest input with no load gives the largest Zener power PZ = VZ·IZ.

Worst-case Zener current

IZ = 9.8/330 = 29.7 mA

Zener power

PZ = 6.2·29.7 = 184.1 mW

Answer

PZ,max = 184.1 mW
3.Op-amp circuits

Answer: V− = 1.513 V

Ideal op-amp rules: with negative feedback, the op-amp drives its output so that its two inputs sit at the same voltage (V₋ = V₊), and no current flows into either input. Writing KCL at the inverting input with these two facts gives the output.

Voltage at the inputs

R₃ and R₄ carry the same current, so they form a voltage divider; feedback makes V₋ = V₊.

V₊ = V2·R4/(R3 + R4) = 2.2·22/(10 + 22) = 1.513 V
V₋ = V₊

Answer

V− = 1.513 V
4.Op-amp circuits

Answer: Vout = −1.815 V

Ideal op-amp rules: with negative feedback, the op-amp drives its output so that its two inputs sit at the same voltage (V₋ = V₊), and no current flows into either input. Writing KCL at the inverting input with these two facts gives the output.

Gain of each stage

A1 = −Rf1/R1 = −22/2 = −11
A2 = 1 + Rf2/R2 = 1 + 4.7/47 = 1.1

Stage by stage

V1 = −11·0.15 = −1.65 V
Vout = 1.1·(−1.65) = −1.815 V

Answer

Vout = −1.815 V
5.RC & RL transients

Answer: i = 0.2548 A

First-order transients: in a circuit with one capacitor or one inductor, every voltage and current moves exponentially from its initial value to its final value: x(t) = x(∞) + [x(0) − x(∞)]·e−t/τ, with τ = RC or τ = L/R. After about 5τ the circuit has settled.

Time constant and final current

Long after the switch closes the inductor behaves like a short circuit, so the final current is set by R alone.

τ = L/R = 68 mH / 47 Ω = 1.447 ms
i(∞) = Vs/R = 24/47 = 0.5106 A

Current at the given time

i(t) = i(∞)·(1 − e−t/τ) = 0.5106·(1 − e−1/1.447) = 0.2548 A

Answer

i = 0.2548 A
6.RC & RL transients

Answer: R = 6.139 kΩ

First-order transients: in a circuit with one capacitor or one inductor, every voltage and current moves exponentially from its initial value to its final value: x(t) = x(∞) + [x(0) − x(∞)]·e−t/τ, with τ = RC or τ = L/R. After about 5τ the circuit has settled.

Required time constant

7.5 = 15·(1 − e−20/τ) → τ = 20/ln(15/(15 − 7.5))
τ = 20/0.6931 = 28.85 ms

Resistance

kΩ times µF gives milliseconds.

R = τ/C = 28.85/4.7 = 6.139 kΩ

Answer

R = 6.139 kΩ
7.Series & parallel resistors

Answer: IR1 = 1.483 A

Series and parallel resistors: in series the same current flows through each resistor and R = R₁ + R₂ + …. In parallel each resistor has the same voltage and 1/R = 1/R₁ + 1/R₂ + …. A ladder network is reduced one pair at a time until a single equivalent resistance remains.

R1​ = 3 ΩR3​ = 6 Ω+−V1​12 VR2​8 ΩAR4​8 ΩB

Combine resistors from the far end

Start at the end farthest from the source and work back towards it. Resistors carrying the same current are in series; resistors across the same two nodes are in parallel.

R3 + R4 = 6 + 8 = 14 Ω
R2 ∥ 14 = 8·14/(8+14) = 5.091 Ω
Req = R1 + 5.091 = 3 + 5.091 = 8.091 Ω

Current from the source

The source sees only Req, so Ohm’s law gives the current it delivers. That current flows through R₁.

IR1 = V1/Req = 12/8.091 = 1.483 A

Answer

IR1 = 1.483 A
8.Series & parallel resistors

Answer: IR2 = 0.7657 A

Series and parallel resistors: in series the same current flows through each resistor and R = R₁ + R₂ + …. In parallel each resistor has the same voltage and 1/R = 1/R₁ + 1/R₂ + …. A ladder network is reduced one pair at a time until a single equivalent resistance remains.

R1​ = 3 ΩR3​ = 20 ΩR5​ = 25 Ω+−V1​9 VR2​8 ΩAR4​20 ΩBR6​4 Ω

Combine resistors from the far end

Start at the end farthest from the source and work back towards it. Resistors carrying the same current are in series; resistors across the same two nodes are in parallel.

R5 + R6 = 25 + 4 = 29 Ω
R4 ∥ 29 = 11.84 Ω
R3 + 11.84 = 31.84 Ω
R2 ∥ 31.84 = 6.393 Ω
Req = R1 + 6.393 = 3 + 6.393 = 9.393 Ω

Current from the source

The source sees only Req, so Ohm’s law gives the current it delivers. That current flows through R₁.

IR1 = V1/Req = 9/9.393 = 0.9581 A

Current through R₂

Subtract the drop across R₁ to get the voltage at node A, which is the voltage across R₂.

VA = V1 − IR1·R1 = 9 − 0.9581·3 = 6.126 V
IR2 = VA/R2 = 6.126/8 = 0.7657 A

Answer

IR2 = 0.7657 A
9.DC-DC converters

Answer: IL = 37.5 A

DC-DC converters: a switch S turns on for the fraction D of each period T = 1/f. In steady state the average inductor voltage is zero (volt-second balance), which gives the ideal conversion ratios in continuous conduction: buck Vo = D·Vin, boost Vo = Vin/(1 − D), inverting buck-boost |Vo| = Vin·D/(1 − D). An ideal converter keeps the power: Vin·Iin = Vo·Io. While S is on the inductor current rises by ΔIL = VL·D·T/L, with VL = Vin − Vo for the buck and Vin for the boost and buck-boost. The output ripple is ΔVo = ΔIL/(8fC) for the buck and Io·D/(fC) for the boost and buck-boost. The inductor current just touches zero (the CCM boundary) when the average inductor current equals ΔIL/2.

Duty cycle

D = 1 − 48/120 = 0.6

Load current

Io = 120/8 = 15 A

Inductor current

IL = Io/(1 − D) = 15/0.4 = 37.5 A

Answer

IL = 37.5 A
10.DC-DC converters

Answer: ΔVo = 9.749 mV

DC-DC converters: a switch S turns on for the fraction D of each period T = 1/f. In steady state the average inductor voltage is zero (volt-second balance), which gives the ideal conversion ratios in continuous conduction: buck Vo = D·Vin, boost Vo = Vin/(1 − D), inverting buck-boost |Vo| = Vin·D/(1 − D). An ideal converter keeps the power: Vin·Iin = Vo·Io. While S is on the inductor current rises by ΔIL = VL·D·T/L, with VL = Vin − Vo for the buck and Vin for the boost and buck-boost. The output ripple is ΔVo = ΔIL/(8fC) for the buck and Io·D/(fC) for the boost and buck-boost. The inductor current just touches zero (the CCM boundary) when the average inductor current equals ΔIL/2.

Duty cycle

D = 10.8/36 = 0.3

Inductor ripple current

ΔIL = (36 − 10.8)·0.3/(330·10⁻⁶·25·10³) = 0.9164 A

Output ripple

ΔVo = 0.9164/(8·25·10³·470·10⁻⁶) = 9.749 mV

Answer

ΔVo = 9.749 mV
11.Wheatstone bridge & strain gauges

Answer: ΔR = 4.8 Ω

Wheatstone bridge: two voltage dividers share one supply Vs. The left divider R1–R2 gives Va = Vs·R2/(R1 + R2) and the right divider R3–R4 gives Vb = Vs·R4/(R3 + R4); the output is Vab = Va − Vb. The bridge is balanced (Vab = 0, no current in the meter) when R1/R2 = R3/R4, that is R1·R4 = R2·R3. Seen from the output, the bridge is a Thévenin source with Rth = R1∥R2 + R3∥R4.

Node voltage

Va = 2.5 + 0.04902 = 2.549 V

Solve the divider

R₂ = 120·2.549/(5 − 2.549) = 124.8 Ω
ΔR = 124.8 − 120 = 4.8 Ω

Answer

ΔR = 4.8 Ω
12.Wheatstone bridge & strain gauges

Answer: σ = 105 MPa

Strain gauges: a gauge changes its resistance with strain: ΔR/R = GF·ε, where the gauge factor GF is about 2 for metal foil. In a bridge with all arms equal to R, one active gauge (quarter bridge) gives Vo ≈ Vs·GF·ε/4. Two active gauges with opposite strains in adjacent arms (half bridge) give Vs·GF·ε/2, and four (full bridge) give Vs·GF·ε. Stress follows from Hooke’s law, σ = E·ε. Load cells state their sensitivity in mV/V: the output at full load per volt of excitation.

Strain

ε = 4·0.00225/(3·2) = 0.0015

Stress

σ = 70·10³ MPa·0.0015 = 105 MPa

Answer

σ = 105 MPa
13.Digital logic: gates, K-maps & flip-flops

Answer: N = 2

Karnaugh maps: the cells are ordered in Gray code (00, 01, 11, 10), so neighbouring cells, including the ones across the edges, differ in exactly one variable. Group the 1s in rectangles of 1, 2, 4, 8 or 16 cells, as large as possible and as few as possible, until every 1 is covered. Each group is one product term: the variables that stay constant inside it. A group of 2ᵏ cells loses k variables. Don't-cares (X) may be used to make groups bigger but never have to be covered. Grouping the 0s instead gives the minimal POS form.

ABCD000111100001111000010302141517160120131151141819111110

Group the 0s

Every group is a rectangle of 2ᵏ cells; edge cells are neighbours of the cells on the opposite edge.

(A + B)
(A′ + B′ + C)

Minimal POS form

F = (A + B)(A′ + B′ + C)
N = 2

Answer

N = 2
14.Digital logic: gates, K-maps & flip-flops

Answer: fout = 1.6 kHz

Flip-flops and counters: a flip-flop changes only at the active clock edge. D copies its input (Q⁺ = D); T toggles when T = 1; JK holds for 00, resets for 01, sets for 10 and toggles for 11. An n-bit binary counter has 2ⁿ states and counts modulo 2ⁿ; a mod-N counter goes 0, 1, …, N − 1 and back to 0, and needs the smallest n with 2ⁿ ≥ N flip-flops. Each stage of a ripple counter halves the frequency, so the last output of a mod-N counter runs at fclk/N. A Johnson counter of n flip-flops has 2n states, a ring counter n.

Frequency division

fout = 8 kHz / 5 = 1.6 kHz

Answer

fout = 1.6 kHz

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