Identify the converter (buck, boost or buck-boost) and the duty cycle D from the voltage ratio.
Use volt-second balance on the inductor: the average inductor voltage over a period is zero.
Find the inductor voltage while the switch is on, then ΔIL = VL·D/(L·f).
For the output ripple, find the charge that flows in and out of the capacitor; for the CCM boundary, set the average inductor current equal to ΔIL/2.
Wheatstone bridge & strain gauges
Divider voltages
Va = VsR2/(R1 + R2), Vb = VsR4/(R3 + R4)
Output
Vab = Va − Vb
Balance
R1/R2 = R3/R4
Slide-wire bridge
R/Rx = l/(100 − l)
Thévenin resistance
Rth = R1∥R2 + R3∥R4
Gauge factor
ΔR/R = GF·ε
Bridge output
quarter Vs·GF·ε/4, half Vs·GF·ε/2, full Vs·GF·ε
Small change, one arm
Vab ≈ Vs·ΔR/(4R)
Stress
σ = E·ε
Method
Treat the bridge as two voltage dividers across the same supply.
For balance, set R₁/R₂ = R₃/R₄ and solve for the unknown resistor.
For an unbalanced bridge, find Va and Vb from the dividers and subtract; use the Thévenin equivalent when a meter loads the output.
For strain gauges, convert strain to ΔR/R = GF·ε and use Vs·GF·ε/4, /2 or ×1 for a quarter, half or full bridge.
Digital logic: gates, K-maps & flip-flops
Basic gates
A·B, A + B, A′, (A·B)′, (A + B)′, A ⊕ B
Boolean rules
X + X′ = 1, X·X′ = 0, X + XY = X, XY + XY′ = X
De Morgan
(X·Y)′ = X′ + Y′, (X + Y)′ = X′·Y′
Karnaugh map order
00, 01, 11, 10 (Gray code)
Group of 2ᵏ cells
loses k variables
4-to-1 multiplexer
F = A′B′I0 + A′BI1 + AB′I2 + ABI3
Flip-flops
D: Q⁺ = D, T: Q⁺ = T ⊕ Q, JK: Q⁺ = JQ′ + K′Q
Counters
n-bit: 2ⁿ states; mod-N: smallest n with 2ⁿ ≥ N; fout = fclk/N
Ripple counter
fmax = 1/(n·tpd)
Ring and Johnson counters
n and 2n states
Method
For a circuit, work from the inputs to the output one gate at a time and write the value on every wire, or write its expression and fill in the truth table.
For simplification, put the 1s (and the don’t-cares as X) into a Karnaugh map with Gray-code rows and columns: 00, 01, 11, 10.
Cover the 1s with as few and as large groups of 1, 2, 4, 8 or 16 cells as possible, wrapping round the edges; each group is one product term made of the variables that stay constant. Group the 0s for the POS form.
For flip-flops and counters, read the inputs at each active clock edge, write the state after every edge, and remember that an n-bit counter wraps round after 2ⁿ states.
2Practice problems
1.Diodes & transistorsMedium
5 blue LEDs (forward voltage 3.2 V each) are connected in series with a resistor to a 24 V supply. Find the resistance R that sets the current to 15 mA.
Vs = 24 VVF = 3.2 Vn = 5I = 15 mA
R = Ω
2.Diodes & transistorsHard
A diode is modelled as 0.7 V in series with 10 Ω (it conducts above 0.7 V). It is in series with a 100 Ω resistor across a 9 V supply. Find the operating current ID where the diode line meets the load line.
Vs = 9 VR = 100 ΩV0 = 0.7 Vrd = 10 Ω
ID = mA
3.Op-amp circuitsMedium
The op-amp is ideal and runs from ±15 V supplies; its output saturates at ±13 V. The inverting amplifier is driven by a sine wave. Find the largest input amplitude Vin,max (peak value) for which the output does not clip.
R1 = 10 kΩRf = 100 kΩVsat = ±13 V
Vin,max = V
4.Op-amp circuitsHard
The integrator uses an ideal op-amp with ±15 V supplies; its output saturates at ±12 V. The capacitor is uncharged when a constant input Vin = −1.5 V is applied at t = 0. How long after t = 0 does the output reach saturation? Find t.
Vin = −1.5 VR = 4.7 kΩC = 0.1 µFVsat = ±12 V
t = ms
5.RC & RL transientsMedium
The inductor carries no current before the switch closes at t = 0. Find the voltage vL across the inductor at t = 5 ms.
Vs = 5 VR = 15 ΩL = 33 mHt = 5 ms
vL = V
6.RC & RL transientsHard
Just before the switch closes at t = 0, the capacitor holds 3 V with the polarity shown. How long does it take for vC to reach 7.2 V? Find t.
Vs = 9 VR = 1 kΩC = 68 µFvC(0) = 3 V
t = ms
7.Series & parallel resistorsMedium
Find the equivalent resistance Req seen by the source V1.
V1 = 30 VR1 = 5 ΩR2 = 15 ΩR3 = 15 ΩR4 = 4 Ω
Req = Ω
8.Series & parallel resistorsHard
Find the equivalent resistance Req seen by the source V1.
An ideal buck converter turns 12 V into 8.4 V at 100 kHz with L = 47 µH. Find the peak-to-peak inductor ripple current ΔIL.
Vin = 12 VVo = 8.4 Vf = 100 kHzL = 47 µH
ΔIL = A
10.DC-DC convertersHard
An ideal boost converter turns 48 V into 160 V for a 2 Ω load at 50 kHz. Find the smallest inductance Lcrit for continuous conduction.
Vin = 48 VVo = 160 Vf = 50 kHzR = 2 Ω
Lcrit = µH
11.Wheatstone bridge & strain gaugesMedium
A galvanometer with a resistance of 200 Ω is connected between a and b of the bridge shown (Vs = 6 V). Find the galvanometer current Ig from a to b, in µA.
A quarter bridge (one active gauge, GF = 2.05) is excited with 3 V. The largest strain to be measured is 800 µε, and it must give 5 V at the input of an analogue-to-digital converter. Find the amplifier gain G.
Use the Karnaugh map to find the minimal product-of-sums (POS) form of F(A, B, C, D) = Σm(1, 2, 6, 13, 15). How many sum terms (factors) N does it have?
F(A, B, C, D) = Σm(1, 2, 6, 13, 15)
N =
14.Digital logic: gates, K-maps & flip-flopsHard
A synchronous decade (mod-10) counter counts 0, 1, …, 9 and then returns to 0. It starts at 4. Which count Q (in decimal) does it show after 14 clock pulses?
Q0 = 414N = 10
Q =
3Solutions
1.Diodes & transistors
Answer: R = 533.3 Ω
LED and diode circuits: a forward-biased LED drops roughly its forward voltage VF (about 2 V for red, 3 V for blue or white), whatever the current. A series resistor sets the current: R = (Vs − n·VF)/I for n LEDs in series. With a more exact diode model V = V₀ + I·rd, the operating point is where the diode line meets the load line I = (Vs − V)/R, so I = (Vs − V₀)/(R + rd).
Voltage across the resistor
VR = 24 − 5·3.2 = 8 V
Resistance
R = 8/0.015 = 533.3 Ω
Answer
R = 533.3 Ω
The resistor dissipates 120 mW.
2.Diodes & transistors
Answer: ID = 75.45 mA
LED and diode circuits: a forward-biased LED drops roughly its forward voltage VF (about 2 V for red, 3 V for blue or white), whatever the current. A series resistor sets the current: R = (Vs − n·VF)/I for n LEDs in series. With a more exact diode model V = V₀ + I·rd, the operating point is where the diode line meets the load line I = (Vs − V)/R, so I = (Vs − V₀)/(R + rd).
Combine the two equations
9 = 0.7 + I·(100 + 10)
Operating current
ID = 8.3/110 = 75.45 mA
VD = 0.7 + 0.07545·10 = 1.455 V
Answer
ID = 75.45 mA
3.Op-amp circuits
Answer: Vin,max = 1.3 V
Ideal op-amp rules: with negative feedback, the op-amp drives its output so that its two inputs sit at the same voltage (V₋ = V₊), and no current flows into either input. Writing KCL at the inverting input with these two facts gives the output.
Gain
|Av| = Rf/R1 = 100/10 = 10
Largest input before clipping
Vin,max = Vsat/|Av| = 13/10 = 1.3 V
Answer
Vin,max = 1.3 V
4.Op-amp circuits
Answer: t = 3.76 ms
Ideal op-amp rules: with negative feedback, the op-amp drives its output so that its two inputs sit at the same voltage (V₋ = V₊), and no current flows into either input. Writing KCL at the inverting input with these two facts gives the output.
Input current and ramp rate
kΩ times µF gives milliseconds.
RC = 4.7 kΩ · 0.1 µF = 0.47 ms
ramp rate = −Vin/(RC) = −(−1.5)/0.47 = 3.191 V/ms
Time to saturation
|Vin|·t/(RC) = Vsat → t = Vsat·RC/|Vin| = 12·0.47/1.5 = 3.76 ms
Answer
t = 3.76 ms
5.RC & RL transients
Answer: vL = 0.5152 V
First-order transients: in a circuit with one capacitor or one inductor, every voltage and current moves exponentially from its initial value to its final value: x(t) = x(∞) + [x(0) − x(∞)]·e−t/τ, with τ = RC or τ = L/R. After about 5τ the circuit has settled.
Time constant and final current
Long after the switch closes the inductor behaves like a short circuit, so the final current is set by R alone.
τ = L/R = 33 mH / 15 Ω = 2.2 ms
i(∞) = Vs/R = 5/15 = 0.3333 A
Inductor voltage
At t = 0 the whole supply voltage appears across the inductor; it then decays to zero.
vL(t) = Vs·e−t/τ = 5·e−5/2.2 = 0.5152 V
Answer
vL = 0.5152 V
6.RC & RL transients
Answer: t = 81.87 ms
First-order transients: in a circuit with one capacitor or one inductor, every voltage and current moves exponentially from its initial value to its final value: x(t) = x(∞) + [x(0) − x(∞)]·e−t/τ, with τ = RC or τ = L/R. After about 5τ the circuit has settled.
Initial value, final value, time constant
The capacitor voltage cannot jump, so it starts at its stored value and heads for the source voltage.
t = τ·ln((3 − 9)/(7.2 − 9)) = 68·ln(3.333) = 81.87 ms
Answer
t = 81.87 ms
7.Series & parallel resistors
Answer: Req = 13.38 Ω
Series and parallel resistors: in series the same current flows through each resistor and R = R₁ + R₂ + …. In parallel each resistor has the same voltage and 1/R = 1/R₁ + 1/R₂ + …. A ladder network is reduced one pair at a time until a single equivalent resistance remains.
Combine resistors from the far end
Start at the end farthest from the source and work back towards it. Resistors carrying the same current are in series; resistors across the same two nodes are in parallel.
R3 + R4 = 15 + 4 = 19 Ω
R2 ∥ 19 = 15·19/(15+19) = 8.382 Ω
Req = R1 + 8.382 = 5 + 8.382 = 13.38 Ω
Answer
Req = 13.38 Ω
8.Series & parallel resistors
Answer: Req = 18.12 Ω
Series and parallel resistors: in series the same current flows through each resistor and R = R₁ + R₂ + …. In parallel each resistor has the same voltage and 1/R = 1/R₁ + 1/R₂ + …. A ladder network is reduced one pair at a time until a single equivalent resistance remains.
Combine resistors from the far end
Start at the end farthest from the source and work back towards it. Resistors carrying the same current are in series; resistors across the same two nodes are in parallel.
R5 + R6 = 6 + 3 = 9 Ω
R4 ∥ 9 = 6.207 Ω
R3 + 6.207 = 14.21 Ω
R2 ∥ 14.21 = 3.121 Ω
Req = R1 + 3.121 = 15 + 3.121 = 18.12 Ω
Answer
Req = 18.12 Ω
9.DC-DC converters
Answer: ΔIL = 0.5362 A
DC-DC converters: a switch S turns on for the fraction D of each period T = 1/f. In steady state the average inductor voltage is zero (volt-second balance), which gives the ideal conversion ratios in continuous conduction: buck Vo = D·Vin, boost Vo = Vin/(1 − D), inverting buck-boost |Vo| = Vin·D/(1 − D). An ideal converter keeps the power: Vin·Iin = Vo·Io. While S is on the inductor current rises by ΔIL = VL·D·T/L, with VL = Vin − Vo for the buck and Vin for the boost and buck-boost. The output ripple is ΔVo = ΔIL/(8fC) for the buck and Io·D/(fC) for the boost and buck-boost. The inductor current just touches zero (the CCM boundary) when the average inductor current equals ΔIL/2.
Duty cycle
D = 8.4/12 = 0.7
Inductor voltage during the on-time
While S is on, the inductor sits between Vin and Vo.
VL = 12 − 8.4 = 3.6 V
Ripple current
ΔIL = VL·D/(L·f) = 3.6·0.7/(47·10⁻⁶·100·10³) = 0.5362 A
Answer
ΔIL = 0.5362 A
10.DC-DC converters
Answer: Lcrit = 1.26 µH
DC-DC converters: a switch S turns on for the fraction D of each period T = 1/f. In steady state the average inductor voltage is zero (volt-second balance), which gives the ideal conversion ratios in continuous conduction: buck Vo = D·Vin, boost Vo = Vin/(1 − D), inverting buck-boost |Vo| = Vin·D/(1 − D). An ideal converter keeps the power: Vin·Iin = Vo·Io. While S is on the inductor current rises by ΔIL = VL·D·T/L, with VL = Vin − Vo for the buck and Vin for the boost and buck-boost. The output ripple is ΔVo = ΔIL/(8fC) for the buck and Io·D/(fC) for the boost and buck-boost. The inductor current just touches zero (the CCM boundary) when the average inductor current equals ΔIL/2.
Duty cycle
D = 1 − 48/160 = 0.7
Boundary condition
Set the average inductor current equal to half the ripple current and solve for L.
Lcrit = D(1 − D)²·R/(2f)
Critical inductance
Lcrit = 0.7(1 − 0.7)²·2/(250·10³) = 1.26 µH
Answer
Lcrit = 1.26 µH
11.Wheatstone bridge & strain gauges
Answer: Ig = 9010 µA
Wheatstone bridge: two voltage dividers share one supply Vs. The left divider R1–R2 gives Va = Vs·R2/(R1 + R2) and the right divider R3–R4 gives Vb = Vs·R4/(R3 + R4); the output is Vab = Va − Vb. The bridge is balanced (Vab = 0, no current in the meter) when R1/R2 = R3/R4, that is R1·R4 = R2·R3. Seen from the output, the bridge is a Thévenin source with Rth = R1∥R2 + R3∥R4.
Thévenin voltage
Vth = 6·(1000/1150 − 40/120) = 3.217 V
Thévenin resistance
Rth = R₁∥R₂ + R₃∥R₄ = 157.1 Ω
Galvanometer current
Ig = 3.217/(157.1 + 200) = 9010 µA
Answer
Ig = 9010 µA
12.Wheatstone bridge & strain gauges
Answer: G = 4065
Strain gauges: a gauge changes its resistance with strain: ΔR/R = GF·ε, where the gauge factor GF is about 2 for metal foil. In a bridge with all arms equal to R, one active gauge (quarter bridge) gives Vo ≈ Vs·GF·ε/4. Two active gauges with opposite strains in adjacent arms (half bridge) give Vs·GF·ε/2, and four (full bridge) give Vs·GF·ε. Stress follows from Hooke’s law, σ = E·ε. Load cells state their sensitivity in mV/V: the output at full load per volt of excitation.
Bridge output at full scale
Vo = 1.23 mV
Gain
G = 5/0.00123 = 4065
Answer
G = 4065
13.Digital logic: gates, K-maps & flip-flops
Answer: N = 5
Karnaugh maps: the cells are ordered in Gray code (00, 01, 11, 10), so neighbouring cells, including the ones across the edges, differ in exactly one variable. Group the 1s in rectangles of 1, 2, 4, 8 or 16 cells, as large as possible and as few as possible, until every 1 is covered. Each group is one product term: the variables that stay constant inside it. A group of 2ᵏ cells loses k variables. Don't-cares (X) may be used to make groups bigger but never have to be covered. Grouping the 0s instead gives the minimal POS form.
Group the 0s
Every group is a rectangle of 2ᵏ cells; edge cells are neighbours of the cells on the opposite edge.
Another grouping of the same size exists; it has the same number of terms and literals.
14.Digital logic: gates, K-maps & flip-flops
Answer: Q = 8
Flip-flops and counters: a flip-flop changes only at the active clock edge. D copies its input (Q⁺ = D); T toggles when T = 1; JK holds for 00, resets for 01, sets for 10 and toggles for 11. An n-bit binary counter has 2ⁿ states and counts modulo 2ⁿ; a mod-N counter goes 0, 1, …, N − 1 and back to 0, and needs the smallest n with 2ⁿ ≥ N flip-flops. Each stage of a ripple counter halves the frequency, so the last output of a mod-N counter runs at fclk/N. A Johnson counter of n flip-flops has 2n states, a ring counter n.
Full cycles
Every 10 pulses bring the counter back to the same state.