Identify the converter (buck, boost or buck-boost) and the duty cycle D from the voltage ratio.
Use volt-second balance on the inductor: the average inductor voltage over a period is zero.
Find the inductor voltage while the switch is on, then ΔIL = VL·D/(L·f).
For the output ripple, find the charge that flows in and out of the capacitor; for the CCM boundary, set the average inductor current equal to ΔIL/2.
Wheatstone bridge & strain gauges
Divider voltages
Va = VsR2/(R1 + R2), Vb = VsR4/(R3 + R4)
Output
Vab = Va − Vb
Balance
R1/R2 = R3/R4
Slide-wire bridge
R/Rx = l/(100 − l)
Thévenin resistance
Rth = R1∥R2 + R3∥R4
Gauge factor
ΔR/R = GF·ε
Bridge output
quarter Vs·GF·ε/4, half Vs·GF·ε/2, full Vs·GF·ε
Small change, one arm
Vab ≈ Vs·ΔR/(4R)
Stress
σ = E·ε
Method
Treat the bridge as two voltage dividers across the same supply.
For balance, set R₁/R₂ = R₃/R₄ and solve for the unknown resistor.
For an unbalanced bridge, find Va and Vb from the dividers and subtract; use the Thévenin equivalent when a meter loads the output.
For strain gauges, convert strain to ΔR/R = GF·ε and use Vs·GF·ε/4, /2 or ×1 for a quarter, half or full bridge.
Digital logic: gates, K-maps & flip-flops
Basic gates
A·B, A + B, A′, (A·B)′, (A + B)′, A ⊕ B
Boolean rules
X + X′ = 1, X·X′ = 0, X + XY = X, XY + XY′ = X
De Morgan
(X·Y)′ = X′ + Y′, (X + Y)′ = X′·Y′
Karnaugh map order
00, 01, 11, 10 (Gray code)
Group of 2ᵏ cells
loses k variables
4-to-1 multiplexer
F = A′B′I0 + A′BI1 + AB′I2 + ABI3
Flip-flops
D: Q⁺ = D, T: Q⁺ = T ⊕ Q, JK: Q⁺ = JQ′ + K′Q
Counters
n-bit: 2ⁿ states; mod-N: smallest n with 2ⁿ ≥ N; fout = fclk/N
Ripple counter
fmax = 1/(n·tpd)
Ring and Johnson counters
n and 2n states
Method
For a circuit, work from the inputs to the output one gate at a time and write the value on every wire, or write its expression and fill in the truth table.
For simplification, put the 1s (and the don’t-cares as X) into a Karnaugh map with Gray-code rows and columns: 00, 01, 11, 10.
Cover the 1s with as few and as large groups of 1, 2, 4, 8 or 16 cells as possible, wrapping round the edges; each group is one product term made of the variables that stay constant. Group the 0s for the POS form.
For flip-flops and counters, read the inputs at each active clock edge, write the state after every edge, and remember that an n-bit counter wraps round after 2ⁿ states.
2Practice problems
1.Diodes & transistorsMedium
An NPN transistor with β = 150 is biased by a base resistor RB = 470 kΩ from the supply VCC = 9 V. The collector resistor is RC = 1.5 kΩ and the emitter is grounded. Take VBE = 0.7 V and assume the transistor is in the active region. Find the collector current IC in mA.
VCC = 9 VRB = 470 kΩRC = 1.5 kΩβ = 150VBE = 0.7 V
IC = mA
2.Diodes & transistorsHard
An NPN transistor with β = 50 switches a 330 Ω load resistor connected between VCC = 12 V and its collector. The emitter is grounded. The base is driven from a 3.3 V logic output through a base resistor RB. Take VBE = 0.7 V and VCE(sat) = 0.2 V. Find the largest base resistor RB, in kΩ, that still drives the transistor just into saturation.
The op-amp is ideal and runs from ±15 V supplies. Find the output voltage Vout.
Vin = −1.2 VR1 = 2 kΩRf = 10 kΩ
Vout = V
4.Op-amp circuitsHard
Two ideal op-amp stages are connected in cascade: an inverting amplifier (R1, Rf1) followed by a non-inverting amplifier (R2 to ground, Rf2 in the feedback). Both run from ±15 V supplies. Find the overall voltage gain Av = Vout/Vin.
R1 = 4.7 kΩRf1 = 10 kΩR2 = 47 kΩRf2 = 22 kΩ
Av =
5.RC & RL transientsMedium
The inductor carries a steady current of 0.5 A. At t = 0 the switch closes the loop through R and the source is removed, so the inductor current decays through R. Find the current i at t = 1 ms.
i(0) = 0.5 AR = 68 ΩL = 68 mHt = 1 ms
i = A
6.RC & RL transientsHard
Just before the switch closes at t = 0, the capacitor holds 10 V with the polarity shown. Find the capacitor voltage vC at t = 250 ms.
Vs = 15 VR = 10 kΩC = 68 µFvC(0) = 10 Vt = 250 ms
vC = V
7.Series & parallel resistorsMedium
Find the equivalent resistance Req seen by the source V1.
V1 = 15 VR1 = 4 ΩR2 = 5 ΩR3 = 5 ΩR4 = 6 Ω
Req = Ω
8.Series & parallel resistorsHard
Find the current IR1 delivered by the source, which flows through R1.
An ideal inverting buck-boost converter turns 48 V into −112 V at 200 kHz with L = 47 µH. Find the peak-to-peak inductor ripple current ΔIL.
Vin = 48 VVo = −112 Vf = 200 kHzL = 47 µH
ΔIL = A
10.DC-DC convertersHard
An ideal buck converter turns 12 V into 9 V for a 12 Ω load at 500 kHz. Find the smallest inductance Lcrit for continuous conduction.
Vin = 12 VVo = 9 Vf = 500 kHzR = 12 Ω
Lcrit = µH
11.Wheatstone bridge & strain gaugesMedium
A bridge has four 470 Ω arms and Vs = 6 V. The sensor R₂ increases by ΔR = 94 Ω. Find the exact output Vab in mV.
Vs = 6 VR = 470 ΩΔR = 94 Ω
Vab = mV
12.Wheatstone bridge & strain gaugesHard
A 350 Ω strain gauge with gauge factor 2.12 is bonded to a steel bar. Under load its resistance rises by 0.2968 Ω. Find the strain ε in microstrain (µε).
Simplify F = A′B′C′ + AB′C′ + AB′C to its minimal sum-of-products form. How many literals L does the simplified expression contain?
F = A′B′C′ + AB′C′ + AB′C
L =
14.Digital logic: gates, K-maps & flip-flopsHard
Find the minimal SOP form of F(A, B, C, D) = Σm(0, 1, 6, 8, 9, 10) + d(2, 3, 12), where d marks the don't-care conditions. How many literals L does it contain?
BJT bias point: in the active region VBE = 0.7 V, IC = β·IB and IE = (β + 1)·IB. Find IB from the base loop with KVL, then IC, then VCE from the collector–emitter loop. A voltage divider at the base is replaced by its Thévenin equivalent VTH = VCC·R₂/(R₁ + R₂), RTH = R₁∥R₂; an emitter resistor appears (β + 1) times larger in the base loop.
Base current
IB = (VCC − VBE)/RB = (9 − 0.7)/470 kΩ = 17.66 µA
Collector current
IC = β·IB = 150·17.66 µA = 2.649 mA
Answer
IC = 2.649 mA
Check: VCE = 5.027 V is well above 0.2 V, so the transistor is indeed active.
2.Diodes & transistors
Answer: RB = 3.636 kΩ
BJT as a switch: to switch a load fully on, the transistor is driven into saturation, where VCE = VCE(sat) and the collector current is set by the load: IC(sat) = (VCC − VCE(sat))/RC. Saturation needs at least IB = IC(sat)/β. If the base current is smaller, the transistor stays active and IC = β·IB.
Collector current in saturation
IC(sat) = (12 − 0.2)/330 = 35.76 mA
Minimum base current
IB(min) = IC(sat)/β = 35.76/50 = 715.2 µA
Base resistor
RB = (3.3 − 0.7)/IB = 2.6 V/0.7152 mA = 3.636 kΩ
Answer
RB = 3.636 kΩ
Any smaller base resistor also saturates the transistor; in practice you pick one a few times smaller.
3.Op-amp circuits
Answer: Vout = −7.2 V
Ideal op-amp rules: with negative feedback, the op-amp drives its output so that its two inputs sit at the same voltage (V₋ = V₊), and no current flows into either input. Writing KCL at the inverting input with these two facts gives the output.
Inverting input follows the input
V₋ = V₊ = −1.2 V
I = V₋/R1 = −1.2/2 = −0.6 mA
Output voltage
The current through R₁ also flows through Rf.
Vout = V₋ + I·Rf = −1.2 + (−0.6)·10 = −7.2 V
Answer
Vout = −7.2 V
4.Op-amp circuits
Answer: Av = −3.124
Ideal op-amp rules: with negative feedback, the op-amp drives its output so that its two inputs sit at the same voltage (V₋ = V₊), and no current flows into either input. Writing KCL at the inverting input with these two facts gives the output.
Gain of each stage
A1 = −Rf1/R1 = −10/4.7 = −2.128
A2 = 1 + Rf2/R2 = 1 + 22/47 = 1.468
Overall gain
Av = A1·A2 = −2.128·1.468 = −3.124
Answer
Av = −3.124
5.RC & RL transients
Answer: i = 0.1839 A
First-order transients: in a circuit with one capacitor or one inductor, every voltage and current moves exponentially from its initial value to its final value: x(t) = x(∞) + [x(0) − x(∞)]·e−t/τ, with τ = RC or τ = L/R. After about 5τ the circuit has settled.
Time constant
τ = L/R = 68 mH / 68 Ω = 1 ms
Decay of the current
i(t) = 0.5·e−1/1 = 0.1839 A
Answer
i = 0.1839 A
6.RC & RL transients
Answer: vC = 11.54 V
First-order transients: in a circuit with one capacitor or one inductor, every voltage and current moves exponentially from its initial value to its final value: x(t) = x(∞) + [x(0) − x(∞)]·e−t/τ, with τ = RC or τ = L/R. After about 5τ the circuit has settled.
Initial value, final value, time constant
The capacitor voltage cannot jump, so it starts at its stored value and heads for the source voltage.
vC(0) = 10 V, vC(∞) = Vs = 15 V
τ = R·C = 10 kΩ · 68 µF = 680 ms
vC(t) = 15 + (10 − 15)·e−t/τ
Voltage at the given time
vC(250) = 15 + (−5)·e−250/680 = 11.54 V
Answer
vC = 11.54 V
7.Series & parallel resistors
Answer: Req = 7.438 Ω
Series and parallel resistors: in series the same current flows through each resistor and R = R₁ + R₂ + …. In parallel each resistor has the same voltage and 1/R = 1/R₁ + 1/R₂ + …. A ladder network is reduced one pair at a time until a single equivalent resistance remains.
Combine resistors from the far end
Start at the end farthest from the source and work back towards it. Resistors carrying the same current are in series; resistors across the same two nodes are in parallel.
R3 + R4 = 5 + 6 = 11 Ω
R2 ∥ 11 = 5·11/(5+11) = 3.438 Ω
Req = R1 + 3.438 = 4 + 3.438 = 7.438 Ω
Answer
Req = 7.438 Ω
8.Series & parallel resistors
Answer: IR1 = 2.444 A
Series and parallel resistors: in series the same current flows through each resistor and R = R₁ + R₂ + …. In parallel each resistor has the same voltage and 1/R = 1/R₁ + 1/R₂ + …. A ladder network is reduced one pair at a time until a single equivalent resistance remains.
Combine resistors from the far end
Start at the end farthest from the source and work back towards it. Resistors carrying the same current are in series; resistors across the same two nodes are in parallel.
R5 + R6 = 8 + 25 = 33 Ω
R4 ∥ 33 = 15.71 Ω
R3 + 15.71 = 27.71 Ω
R2 ∥ 27.71 = 9.732 Ω
Req = R1 + 9.732 = 5 + 9.732 = 14.73 Ω
Current from the source
The source sees only Req, so Ohm’s law gives the current it delivers. That current flows through R₁.
IR1 = V1/Req = 36/14.73 = 2.444 A
Answer
IR1 = 2.444 A
9.DC-DC converters
Answer: ΔIL = 3.574 A
DC-DC converters: a switch S turns on for the fraction D of each period T = 1/f. In steady state the average inductor voltage is zero (volt-second balance), which gives the ideal conversion ratios in continuous conduction: buck Vo = D·Vin, boost Vo = Vin/(1 − D), inverting buck-boost |Vo| = Vin·D/(1 − D). An ideal converter keeps the power: Vin·Iin = Vo·Io. While S is on the inductor current rises by ΔIL = VL·D·T/L, with VL = Vin − Vo for the buck and Vin for the boost and buck-boost. The output ripple is ΔVo = ΔIL/(8fC) for the buck and Io·D/(fC) for the boost and buck-boost. The inductor current just touches zero (the CCM boundary) when the average inductor current equals ΔIL/2.
Duty cycle
D = 112/(48 + 112) = 0.7
Inductor voltage during the on-time
While S is on, the inductor sits directly across Vin.
VL = 48 V
Ripple current
ΔIL = VL·D/(L·f) = 48·0.7/(47·10⁻⁶·200·10³) = 3.574 A
Answer
ΔIL = 3.574 A
10.DC-DC converters
Answer: Lcrit = 3 µH
DC-DC converters: a switch S turns on for the fraction D of each period T = 1/f. In steady state the average inductor voltage is zero (volt-second balance), which gives the ideal conversion ratios in continuous conduction: buck Vo = D·Vin, boost Vo = Vin/(1 − D), inverting buck-boost |Vo| = Vin·D/(1 − D). An ideal converter keeps the power: Vin·Iin = Vo·Io. While S is on the inductor current rises by ΔIL = VL·D·T/L, with VL = Vin − Vo for the buck and Vin for the boost and buck-boost. The output ripple is ΔVo = ΔIL/(8fC) for the buck and Io·D/(fC) for the boost and buck-boost. The inductor current just touches zero (the CCM boundary) when the average inductor current equals ΔIL/2.
Duty cycle
D = 9/12 = 0.75
Boundary condition
Set the average inductor current equal to half the ripple current and solve for L.
Lcrit = (1 − D)·R/(2f)
Critical inductance
Lcrit = (1 − 0.75)·12/(2500·10³) = 3 µH
Answer
Lcrit = 3 µH
11.Wheatstone bridge & strain gauges
Answer: Vab = 272.7 mV
Wheatstone bridge: two voltage dividers share one supply Vs. The left divider R1–R2 gives Va = Vs·R2/(R1 + R2) and the right divider R3–R4 gives Vb = Vs·R4/(R3 + R4); the output is Vab = Va − Vb. The bridge is balanced (Vab = 0, no current in the meter) when R1/R2 = R3/R4, that is R1·R4 = R2·R3. Seen from the output, the bridge is a Thévenin source with Rth = R1∥R2 + R3∥R4.
Node voltages
Va = 6·564/1034 = 3.273 V
Vb = 3 V
Output
Vab = 272.7 mV
Answer
Vab = 272.7 mV
The linear estimate Vs·ΔR/(4R) = 300 mV is 10 % too high: a quarter bridge is not quite linear.
12.Wheatstone bridge & strain gauges
Answer: ε = 400 µε
Strain gauges: a gauge changes its resistance with strain: ΔR/R = GF·ε, where the gauge factor GF is about 2 for metal foil. In a bridge with all arms equal to R, one active gauge (quarter bridge) gives Vo ≈ Vs·GF·ε/4. Two active gauges with opposite strains in adjacent arms (half bridge) give Vs·GF·ε/2, and four (full bridge) give Vs·GF·ε. Stress follows from Hooke’s law, σ = E·ε. Load cells state their sensitivity in mV/V: the output at full load per volt of excitation.
Relative resistance change
ΔR/R = 0.2968/350 = 0.000848
Strain
ε = 0.000848/2.12 = 0.0004 = 400 µε
Answer
ε = 400 µε
13.Digital logic: gates, K-maps & flip-flops
Answer: L = 4
Boolean algebra: the rules that simplify expressions are X + X′ = 1 and X·X′ = 0, X + X = X, absorption X + X·Y = X, the combining rule X·Y + X·Y′ = X, X + X′Y = X + Y and the consensus theorem XY + X′Z + YZ = XY + X′Z. De Morgan's laws turn (X·Y)′ into X′ + Y′ and (X + Y)′ into X′·Y′. A Karnaugh map applies these rules graphically: every group of two neighbouring cells is one use of XY + XY′ = X.
Minterms of the expression
A′B′C′ → m(0)
AB′C′ → m(4)
AB′C → m(5)
Group and read off
F = B′C′ + AB′
Count the literals
L = 4
Answer
L = 4
14.Digital logic: gates, K-maps & flip-flops
Answer: L = 7
Karnaugh maps: the cells are ordered in Gray code (00, 01, 11, 10), so neighbouring cells, including the ones across the edges, differ in exactly one variable. Group the 1s in rectangles of 1, 2, 4, 8 or 16 cells, as large as possible and as few as possible, until every 1 is covered. Each group is one product term: the variables that stay constant inside it. A group of 2ᵏ cells loses k variables. Don't-cares (X) may be used to make groups bigger but never have to be covered. Grouping the 0s instead gives the minimal POS form.
Prime implicants
The largest groups that can be formed from 1s and Xs.