Identify the converter (buck, boost or buck-boost) and the duty cycle D from the voltage ratio.
Use volt-second balance on the inductor: the average inductor voltage over a period is zero.
Find the inductor voltage while the switch is on, then ΔIL = VL·D/(L·f).
For the output ripple, find the charge that flows in and out of the capacitor; for the CCM boundary, set the average inductor current equal to ΔIL/2.
Wheatstone bridge & strain gauges
Divider voltages
Va = VsR2/(R1 + R2), Vb = VsR4/(R3 + R4)
Output
Vab = Va − Vb
Balance
R1/R2 = R3/R4
Slide-wire bridge
R/Rx = l/(100 − l)
Thévenin resistance
Rth = R1∥R2 + R3∥R4
Gauge factor
ΔR/R = GF·ε
Bridge output
quarter Vs·GF·ε/4, half Vs·GF·ε/2, full Vs·GF·ε
Small change, one arm
Vab ≈ Vs·ΔR/(4R)
Stress
σ = E·ε
Method
Treat the bridge as two voltage dividers across the same supply.
For balance, set R₁/R₂ = R₃/R₄ and solve for the unknown resistor.
For an unbalanced bridge, find Va and Vb from the dividers and subtract; use the Thévenin equivalent when a meter loads the output.
For strain gauges, convert strain to ΔR/R = GF·ε and use Vs·GF·ε/4, /2 or ×1 for a quarter, half or full bridge.
Digital logic: gates, K-maps & flip-flops
Basic gates
A·B, A + B, A′, (A·B)′, (A + B)′, A ⊕ B
Boolean rules
X + X′ = 1, X·X′ = 0, X + XY = X, XY + XY′ = X
De Morgan
(X·Y)′ = X′ + Y′, (X + Y)′ = X′·Y′
Karnaugh map order
00, 01, 11, 10 (Gray code)
Group of 2ᵏ cells
loses k variables
4-to-1 multiplexer
F = A′B′I0 + A′BI1 + AB′I2 + ABI3
Flip-flops
D: Q⁺ = D, T: Q⁺ = T ⊕ Q, JK: Q⁺ = JQ′ + K′Q
Counters
n-bit: 2ⁿ states; mod-N: smallest n with 2ⁿ ≥ N; fout = fclk/N
Ripple counter
fmax = 1/(n·tpd)
Ring and Johnson counters
n and 2n states
Method
For a circuit, work from the inputs to the output one gate at a time and write the value on every wire, or write its expression and fill in the truth table.
For simplification, put the 1s (and the don’t-cares as X) into a Karnaugh map with Gray-code rows and columns: 00, 01, 11, 10.
Cover the 1s with as few and as large groups of 1, 2, 4, 8 or 16 cells as possible, wrapping round the edges; each group is one product term made of the variables that stay constant. Group the 0s for the POS form.
For flip-flops and counters, read the inputs at each active clock edge, write the state after every edge, and remember that an n-bit counter wraps round after 2ⁿ states.
2Practice problems
1.Diodes & transistorsMedium
4 red LEDs (forward voltage 2 V each) are connected in series with a resistor to a 9 V supply. Find the resistance R that sets the current to 25 mA.
Vs = 9 VVF = 2 Vn = 4I = 25 mA
R = Ω
2.Diodes & transistorsHard
An NPN transistor with β = 80 switches a 470 Ω load resistor connected between VCC = 12 V and its collector. The emitter is grounded. The base is driven from a 5 V logic output through a base resistor RB. Take VBE = 0.7 V and VCE(sat) = 0.2 V. For reliable switching, design for a base current 3 times the minimum needed for saturation. Find RB in kΩ.
The op-amp is ideal and runs from ±15 V supplies. Find the output voltage Vout.
Vin = 0.8 VR1 = 22 kΩRf = 22 kΩ
Vout = V
4.Op-amp circuitsHard
The integrator uses an ideal op-amp with ±15 V supplies; its output saturates at ±13 V. The capacitor is uncharged when a constant input Vin = 2.3 V is applied at t = 0. How long after t = 0 does the output reach saturation? Find t.
Vin = 2.3 VR = 47 kΩC = 4.7 µFVsat = ±13 V
t = ms
5.RC & RL transientsMedium
The inductor carries a steady current of 0.5 A. At t = 0 the switch closes the loop through R and the source is removed, so the inductor current decays through R. How long does it take for the current to fall to 0.125 A? Find t.
i(0) = 0.5 AR = 50 ΩL = 10 mH
t = ms
6.RC & RL transientsHard
A timer starts charging an uncharged capacitor through a resistor from a 5 V supply at t = 0. It must trigger when the capacitor voltage reaches 3.75 V, exactly 200 ms after the start. With C = 1 µF, find the resistance R needed.
Vs = 5 VVth = 3.75 VT = 200 msC = 1 µF
R = kΩ
7.Series & parallel resistorsMedium
Find the current IR1 delivered by the source, which flows through R1.
V1 = 10 VR1 = 15 ΩR2 = 12 ΩR3 = 4 ΩR4 = 15 Ω
IR1 = A
8.Series & parallel resistorsHard
Find the current IR1 delivered by the source, which flows through R1.
A buck converter turns 36 V into 18 V for a 5 Ω load. It switches at 200 kHz with L = 100 µH. Find the peak inductor current Imax.
Vin = 36 VVo = 18 Vf = 200 kHzL = 100 µHR = 5 Ω
Imax = A
10.DC-DC convertersHard
An ideal boost converter turns 12 V into 48 V for a 25 Ω load at 100 kHz. Find the smallest inductance Lcrit for continuous conduction.
Vin = 12 VVo = 48 Vf = 100 kHzR = 25 Ω
Lcrit = µH
11.Wheatstone bridge & strain gaugesMedium
A 200 Ω strain gauge is one arm (R₂) of a bridge with four equal 200 Ω arms and an excitation of 5 V. Find the power Pg dissipated in the gauge, in mW. Self-heating limits the excitation.
Vs = 5 VR = 200 Ω
Pg = mW
12.Wheatstone bridge & strain gaugesHard
A strain gauge (GF = 2.05) on a member with E = 110 GPa forms a quarter bridge excited with 2.5 V. The output reads 1.537 mV. Find the axial stress σ in MPa.
Use the Karnaugh map to find the minimal sum-of-products (SOP) form of F(A, B, C, D) = Σm(5, 6, 12, 13). How many literals L does it contain in total (a primed variable counts as one literal)?
F(A, B, C, D) = Σm(5, 6, 12, 13)
L =
14.Digital logic: gates, K-maps & flip-flopsHard
Find the minimal SOP form of F(A, B, C, D) = Σm(0, 4, 5, 6, 7, 10, 12, 15) + d(2, 3, 9), where d marks the don't-care conditions. How many product terms N does it have?
LED and diode circuits: a forward-biased LED drops roughly its forward voltage VF (about 2 V for red, 3 V for blue or white), whatever the current. A series resistor sets the current: R = (Vs − n·VF)/I for n LEDs in series. With a more exact diode model V = V₀ + I·rd, the operating point is where the diode line meets the load line I = (Vs − V)/R, so I = (Vs − V₀)/(R + rd).
Voltage across the resistor
VR = 9 − 4·2 = 1 V
Resistance
R = 1/0.025 = 40 Ω
Answer
R = 40 Ω
The resistor dissipates 25 mW.
2.Diodes & transistors
Answer: RB = 4.567 kΩ
BJT as a switch: to switch a load fully on, the transistor is driven into saturation, where VCE = VCE(sat) and the collector current is set by the load: IC(sat) = (VCC − VCE(sat))/RC. Saturation needs at least IB = IC(sat)/β. If the base current is smaller, the transistor stays active and IC = β·IB.
Collector current in saturation
IC(sat) = (12 − 0.2)/470 = 25.11 mA
Minimum base current
IB(min) = IC(sat)/β = 25.11/80 = 313.8 µA
Design base current
IB = 3·313.8 µA = 941.5 µA
Base resistor
RB = (5 − 0.7)/IB = 4.3 V/0.9415 mA = 4.567 kΩ
Answer
RB = 4.567 kΩ
3.Op-amp circuits
Answer: Vout = 1.6 V
Ideal op-amp rules: with negative feedback, the op-amp drives its output so that its two inputs sit at the same voltage (V₋ = V₊), and no current flows into either input. Writing KCL at the inverting input with these two facts gives the output.
Inverting input follows the input
V₋ = V₊ = 0.8 V
I = V₋/R1 = 0.8/22 = 0.03636 mA
Output voltage
The current through R₁ also flows through Rf.
Vout = V₋ + I·Rf = 0.8 + 0.03636·22 = 1.6 V
Answer
Vout = 1.6 V
4.Op-amp circuits
Answer: t = 1249 ms
Ideal op-amp rules: with negative feedback, the op-amp drives its output so that its two inputs sit at the same voltage (V₋ = V₊), and no current flows into either input. Writing KCL at the inverting input with these two facts gives the output.
|Vin|·t/(RC) = Vsat → t = Vsat·RC/|Vin| = 13·220.9/2.3 = 1249 ms
Answer
t = 1249 ms
5.RC & RL transients
Answer: t = 0.2773 ms
First-order transients: in a circuit with one capacitor or one inductor, every voltage and current moves exponentially from its initial value to its final value: x(t) = x(∞) + [x(0) − x(∞)]·e−t/τ, with τ = RC or τ = L/R. After about 5τ the circuit has settled.
Time constant
τ = L/R = 10 mH / 50 Ω = 0.2 ms
Solve for the time
0.125 = 0.5·e−t/τ → t = τ·ln(0.5/0.125)
t = 0.2·ln(4) = 0.2773 ms
Answer
t = 0.2773 ms
6.RC & RL transients
Answer: R = 144.3 kΩ
First-order transients: in a circuit with one capacitor or one inductor, every voltage and current moves exponentially from its initial value to its final value: x(t) = x(∞) + [x(0) − x(∞)]·e−t/τ, with τ = RC or τ = L/R. After about 5τ the circuit has settled.
Required time constant
3.75 = 5·(1 − e−200/τ) → τ = 200/ln(5/(5 − 3.75))
τ = 200/1.386 = 144.3 ms
Resistance
kΩ times µF gives milliseconds.
R = τ/C = 144.3/1 = 144.3 kΩ
Answer
R = 144.3 kΩ
7.Series & parallel resistors
Answer: IR1 = 0.4473 A
Series and parallel resistors: in series the same current flows through each resistor and R = R₁ + R₂ + …. In parallel each resistor has the same voltage and 1/R = 1/R₁ + 1/R₂ + …. A ladder network is reduced one pair at a time until a single equivalent resistance remains.
Combine resistors from the far end
Start at the end farthest from the source and work back towards it. Resistors carrying the same current are in series; resistors across the same two nodes are in parallel.
R3 + R4 = 4 + 15 = 19 Ω
R2 ∥ 19 = 12·19/(12+19) = 7.355 Ω
Req = R1 + 7.355 = 15 + 7.355 = 22.35 Ω
Current from the source
The source sees only Req, so Ohm’s law gives the current it delivers. That current flows through R₁.
IR1 = V1/Req = 10/22.35 = 0.4473 A
Answer
IR1 = 0.4473 A
8.Series & parallel resistors
Answer: IR1 = 0.4107 A
Series and parallel resistors: in series the same current flows through each resistor and R = R₁ + R₂ + …. In parallel each resistor has the same voltage and 1/R = 1/R₁ + 1/R₂ + …. A ladder network is reduced one pair at a time until a single equivalent resistance remains.
Combine resistors from the far end
Start at the end farthest from the source and work back towards it. Resistors carrying the same current are in series; resistors across the same two nodes are in parallel.
R5 + R6 = 10 + 20 = 30 Ω
R4 ∥ 30 = 4.286 Ω
R3 + 4.286 = 14.29 Ω
R2 ∥ 14.29 = 6.522 Ω
Req = R1 + 6.522 = 30 + 6.522 = 36.52 Ω
Current from the source
The source sees only Req, so Ohm’s law gives the current it delivers. That current flows through R₁.
IR1 = V1/Req = 15/36.52 = 0.4107 A
Answer
IR1 = 0.4107 A
9.DC-DC converters
Answer: Imax = 3.825 A
DC-DC converters: a switch S turns on for the fraction D of each period T = 1/f. In steady state the average inductor voltage is zero (volt-second balance), which gives the ideal conversion ratios in continuous conduction: buck Vo = D·Vin, boost Vo = Vin/(1 − D), inverting buck-boost |Vo| = Vin·D/(1 − D). An ideal converter keeps the power: Vin·Iin = Vo·Io. While S is on the inductor current rises by ΔIL = VL·D·T/L, with VL = Vin − Vo for the buck and Vin for the boost and buck-boost. The output ripple is ΔVo = ΔIL/(8fC) for the buck and Io·D/(fC) for the boost and buck-boost. The inductor current just touches zero (the CCM boundary) when the average inductor current equals ΔIL/2.
Duty cycle
D = 18/36 = 0.5
Average and ripple current
Io = 18/5 = 3.6 A
ΔIL = VL·D/(L·f) = 18·0.5/(100·10⁻⁶·200·10³) = 0.45 A
Peak current
Imax = 3.6 + 0.45/2 = 3.825 A
Answer
Imax = 3.825 A
10.DC-DC converters
Answer: Lcrit = 5.859 µH
DC-DC converters: a switch S turns on for the fraction D of each period T = 1/f. In steady state the average inductor voltage is zero (volt-second balance), which gives the ideal conversion ratios in continuous conduction: buck Vo = D·Vin, boost Vo = Vin/(1 − D), inverting buck-boost |Vo| = Vin·D/(1 − D). An ideal converter keeps the power: Vin·Iin = Vo·Io. While S is on the inductor current rises by ΔIL = VL·D·T/L, with VL = Vin − Vo for the buck and Vin for the boost and buck-boost. The output ripple is ΔVo = ΔIL/(8fC) for the buck and Io·D/(fC) for the boost and buck-boost. The inductor current just touches zero (the CCM boundary) when the average inductor current equals ΔIL/2.
Duty cycle
D = 1 − 12/48 = 0.75
Boundary condition
Set the average inductor current equal to half the ripple current and solve for L.
Lcrit = D(1 − D)²·R/(2f)
Critical inductance
Lcrit = 0.75(1 − 0.75)²·25/(2100·10³) = 5.859 µH
Answer
Lcrit = 5.859 µH
11.Wheatstone bridge & strain gauges
Answer: Pg = 31.25 mW
Wheatstone bridge: two voltage dividers share one supply Vs. The left divider R1–R2 gives Va = Vs·R2/(R1 + R2) and the right divider R3–R4 gives Vb = Vs·R4/(R3 + R4); the output is Vab = Va − Vb. The bridge is balanced (Vab = 0, no current in the meter) when R1/R2 = R3/R4, that is R1·R4 = R2·R3. Seen from the output, the bridge is a Thévenin source with Rth = R1∥R2 + R3∥R4.
Voltage across the gauge
V = 5/2 = 2.5 V
Power
Pg = 2.5²/200 = 31.25 mW
Answer
Pg = 31.25 mW
12.Wheatstone bridge & strain gauges
Answer: σ = 132 MPa
Strain gauges: a gauge changes its resistance with strain: ΔR/R = GF·ε, where the gauge factor GF is about 2 for metal foil. In a bridge with all arms equal to R, one active gauge (quarter bridge) gives Vo ≈ Vs·GF·ε/4. Two active gauges with opposite strains in adjacent arms (half bridge) give Vs·GF·ε/2, and four (full bridge) give Vs·GF·ε. Stress follows from Hooke’s law, σ = E·ε. Load cells state their sensitivity in mV/V: the output at full load per volt of excitation.
Strain
ε = 4·0.001537/(2.5·2.05) = 0.0012
Stress
σ = 110·10³ MPa·0.0012 = 132 MPa
Answer
σ = 132 MPa
13.Digital logic: gates, K-maps & flip-flops
Answer: L = 10
Karnaugh maps: the cells are ordered in Gray code (00, 01, 11, 10), so neighbouring cells, including the ones across the edges, differ in exactly one variable. Group the 1s in rectangles of 1, 2, 4, 8 or 16 cells, as large as possible and as few as possible, until every 1 is covered. Each group is one product term: the variables that stay constant inside it. A group of 2ᵏ cells loses k variables. Don't-cares (X) may be used to make groups bigger but never have to be covered. Grouping the 0s instead gives the minimal POS form.
Group the 1s
Every group is a rectangle of 2ᵏ cells; edge cells are neighbours of the cells on the opposite edge.
BC′D
ABC′
A′BCD′
Minimal SOP form
F = BC′D + ABC′ + A′BCD′
L = 10
Answer
L = 10
14.Digital logic: gates, K-maps & flip-flops
Answer: N = 5
Karnaugh maps: the cells are ordered in Gray code (00, 01, 11, 10), so neighbouring cells, including the ones across the edges, differ in exactly one variable. Group the 1s in rectangles of 1, 2, 4, 8 or 16 cells, as large as possible and as few as possible, until every 1 is covered. Each group is one product term: the variables that stay constant inside it. A group of 2ᵏ cells loses k variables. Don't-cares (X) may be used to make groups bigger but never have to be covered. Grouping the 0s instead gives the minimal POS form.
Prime implicants
The largest groups that can be formed from 1s and Xs.