Electronics 1: cram pack

Formula sheets, the key method steps for every topic and 14 practice problems, with full solutions at the back.

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1Formulas and methods

Diodes & transistors

Diode (constant drop)
VD = 0.7 V when conducting
Active region
VBE = 0.7 V, IC = β·IB, IE = (β + 1)·IB
Fixed bias
IB = (VCC − 0.7)/RB
Divider bias
IB = (VTH − 0.7)/(RTH + (β + 1)RE)
Thévenin of the divider
VTH = VCC·R2/(R1 + R2), RTH = R1∥R2
Collector loop
VCE = VCC − ICRC − IERE
Saturation
IC(sat) = (VCC − VCE(sat))/RC, IB ≥ IC(sat)/β

Op-amp circuits

Inverting amplifier
Vout = −(Rf/Rin)·Vin
Non-inverting amplifier
Vout = (1 + Rf/R1)·Vin
Summing amplifier
Vout = −Rf(V1/R1 + V2/R2)
Ideal op-amp
V+ = V−, Iin = 0

RC & RL transients

Time constant
τ = RC | τ = L/R
Response
x(t) = x(∞) + [x(0) − x(∞)]·e−t/τ
Capacitor at DC
open circuit; vC cannot jump
Inductor at DC
short circuit; iL cannot jump
Settled
t ≈ 5τ

Method

  1. Find the initial value just after switching: a capacitor voltage and an inductor current cannot jump.
  2. Find the final value long after switching: a capacitor acts as an open circuit, an inductor as a short circuit.
  3. Find the time constant: τ = RC or τ = L/R, using the resistance seen by the capacitor or inductor.
  4. Use x(t) = x(∞) + [x(0) − x(∞)]·e−t/τ.

Series & parallel resistors

Resistors in series
Req = R1 + R2 + …
Resistors in parallel
1/Req = 1/R1 + 1/R2 + …
Two in parallel
Req = R1R2 / (R1 + R2)
Ohm's law
V = I·R
Power
P = V·I = I²R = V²/R

Method

  1. Start at the end of the network furthest from the terminals.
  2. Combine resistors in series by adding them, and resistors in parallel with 1/R = 1/R₁ + 1/R₂ + …
  3. Redraw the circuit after each step.
  4. Repeat until one resistor is left between the terminals.

DC-DC converters

Buck
Vo = D·Vin
Boost
Vo = Vin/(1 − D)
Inverting buck-boost
|Vo| = Vin·D/(1 − D)
Ideal power balance
VinIin = VoIo
Inductor ripple
ΔIL = VL,on·D/(L·f); buck Vin − Vo, boost and buck-boost Vin
Average inductor current
buck Io; boost and buck-boost Io/(1 − D)
Output ripple
buck ΔIL/(8fC); boost and buck-boost Io·D/(fC)
CCM boundary
buck (1 − D)R/(2f); boost D(1 − D)²R/(2f); buck-boost (1 − D)²R/(2f)

Method

  1. Identify the converter (buck, boost or buck-boost) and the duty cycle D from the voltage ratio.
  2. Use volt-second balance on the inductor: the average inductor voltage over a period is zero.
  3. Find the inductor voltage while the switch is on, then ΔIL = VL·D/(L·f).
  4. For the output ripple, find the charge that flows in and out of the capacitor; for the CCM boundary, set the average inductor current equal to ΔIL/2.

Wheatstone bridge & strain gauges

Divider voltages
Va = VsR2/(R1 + R2), Vb = VsR4/(R3 + R4)
Output
Vab = Va − Vb
Balance
R1/R2 = R3/R4
Slide-wire bridge
R/Rx = l/(100 − l)
Thévenin resistance
Rth = R1∥R2 + R3∥R4
Gauge factor
ΔR/R = GF·ε
Bridge output
quarter Vs·GF·ε/4, half Vs·GF·ε/2, full Vs·GF·ε
Small change, one arm
Vab ≈ Vs·ΔR/(4R)
Stress
σ = E·ε

Method

  1. Treat the bridge as two voltage dividers across the same supply.
  2. For balance, set R₁/R₂ = R₃/R₄ and solve for the unknown resistor.
  3. For an unbalanced bridge, find Va and Vb from the dividers and subtract; use the Thévenin equivalent when a meter loads the output.
  4. For strain gauges, convert strain to ΔR/R = GF·ε and use Vs·GF·ε/4, /2 or ×1 for a quarter, half or full bridge.

Digital logic: gates, K-maps & flip-flops

Basic gates
A·B, A + B, A′, (A·B)′, (A + B)′, A ⊕ B
Boolean rules
X + X′ = 1, X·X′ = 0, X + XY = X, XY + XY′ = X
De Morgan
(X·Y)′ = X′ + Y′, (X + Y)′ = X′·Y′
Karnaugh map order
00, 01, 11, 10 (Gray code)
Group of 2ᵏ cells
loses k variables
4-to-1 multiplexer
F = A′B′I0 + A′BI1 + AB′I2 + ABI3
Flip-flops
D: Q⁺ = D, T: Q⁺ = T ⊕ Q, JK: Q⁺ = JQ′ + K′Q
Counters
n-bit: 2ⁿ states; mod-N: smallest n with 2ⁿ ≥ N; fout = fclk/N
Ripple counter
fmax = 1/(n·tpd)
Ring and Johnson counters
n and 2n states

Method

  1. For a circuit, work from the inputs to the output one gate at a time and write the value on every wire, or write its expression and fill in the truth table.
  2. For simplification, put the 1s (and the don’t-cares as X) into a Karnaugh map with Gray-code rows and columns: 00, 01, 11, 10.
  3. Cover the 1s with as few and as large groups of 1, 2, 4, 8 or 16 cells as possible, wrapping round the edges; each group is one product term made of the variables that stay constant. Group the 0s for the POS form.
  4. For flip-flops and counters, read the inputs at each active clock edge, write the state after every edge, and remember that an n-bit counter wraps round after 2ⁿ states.

2Practice problems

1.Diodes & transistorsMedium
RC​ = 1.5 kΩβ = 200VCC​ = 15 VRB​ = 330 kΩ

An NPN transistor with β = 200 is biased by a base resistor RB = 330 kΩ from the supply VCC = 15 V. The collector resistor is RC = 1.5 kΩ and the emitter is grounded. Take VBE = 0.7 V and assume the transistor is in the active region. Find the collector–emitter voltage VCE.

VCC = 15 VRB = 330 kΩRC = 1.5 kΩβ = 200VBE = 0.7 V
VCE = V
2.Diodes & transistorsHard
RC​ = 330 Ωβ = 200IC​ = ?VCC​ = 5 V3.3 VRB​ = 2.2 kΩ

An NPN transistor with β = 200 switches a 330 Ω load resistor connected between VCC = 5 V and its collector. The emitter is grounded. The base is driven from a 3.3 V logic output through a base resistor RB = 2.2 kΩ. Take VBE = 0.7 V and VCE(sat) = 0.2 V. Find the collector current IC in mA when the input is high. Decide first whether the transistor is saturated.

VCC = 5 VRC = 330 Ωβ = 200Vin = 3.3 VVBE = 0.7 VVCE(sat) = 0.2 VRB = 2.2 kΩ
IC = mA
3.Op-amp circuitsMedium
−+Vout​Rf​ = 47 kΩVin​R1​ = 2 kΩ

The op-amp is ideal and runs from ±15 V supplies; its output saturates at ±14 V. The inverting amplifier is driven by a sine wave. Find the largest input amplitude Vin,max (peak value) for which the output does not clip.

R1 = 2 kΩRf = 47 kΩVsat = ±14 V
Vin,max = V
4.Op-amp circuitsHard
−+Vout​Rf​ = 4.7 kΩV1​ = −1.4 VR1​ = 22 kΩV2​ = 1 VR2​ = 100 kΩ

The summing amplifier uses an ideal op-amp with ±15 V supplies. Find the output voltage Vout.

V1 = −1.4 VV2 = 1 VR1 = 22 kΩR2 = 100 kΩRf = 4.7 kΩ
Vout = V
5.RC & RL transientsMedium
+−Vs​20 Vt = 0R = 33 ΩL47 mHi(t)

The inductor carries no current before the switch closes at t = 0. Find the energy W stored in the inductor at t = 1 ms, in mJ.

Vs = 20 VR = 33 ΩL = 47 mHt = 1 ms
W = mJ
6.RC & RL transientsHard
+−Vs​24 VR1​ = 20 ΩR2​ = 10 Ωopens at t = 0L100 mHi(t)

The switch across R2 has been closed for a long time, so the inductor current is steady. At t = 0 the switch opens. Find the inductor current i at t = 5 ms.

Vs = 24 VR1 = 20 ΩR2 = 10 ΩL = 100 mHt = 5 ms
i = A
7.Series & parallel resistorsMedium
R1​ = 8 ΩR3​ = 10 Ω+−V1​15 VR2​12 ΩIR2​AR4​2 ΩB

Find the current IR2 through R2.

V1 = 15 VR1 = 8 ΩR2 = 12 ΩR3 = 10 ΩR4 = 2 Ω
IR2 = A
8.Series & parallel resistorsHard
R1​ = 4 ΩIR1​R3​ = 4 ΩR5​ = 15 Ω+−V1​24 VR2​4 ΩAR4​5 ΩBR6​6 Ω

Find the current IR1 delivered by the source, which flows through R1.

V1 = 24 VR1 = 4 ΩR2 = 4 ΩR3 = 4 ΩR4 = 5 ΩR5 = 15 ΩR6 = 6 Ω
IR1 = A
9.DC-DC convertersMedium
tiL​Imax​Imin​ΔI = ?DTT2T

An ideal buck converter turns 15 V into 10.5 V at 50 kHz with L = 22 µH. Find the peak-to-peak inductor ripple current ΔIL.

Vin​ = 15 VVo​ = 10.5 Vf = 50 kHzL = 22 µH
ΔIL = A
10.DC-DC convertersHard
+−24 VLSC = 100 µFR = 10 Ω+−60 V

An ideal boost converter turns 24 V into 60 V for a 10 Ω load at 50 kHz. The output capacitor is 100 µF. Find the peak-to-peak output voltage ripple ΔVo in mV.

Vin​ = 24 VVo​ = 60 Vf = 50 kHzC = 100 µFR = 10 Ω
ΔVo = mV
11.Wheatstone bridge & strain gaugesMedium
+−5 V1000 Ω1000 Ω + ΔR1000 Ω1000 Ωab+−119 mV

A bridge with four 1000 Ω arms is supplied with 5 V. When the sensor R₂ changes, the output reads Vab = 119 mV. Find the exact change ΔR of R₂.

Vs = 5 VR = 1000 ΩVab = 119 mV
ΔR = Ω
12.Wheatstone bridge & strain gaugesHard
+−2.5 V120 Ω − ΔR120 Ω + ΔR120 Ω120 Ωab+−Vo​ = ?

A bridge with 120 Ω arms is excited with 2.5 V and has two active gauges in adjacent arms, one in tension and one in compression (half bridge). The gauge factor is 2.05 and the strain is 400 µε. Find the bridge output Vo in mV.

Vs = 2.5 VGF = 2.05ε = 400 µε
Vo = mV
13.Digital logic: gates, K-maps & flip-flopsMedium
ABCD000111100001111010111312040507161120131151140819111110

Use the Karnaugh map to find the minimal sum-of-products (SOP) form of F(A, B, C, D) = Σm(0, 1, 2, 3, 6, 9, 10, 11, 12, 14, 15). How many product terms N does it have?

F(A, B, C, D) = Σm(0, 1, 2, 3, 6, 9, 10, 11, 12, 14, 15)
N =
14.Digital logic: gates, K-maps & flip-flopsHard
ABCD000111100001111010X1131204051706X12113115114X809111010

Find the minimal SOP form of F(A, B, C, D) = Σm(0, 2, 3, 7, 11, 13, 14, 15) + d(1, 8, 12), where d marks the don't-care conditions. How many literals L does it contain?

F(A, B, C, D) = Σm(0, 2, 3, 7, 11, 13, 14, 15) + d(1, 8, 12)
L =

3Solutions

1.Diodes & transistors

Answer: VCE = 2 V

BJT bias point: in the active region VBE = 0.7 V, IC = β·IB and IE = (β + 1)·IB. Find IB from the base loop with KVL, then IC, then VCE from the collector–emitter loop. A voltage divider at the base is replaced by its Thévenin equivalent VTH = VCC·R₂/(R₁ + R₂), RTH = R₁∥R₂; an emitter resistor appears (β + 1) times larger in the base loop.

Base current

IB = (VCC − VBE)/RB = (15 − 0.7)/330 kΩ = 43.33 µA

Collector current

IC = β·IB = 200·43.33 µA = 8.667 mA

Collector–emitter voltage

VCE = 15 − 8.667 mA·1.5 kΩ = 2 V

Answer

VCE = 2 V
2.Diodes & transistors

Answer: IC = 14.55 mA

BJT as a switch: to switch a load fully on, the transistor is driven into saturation, where VCE = VCE(sat) and the collector current is set by the load: IC(sat) = (VCC − VCE(sat))/RC. Saturation needs at least IB = IC(sat)/β. If the base current is smaller, the transistor stays active and IC = β·IB.

Base current

IB = (3.3 − 0.7)/2.2 kΩ = 1182 µA

Saturated or active?

β·IB is larger than IC(sat), so the transistor saturates.

β·IB = 236.4 mA
IC(sat) = (5 − 0.2)/330 = 14.55 mA

Collector current

IC = IC(sat) = 14.55 mA

Answer

IC = 14.55 mA

The transistor is saturated.

3.Op-amp circuits

Answer: Vin,max = 0.5957 V

Ideal op-amp rules: with negative feedback, the op-amp drives its output so that its two inputs sit at the same voltage (V₋ = V₊), and no current flows into either input. Writing KCL at the inverting input with these two facts gives the output.

Gain

|Av| = Rf/R1 = 47/2 = 23.5

Largest input before clipping

Vin,max = Vsat/|Av| = 14/23.5 = 0.5957 V

Answer

Vin,max = 0.5957 V
4.Op-amp circuits

Answer: Vout = 0.2521 V

Ideal op-amp rules: with negative feedback, the op-amp drives its output so that its two inputs sit at the same voltage (V₋ = V₊), and no current flows into either input. Writing KCL at the inverting input with these two facts gives the output.

Input currents

V₋ = 0, so each input resistor has its full input voltage across it.

I1 = V1/R1 = −1.4/22 = −0.06364 mA
I2 = V2/R2 = 1/100 = 0.01 mA
If = I1 + I2 = −0.05364 mA

Output voltage

Vout = −Rf·If = −4.7·(−0.05364) = 0.2521 V

Answer

Vout = 0.2521 V
5.RC & RL transients

Answer: W = 2.197 mJ

First-order transients: in a circuit with one capacitor or one inductor, every voltage and current moves exponentially from its initial value to its final value: x(t) = x(∞) + [x(0) − x(∞)]·e−t/τ, with τ = RC or τ = L/R. After about 5τ the circuit has settled.

Time constant and final current

Long after the switch closes the inductor behaves like a short circuit, so the final current is set by R alone.

τ = L/R = 47 mH / 33 Ω = 1.424 ms
i(∞) = Vs/R = 20/33 = 0.6061 A

Current at the given time

i(t) = 0.6061·(1 − e−1/1.424) = 0.3057 A

Stored energy

W = ½·L·i² = ½·47·0.3057² = 2.197 mJ

Answer

W = 2.197 mJ
6.RC & RL transients

Answer: i = 0.8893 A

First-order transients: in a circuit with one capacitor or one inductor, every voltage and current moves exponentially from its initial value to its final value: x(t) = x(∞) + [x(0) − x(∞)]·e−t/τ, with τ = RC or τ = L/R. After about 5τ the circuit has settled.

Initial value, final value, time constant

Before t = 0 the closed switch bypasses R₂; afterwards R₁ and R₂ are both in the loop.

i(0) = 24/20 = 1.2 A
i(∞) = 24/(20 + 10) = 0.8 A
τ = L/R = 100/30 = 3.333 ms
i(t) = 0.8 + (1.2 − 0.8)·e−t/τ

Current at the given time

i(5) = 0.8 + (0.4)·e−5/3.333 = 0.8893 A

Answer

i = 0.8893 A
7.Series & parallel resistors

Answer: IR2 = 0.5357 A

Series and parallel resistors: in series the same current flows through each resistor and R = R₁ + R₂ + …. In parallel each resistor has the same voltage and 1/R = 1/R₁ + 1/R₂ + …. A ladder network is reduced one pair at a time until a single equivalent resistance remains.

R1​ = 8 ΩR3​ = 10 Ω+−V1​15 VR2​12 ΩAR4​2 ΩB

Combine resistors from the far end

Start at the end farthest from the source and work back towards it. Resistors carrying the same current are in series; resistors across the same two nodes are in parallel.

R3 + R4 = 10 + 2 = 12 Ω
R2 ∥ 12 = 12·12/(12+12) = 6 Ω
Req = R1 + 6 = 8 + 6 = 14 Ω

Current from the source

The source sees only Req, so Ohm’s law gives the current it delivers. That current flows through R₁.

IR1 = V1/Req = 15/14 = 1.071 A

Current through R₂

Subtract the drop across R₁ to get the voltage at node A, which is the voltage across R₂.

VA = V1 − IR1·R1 = 15 − 1.071·8 = 6.429 V
IR2 = VA/R2 = 6.429/12 = 0.5357 A

Answer

IR2 = 0.5357 A
8.Series & parallel resistors

Answer: IR1 = 3.598 A

Series and parallel resistors: in series the same current flows through each resistor and R = R₁ + R₂ + …. In parallel each resistor has the same voltage and 1/R = 1/R₁ + 1/R₂ + …. A ladder network is reduced one pair at a time until a single equivalent resistance remains.

R1​ = 4 ΩR3​ = 4 ΩR5​ = 15 Ω+−V1​24 VR2​4 ΩAR4​5 ΩBR6​6 Ω

Combine resistors from the far end

Start at the end farthest from the source and work back towards it. Resistors carrying the same current are in series; resistors across the same two nodes are in parallel.

R5 + R6 = 15 + 6 = 21 Ω
R4 ∥ 21 = 4.038 Ω
R3 + 4.038 = 8.038 Ω
R2 ∥ 8.038 = 2.671 Ω
Req = R1 + 2.671 = 4 + 2.671 = 6.671 Ω

Current from the source

The source sees only Req, so Ohm’s law gives the current it delivers. That current flows through R₁.

IR1 = V1/Req = 24/6.671 = 3.598 A

Answer

IR1 = 3.598 A
9.DC-DC converters

Answer: ΔIL = 2.864 A

DC-DC converters: a switch S turns on for the fraction D of each period T = 1/f. In steady state the average inductor voltage is zero (volt-second balance), which gives the ideal conversion ratios in continuous conduction: buck Vo = D·Vin, boost Vo = Vin/(1 − D), inverting buck-boost |Vo| = Vin·D/(1 − D). An ideal converter keeps the power: Vin·Iin = Vo·Io. While S is on the inductor current rises by ΔIL = VL·D·T/L, with VL = Vin − Vo for the buck and Vin for the boost and buck-boost. The output ripple is ΔVo = ΔIL/(8fC) for the buck and Io·D/(fC) for the boost and buck-boost. The inductor current just touches zero (the CCM boundary) when the average inductor current equals ΔIL/2.

Duty cycle

D = 10.5/15 = 0.7

Inductor voltage during the on-time

While S is on, the inductor sits between Vin and Vo.

VL = 15 − 10.5 = 4.5 V

Ripple current

ΔIL = VL·D/(L·f) = 4.5·0.7/(22·10⁻⁶·50·10³) = 2.864 A

Answer

ΔIL = 2.864 A
10.DC-DC converters

Answer: ΔVo = 720 mV

DC-DC converters: a switch S turns on for the fraction D of each period T = 1/f. In steady state the average inductor voltage is zero (volt-second balance), which gives the ideal conversion ratios in continuous conduction: buck Vo = D·Vin, boost Vo = Vin/(1 − D), inverting buck-boost |Vo| = Vin·D/(1 − D). An ideal converter keeps the power: Vin·Iin = Vo·Io. While S is on the inductor current rises by ΔIL = VL·D·T/L, with VL = Vin − Vo for the buck and Vin for the boost and buck-boost. The output ripple is ΔVo = ΔIL/(8fC) for the buck and Io·D/(fC) for the boost and buck-boost. The inductor current just touches zero (the CCM boundary) when the average inductor current equals ΔIL/2.

Duty cycle

D = 1 − 24/60 = 0.6

Load current

Io = 60/10 = 6 A

Output ripple

ΔVo = 6·0.6/(50·10³·100·10⁻⁶) = 720 mV

Answer

ΔVo = 720 mV
11.Wheatstone bridge & strain gauges

Answer: ΔR = 100 Ω

Wheatstone bridge: two voltage dividers share one supply Vs. The left divider R1–R2 gives Va = Vs·R2/(R1 + R2) and the right divider R3–R4 gives Vb = Vs·R4/(R3 + R4); the output is Vab = Va − Vb. The bridge is balanced (Vab = 0, no current in the meter) when R1/R2 = R3/R4, that is R1·R4 = R2·R3. Seen from the output, the bridge is a Thévenin source with Rth = R1∥R2 + R3∥R4.

Node voltage

Va = 2.5 + 0.1191 = 2.619 V

Solve the divider

R₂ = 1000·2.619/(5 − 2.619) = 1100 Ω
ΔR = 1100 − 1000 = 100 Ω

Answer

ΔR = 100 Ω
12.Wheatstone bridge & strain gauges

Answer: Vo = 1.025 mV

Strain gauges: a gauge changes its resistance with strain: ΔR/R = GF·ε, where the gauge factor GF is about 2 for metal foil. In a bridge with all arms equal to R, one active gauge (quarter bridge) gives Vo ≈ Vs·GF·ε/4. Two active gauges with opposite strains in adjacent arms (half bridge) give Vs·GF·ε/2, and four (full bridge) give Vs·GF·ε. Stress follows from Hooke’s law, σ = E·ε. Load cells state their sensitivity in mV/V: the output at full load per volt of excitation.

Relative resistance change

ΔR/R = 2.05·400·10⁻⁶ = 0.00082

Bridge output

Vo = Vs·GF·ε/2 = 2.5·0.00082/2 = 1.025 mV

Answer

Vo = 1.025 mV
13.Digital logic: gates, K-maps & flip-flops

Answer: N = 5

Karnaugh maps: the cells are ordered in Gray code (00, 01, 11, 10), so neighbouring cells, including the ones across the edges, differ in exactly one variable. Group the 1s in rectangles of 1, 2, 4, 8 or 16 cells, as large as possible and as few as possible, until every 1 is covered. Each group is one product term: the variables that stay constant inside it. A group of 2ᵏ cells loses k variables. Don't-cares (X) may be used to make groups bigger but never have to be covered. Grouping the 0s instead gives the minimal POS form.

ABCD000111100001111010111312040507161120131151140819111110

Group the 1s

Every group is a rectangle of 2ᵏ cells; edge cells are neighbours of the cells on the opposite edge.

CD′
B′D
AC
A′B′
ABD′

Minimal SOP form

F = CD′ + B′D + AC + A′B′ + ABD′
N = 5

Answer

N = 5
14.Digital logic: gates, K-maps & flip-flops

Answer: L = 6

Karnaugh maps: the cells are ordered in Gray code (00, 01, 11, 10), so neighbouring cells, including the ones across the edges, differ in exactly one variable. Group the 1s in rectangles of 1, 2, 4, 8 or 16 cells, as large as possible and as few as possible, until every 1 is covered. Each group is one product term: the variables that stay constant inside it. A group of 2ᵏ cells loses k variables. Don't-cares (X) may be used to make groups bigger but never have to be covered. Grouping the 0s instead gives the minimal POS form.

Prime implicants

The largest groups that can be formed from 1s and Xs.

CD, B′C′D′, A′B′, AB
ABCD000111100001111010X1131204051706X12113115114X809111010

Minimal cover

F = CD + A′B′ + AB
L = 6

Answer

L = 6

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