Identify the converter (buck, boost or buck-boost) and the duty cycle D from the voltage ratio.
Use volt-second balance on the inductor: the average inductor voltage over a period is zero.
Find the inductor voltage while the switch is on, then ΔIL = VL·D/(L·f).
For the output ripple, find the charge that flows in and out of the capacitor; for the CCM boundary, set the average inductor current equal to ΔIL/2.
Wheatstone bridge & strain gauges
Divider voltages
Va = VsR2/(R1 + R2), Vb = VsR4/(R3 + R4)
Output
Vab = Va − Vb
Balance
R1/R2 = R3/R4
Slide-wire bridge
R/Rx = l/(100 − l)
Thévenin resistance
Rth = R1∥R2 + R3∥R4
Gauge factor
ΔR/R = GF·ε
Bridge output
quarter Vs·GF·ε/4, half Vs·GF·ε/2, full Vs·GF·ε
Small change, one arm
Vab ≈ Vs·ΔR/(4R)
Stress
σ = E·ε
Method
Treat the bridge as two voltage dividers across the same supply.
For balance, set R₁/R₂ = R₃/R₄ and solve for the unknown resistor.
For an unbalanced bridge, find Va and Vb from the dividers and subtract; use the Thévenin equivalent when a meter loads the output.
For strain gauges, convert strain to ΔR/R = GF·ε and use Vs·GF·ε/4, /2 or ×1 for a quarter, half or full bridge.
Digital logic: gates, K-maps & flip-flops
Basic gates
A·B, A + B, A′, (A·B)′, (A + B)′, A ⊕ B
Boolean rules
X + X′ = 1, X·X′ = 0, X + XY = X, XY + XY′ = X
De Morgan
(X·Y)′ = X′ + Y′, (X + Y)′ = X′·Y′
Karnaugh map order
00, 01, 11, 10 (Gray code)
Group of 2ᵏ cells
loses k variables
4-to-1 multiplexer
F = A′B′I0 + A′BI1 + AB′I2 + ABI3
Flip-flops
D: Q⁺ = D, T: Q⁺ = T ⊕ Q, JK: Q⁺ = JQ′ + K′Q
Counters
n-bit: 2ⁿ states; mod-N: smallest n with 2ⁿ ≥ N; fout = fclk/N
Ripple counter
fmax = 1/(n·tpd)
Ring and Johnson counters
n and 2n states
Method
For a circuit, work from the inputs to the output one gate at a time and write the value on every wire, or write its expression and fill in the truth table.
For simplification, put the 1s (and the don’t-cares as X) into a Karnaugh map with Gray-code rows and columns: 00, 01, 11, 10.
Cover the 1s with as few and as large groups of 1, 2, 4, 8 or 16 cells as possible, wrapping round the edges; each group is one product term made of the variables that stay constant. Group the 0s for the POS form.
For flip-flops and counters, read the inputs at each active clock edge, write the state after every edge, and remember that an n-bit counter wraps round after 2ⁿ states.
2Practice problems
1.Diodes & transistorsMedium
An NPN transistor with β = 150 has voltage-divider bias from VCC = 20 V: R₁ = 33 kΩ from VCC to the base and R₂ = 6.8 kΩ from the base to ground. The collector resistor is RC = 3.3 kΩ and the emitter resistor is RE = 680 Ω. Take VBE = 0.7 V and use the Thévenin equivalent of the divider (do not neglect the base current). Find the collector–emitter voltage VCE.
An NPN transistor with β = 100 switches a 150 Ω load resistor connected between VCC = 12 V and its collector. The emitter is grounded. The base is driven from a 3.3 V logic output through a base resistor RB = 220 kΩ. Take VBE = 0.7 V and VCE(sat) = 0.2 V. Find the collector current IC in mA when the input is high. Decide first whether the transistor is saturated.
Choose the feedback resistor Rf that gives this non-inverting amplifier a voltage gain of 15.
R1 = 10 kΩAv = 15
Rf = kΩ
4.Op-amp circuitsHard
Two ideal op-amp stages are connected in cascade: an inverting amplifier (R1, Rf1) followed by a non-inverting amplifier (R2 to ground, Rf2 in the feedback). Both run from ±15 V supplies. Find the overall voltage gain Av = Vout/Vin.
R1 = 4.7 kΩRf1 = 22 kΩR2 = 4.7 kΩRf2 = 4.7 kΩ
Av =
5.RC & RL transientsMedium
The inductor carries no current before the switch closes at t = 0. Find the energy W stored in the inductor at t = 1 ms, in mJ.
Vs = 24 VR = 33 ΩL = 10 mHt = 1 ms
W = mJ
6.RC & RL transientsHard
Just before the switch closes at t = 0, the capacitor holds 12 V with the polarity shown. How long does it take for vC to reach 11 V? Find t.
Vs = 10 VR = 3.3 kΩC = 100 µFvC(0) = 12 V
t = ms
7.Series & parallel resistorsMedium
Find the equivalent resistance Req seen by the source V1.
V1 = 30 VR1 = 2 ΩR2 = 10 ΩR3 = 12 ΩR4 = 15 Ω
Req = Ω
8.Series & parallel resistorsHard
Find the current IR1 delivered by the source, which flows through R1.
An ideal boost converter turns 48 V into 120 V at 250 kHz with L = 33 µH. Find the peak-to-peak inductor ripple current ΔIL.
Vin = 48 VVo = 120 Vf = 250 kHzL = 33 µH
ΔIL = A
10.DC-DC convertersHard
An ideal buck-boost converter turns 24 V into −16 V for a 2 Ω load at 500 kHz. The output capacitor is 100 µF. Find the peak-to-peak output voltage ripple ΔVo in mV.
Find the Thévenin resistance Rth of the bridge shown, seen from the output terminals a and b.
Vs = 3 VR1 = 120 ΩR2 = 120 ΩR3 = 20 ΩR4 = 50 Ω
Rth = Ω
12.Wheatstone bridge & strain gaugesHard
A load cell (a full bridge of strain gauges) has a rated output of 3 mV/V at its rated load of 100 kg. It is excited with 5 V. Find its output Vo under a load of 60 kg.
Use the Karnaugh map to find the minimal sum-of-products (SOP) form of F(A, B, C, D) = Σm(1, 5, 6, 11, 12, 14, 15). How many literals L does it contain in total (a primed variable counts as one literal)?
F(A, B, C, D) = Σm(1, 5, 6, 11, 12, 14, 15)
L =
14.Digital logic: gates, K-maps & flip-flopsHard
For F(A, B, C, D) = Σm(2, 6, 8, 10, 11, 13, 14) + d(0, 3), where d marks the don't-care conditions, find the number N of essential prime implicants.
BJT bias point: in the active region VBE = 0.7 V, IC = β·IB and IE = (β + 1)·IB. Find IB from the base loop with KVL, then IC, then VCE from the collector–emitter loop. A voltage divider at the base is replaced by its Thévenin equivalent VTH = VCC·R₂/(R₁ + R₂), RTH = R₁∥R₂; an emitter resistor appears (β + 1) times larger in the base loop.
Thévenin equivalent of the divider
VTH = 20·6.8/(33 + 6.8) = 3.417 V
RTH = 33·6.8/(33 + 6.8) = 5.638 kΩ
Base current
KVL around the base loop; the emitter current is (β + 1)·IB.
IB = (3.417 − 0.7)/(5.638 + 151·0.68) = 25.08 µA
Collector current
IC = 150·25.08 µA = 3.763 mA
IE = 151·25.08 µA = 3.788 mA
Collector–emitter voltage
VCE = 20 − 3.763·3.3 − 3.788·0.68 = 5.008 V
Answer
VCE = 5.008 V
2.Diodes & transistors
Answer: IC = 1.182 mA
BJT as a switch: to switch a load fully on, the transistor is driven into saturation, where VCE = VCE(sat) and the collector current is set by the load: IC(sat) = (VCC − VCE(sat))/RC. Saturation needs at least IB = IC(sat)/β. If the base current is smaller, the transistor stays active and IC = β·IB.
Base current
IB = (3.3 − 0.7)/220 kΩ = 11.82 µA
Saturated or active?
β·IB is smaller than IC(sat), so the transistor stays active.
β·IB = 1.182 mA
IC(sat) = (12 − 0.2)/150 = 78.67 mA
Collector current
IC = β·IB = 1.182 mA
Answer
IC = 1.182 mA
The transistor is active, so the load is not fully switched on.
3.Op-amp circuits
Answer: Rf = 140 kΩ
Ideal op-amp rules: with negative feedback, the op-amp drives its output so that its two inputs sit at the same voltage (V₋ = V₊), and no current flows into either input. Writing KCL at the inverting input with these two facts gives the output.
Gain of a non-inverting amplifier
V₋ = V₊ = Vin, and the current through R₁ also flows through Rf, so Vout = Vin·(1 + Rf/R₁).
Av = 1 + Rf/R1
Rf = (15 − 1)·10 = 140 kΩ
Answer
Rf = 140 kΩ
4.Op-amp circuits
Answer: Av = −9.362
Ideal op-amp rules: with negative feedback, the op-amp drives its output so that its two inputs sit at the same voltage (V₋ = V₊), and no current flows into either input. Writing KCL at the inverting input with these two facts gives the output.
Gain of each stage
A1 = −Rf1/R1 = −22/4.7 = −4.681
A2 = 1 + Rf2/R2 = 1 + 4.7/4.7 = 2
Overall gain
Av = A1·A2 = −4.681·2 = −9.362
Answer
Av = −9.362
5.RC & RL transients
Answer: W = 2.453 mJ
First-order transients: in a circuit with one capacitor or one inductor, every voltage and current moves exponentially from its initial value to its final value: x(t) = x(∞) + [x(0) − x(∞)]·e−t/τ, with τ = RC or τ = L/R. After about 5τ the circuit has settled.
Time constant and final current
Long after the switch closes the inductor behaves like a short circuit, so the final current is set by R alone.
τ = L/R = 10 mH / 33 Ω = 0.303 ms
i(∞) = Vs/R = 24/33 = 0.7273 A
Current at the given time
i(t) = 0.7273·(1 − e−1/0.303) = 0.7004 A
Stored energy
W = ½·L·i² = ½·10·0.7004² = 2.453 mJ
Answer
W = 2.453 mJ
6.RC & RL transients
Answer: t = 228.7 ms
First-order transients: in a circuit with one capacitor or one inductor, every voltage and current moves exponentially from its initial value to its final value: x(t) = x(∞) + [x(0) − x(∞)]·e−t/τ, with τ = RC or τ = L/R. After about 5τ the circuit has settled.
Initial value, final value, time constant
The capacitor voltage cannot jump, so it starts at its stored value and heads for the source voltage.
t = τ·ln((12 − 10)/(11 − 10)) = 330·ln(2) = 228.7 ms
Answer
t = 228.7 ms
7.Series & parallel resistors
Answer: Req = 9.297 Ω
Series and parallel resistors: in series the same current flows through each resistor and R = R₁ + R₂ + …. In parallel each resistor has the same voltage and 1/R = 1/R₁ + 1/R₂ + …. A ladder network is reduced one pair at a time until a single equivalent resistance remains.
Combine resistors from the far end
Start at the end farthest from the source and work back towards it. Resistors carrying the same current are in series; resistors across the same two nodes are in parallel.
R3 + R4 = 12 + 15 = 27 Ω
R2 ∥ 27 = 10·27/(10+27) = 7.297 Ω
Req = R1 + 7.297 = 2 + 7.297 = 9.297 Ω
Answer
Req = 9.297 Ω
8.Series & parallel resistors
Answer: IR1 = 2.48 A
Series and parallel resistors: in series the same current flows through each resistor and R = R₁ + R₂ + …. In parallel each resistor has the same voltage and 1/R = 1/R₁ + 1/R₂ + …. A ladder network is reduced one pair at a time until a single equivalent resistance remains.
Combine resistors from the far end
Start at the end farthest from the source and work back towards it. Resistors carrying the same current are in series; resistors across the same two nodes are in parallel.
R5 + R6 = 8 + 10 = 18 Ω
R4 ∥ 18 = 9.474 Ω
R3 + 9.474 = 13.47 Ω
R2 ∥ 13.47 = 7.098 Ω
Req = R1 + 7.098 = 5 + 7.098 = 12.1 Ω
Current from the source
The source sees only Req, so Ohm’s law gives the current it delivers. That current flows through R₁.
IR1 = V1/Req = 30/12.1 = 2.48 A
Answer
IR1 = 2.48 A
9.DC-DC converters
Answer: ΔIL = 3.491 A
DC-DC converters: a switch S turns on for the fraction D of each period T = 1/f. In steady state the average inductor voltage is zero (volt-second balance), which gives the ideal conversion ratios in continuous conduction: buck Vo = D·Vin, boost Vo = Vin/(1 − D), inverting buck-boost |Vo| = Vin·D/(1 − D). An ideal converter keeps the power: Vin·Iin = Vo·Io. While S is on the inductor current rises by ΔIL = VL·D·T/L, with VL = Vin − Vo for the buck and Vin for the boost and buck-boost. The output ripple is ΔVo = ΔIL/(8fC) for the buck and Io·D/(fC) for the boost and buck-boost. The inductor current just touches zero (the CCM boundary) when the average inductor current equals ΔIL/2.
Duty cycle
D = 1 − 48/120 = 0.6
Inductor voltage during the on-time
While S is on, the inductor sits directly across Vin.
VL = 48 V
Ripple current
ΔIL = VL·D/(L·f) = 48·0.6/(33·10⁻⁶·250·10³) = 3.491 A
Answer
ΔIL = 3.491 A
10.DC-DC converters
Answer: ΔVo = 64 mV
DC-DC converters: a switch S turns on for the fraction D of each period T = 1/f. In steady state the average inductor voltage is zero (volt-second balance), which gives the ideal conversion ratios in continuous conduction: buck Vo = D·Vin, boost Vo = Vin/(1 − D), inverting buck-boost |Vo| = Vin·D/(1 − D). An ideal converter keeps the power: Vin·Iin = Vo·Io. While S is on the inductor current rises by ΔIL = VL·D·T/L, with VL = Vin − Vo for the buck and Vin for the boost and buck-boost. The output ripple is ΔVo = ΔIL/(8fC) for the buck and Io·D/(fC) for the boost and buck-boost. The inductor current just touches zero (the CCM boundary) when the average inductor current equals ΔIL/2.
Duty cycle
D = 16/(24 + 16) = 0.4
Load current
Io = 16/2 = 8 A
Output ripple
ΔVo = 8·0.4/(500·10³·100·10⁻⁶) = 64 mV
Answer
ΔVo = 64 mV
11.Wheatstone bridge & strain gauges
Answer: Rth = 74.29 Ω
Wheatstone bridge: two voltage dividers share one supply Vs. The left divider R1–R2 gives Va = Vs·R2/(R1 + R2) and the right divider R3–R4 gives Vb = Vs·R4/(R3 + R4); the output is Vab = Va − Vb. The bridge is balanced (Vab = 0, no current in the meter) when R1/R2 = R3/R4, that is R1·R4 = R2·R3. Seen from the output, the bridge is a Thévenin source with Rth = R1∥R2 + R3∥R4.
Supply shorted
R₁∥R₂ = 120·120/240 = 60 Ω
R₃∥R₄ = 20·50/70 = 14.29 Ω
Thévenin resistance
Rth = 74.29 Ω
Answer
Rth = 74.29 Ω
12.Wheatstone bridge & strain gauges
Answer: Vo = 9 mV
Strain gauges: a gauge changes its resistance with strain: ΔR/R = GF·ε, where the gauge factor GF is about 2 for metal foil. In a bridge with all arms equal to R, one active gauge (quarter bridge) gives Vo ≈ Vs·GF·ε/4. Two active gauges with opposite strains in adjacent arms (half bridge) give Vs·GF·ε/2, and four (full bridge) give Vs·GF·ε. Stress follows from Hooke’s law, σ = E·ε. Load cells state their sensitivity in mV/V: the output at full load per volt of excitation.
Full-scale output
3·5 = 15 mV
Output at this load
Vo = 15·60/100 = 9 mV
Answer
Vo = 9 mV
13.Digital logic: gates, K-maps & flip-flops
Answer: L = 12
Karnaugh maps: the cells are ordered in Gray code (00, 01, 11, 10), so neighbouring cells, including the ones across the edges, differ in exactly one variable. Group the 1s in rectangles of 1, 2, 4, 8 or 16 cells, as large as possible and as few as possible, until every 1 is covered. Each group is one product term: the variables that stay constant inside it. A group of 2ᵏ cells loses k variables. Don't-cares (X) may be used to make groups bigger but never have to be covered. Grouping the 0s instead gives the minimal POS form.
Group the 1s
Every group is a rectangle of 2ᵏ cells; edge cells are neighbours of the cells on the opposite edge.
BCD′
A′C′D
ACD
ABD′
Minimal SOP form
F = BCD′ + A′C′D + ACD + ABD′
L = 12
Answer
L = 12
14.Digital logic: gates, K-maps & flip-flops
Answer: N = 4
Karnaugh maps: the cells are ordered in Gray code (00, 01, 11, 10), so neighbouring cells, including the ones across the edges, differ in exactly one variable. Group the 1s in rectangles of 1, 2, 4, 8 or 16 cells, as large as possible and as few as possible, until every 1 is covered. Each group is one product term: the variables that stay constant inside it. A group of 2ᵏ cells loses k variables. Don't-cares (X) may be used to make groups bigger but never have to be covered. Grouping the 0s instead gives the minimal POS form.
Prime implicants
The largest groups that can be formed from 1s and Xs.