Electronics 1: cram pack

Formula sheets, the key method steps for every topic and 14 practice problems, with full solutions at the back.

New problemsBack to the course

In the print window, choose “Save as PDF” to keep a copy on your device.

1Formulas and methods

Diodes & transistors

Diode (constant drop)
VD = 0.7 V when conducting
Active region
VBE = 0.7 V, IC = β·IB, IE = (β + 1)·IB
Fixed bias
IB = (VCC − 0.7)/RB
Divider bias
IB = (VTH − 0.7)/(RTH + (β + 1)RE)
Thévenin of the divider
VTH = VCC·R2/(R1 + R2), RTH = R1∥R2
Collector loop
VCE = VCC − ICRC − IERE
Saturation
IC(sat) = (VCC − VCE(sat))/RC, IB ≥ IC(sat)/β

Op-amp circuits

Inverting amplifier
Vout = −(Rf/Rin)·Vin
Non-inverting amplifier
Vout = (1 + Rf/R1)·Vin
Summing amplifier
Vout = −Rf(V1/R1 + V2/R2)
Ideal op-amp
V+ = V−, Iin = 0

RC & RL transients

Time constant
τ = RC | τ = L/R
Response
x(t) = x(∞) + [x(0) − x(∞)]·e−t/τ
Capacitor at DC
open circuit; vC cannot jump
Inductor at DC
short circuit; iL cannot jump
Settled
t ≈ 5τ

Method

  1. Find the initial value just after switching: a capacitor voltage and an inductor current cannot jump.
  2. Find the final value long after switching: a capacitor acts as an open circuit, an inductor as a short circuit.
  3. Find the time constant: τ = RC or τ = L/R, using the resistance seen by the capacitor or inductor.
  4. Use x(t) = x(∞) + [x(0) − x(∞)]·e−t/τ.

Series & parallel resistors

Resistors in series
Req = R1 + R2 + …
Resistors in parallel
1/Req = 1/R1 + 1/R2 + …
Two in parallel
Req = R1R2 / (R1 + R2)
Ohm's law
V = I·R
Power
P = V·I = I²R = V²/R

Method

  1. Start at the end of the network furthest from the terminals.
  2. Combine resistors in series by adding them, and resistors in parallel with 1/R = 1/R₁ + 1/R₂ + …
  3. Redraw the circuit after each step.
  4. Repeat until one resistor is left between the terminals.

DC-DC converters

Buck
Vo = D·Vin
Boost
Vo = Vin/(1 − D)
Inverting buck-boost
|Vo| = Vin·D/(1 − D)
Ideal power balance
VinIin = VoIo
Inductor ripple
ΔIL = VL,on·D/(L·f); buck Vin − Vo, boost and buck-boost Vin
Average inductor current
buck Io; boost and buck-boost Io/(1 − D)
Output ripple
buck ΔIL/(8fC); boost and buck-boost Io·D/(fC)
CCM boundary
buck (1 − D)R/(2f); boost D(1 − D)²R/(2f); buck-boost (1 − D)²R/(2f)

Method

  1. Identify the converter (buck, boost or buck-boost) and the duty cycle D from the voltage ratio.
  2. Use volt-second balance on the inductor: the average inductor voltage over a period is zero.
  3. Find the inductor voltage while the switch is on, then ΔIL = VL·D/(L·f).
  4. For the output ripple, find the charge that flows in and out of the capacitor; for the CCM boundary, set the average inductor current equal to ΔIL/2.

Wheatstone bridge & strain gauges

Divider voltages
Va = VsR2/(R1 + R2), Vb = VsR4/(R3 + R4)
Output
Vab = Va − Vb
Balance
R1/R2 = R3/R4
Slide-wire bridge
R/Rx = l/(100 − l)
Thévenin resistance
Rth = R1∥R2 + R3∥R4
Gauge factor
ΔR/R = GF·ε
Bridge output
quarter Vs·GF·ε/4, half Vs·GF·ε/2, full Vs·GF·ε
Small change, one arm
Vab ≈ Vs·ΔR/(4R)
Stress
σ = E·ε

Method

  1. Treat the bridge as two voltage dividers across the same supply.
  2. For balance, set R₁/R₂ = R₃/R₄ and solve for the unknown resistor.
  3. For an unbalanced bridge, find Va and Vb from the dividers and subtract; use the Thévenin equivalent when a meter loads the output.
  4. For strain gauges, convert strain to ΔR/R = GF·ε and use Vs·GF·ε/4, /2 or ×1 for a quarter, half or full bridge.

Digital logic: gates, K-maps & flip-flops

Basic gates
A·B, A + B, A′, (A·B)′, (A + B)′, A ⊕ B
Boolean rules
X + X′ = 1, X·X′ = 0, X + XY = X, XY + XY′ = X
De Morgan
(X·Y)′ = X′ + Y′, (X + Y)′ = X′·Y′
Karnaugh map order
00, 01, 11, 10 (Gray code)
Group of 2ᵏ cells
loses k variables
4-to-1 multiplexer
F = A′B′I0 + A′BI1 + AB′I2 + ABI3
Flip-flops
D: Q⁺ = D, T: Q⁺ = T ⊕ Q, JK: Q⁺ = JQ′ + K′Q
Counters
n-bit: 2ⁿ states; mod-N: smallest n with 2ⁿ ≥ N; fout = fclk/N
Ripple counter
fmax = 1/(n·tpd)
Ring and Johnson counters
n and 2n states

Method

  1. For a circuit, work from the inputs to the output one gate at a time and write the value on every wire, or write its expression and fill in the truth table.
  2. For simplification, put the 1s (and the don’t-cares as X) into a Karnaugh map with Gray-code rows and columns: 00, 01, 11, 10.
  3. Cover the 1s with as few and as large groups of 1, 2, 4, 8 or 16 cells as possible, wrapping round the edges; each group is one product term made of the variables that stay constant. Group the 0s for the POS form.
  4. For flip-flops and counters, read the inputs at each active clock edge, write the state after every edge, and remember that an n-bit counter wraps round after 2ⁿ states.

2Practice problems

1.Diodes & transistorsMedium
RC​ = 1 kΩβ = 100RE​ = 680 ΩVCC​ = 20 VR1​ = 47 kΩR2​ = 12 kΩ

An NPN transistor with β = 100 has voltage-divider bias from VCC = 20 V: R₁ = 47 kΩ from VCC to the base and R₂ = 12 kΩ from the base to ground. The collector resistor is RC = 1 kΩ and the emitter resistor is RE = 680 Ω. Take VBE = 0.7 V and use the Thévenin equivalent of the divider (do not neglect the base current). Find the collector–emitter voltage VCE.

VCC = 20 VR1 = 47 kΩR2 = 12 kΩRC = 1 kΩRE = 680 Ωβ = 100
VCE = V
2.Diodes & transistorsHard
+−≥ 9 VR = ?6.2 V≤ 40 mA

A 6.2 V Zener regulator must supply up to 40 mA to a load. The input can drop to 9 V, and the Zener needs at least 2 mA to regulate. Find the largest series resistance Rmax that keeps it regulating.

Vin,min = 9 VVZ = 6.2 VIL,max = 40 mAIZ,min = 2 mA
Rmax = Ω
3.Op-amp circuitsMedium
−+Vout​Rf​ = ?R1​ = 47 kΩVin​

Choose the feedback resistor Rf that gives this non-inverting amplifier a voltage gain of 5.

R1 = 47 kΩAv = 5
Rf = kΩ
4.Op-amp circuitsHard
Vin​V1​Vout​stage 1: invertingR1​ = 47 kΩRf1​ = 47 kΩstage 2: non-invertingR2​ = 22 kΩRf2​ = 47 kΩ

Two ideal op-amp stages are connected in cascade: an inverting amplifier (R1, Rf1) followed by a non-inverting amplifier (R2 to ground, Rf2 in the feedback). Both run from ±15 V supplies. Find the overall voltage gain Av = Vout/Vin.

R1 = 47 kΩRf1 = 47 kΩR2 = 22 kΩRf2 = 47 kΩ
Av =
5.RC & RL transientsMedium
+−Vs​6 Vt = 0R = 22 ΩL10 mHi(t)

The inductor carries no current before the switch closes at t = 0. Find the current i at t = 1 ms.

Vs = 6 VR = 22 ΩL = 10 mHt = 1 ms
i = A
6.RC & RL transientsHard
+−Vs​9 Vopens at t = 0R1​ = 6.8 kΩR2​ = 3.3 kΩC68 µF+−vC​

The switch has been closed for a long time, so the circuit is in steady state. At t = 0 the switch opens. Find the capacitor voltage vC at t = 75 ms.

Vs = 9 VR1 = 6.8 kΩR2 = 3.3 kΩC = 68 µFt = 75 ms
vC = V
7.Series & parallel resistorsMedium
R1​ = 8 ΩIR1​R3​ = 4 Ω+−V1​18 VR2​15 ΩAR4​12 ΩB

Find the current IR1 delivered by the source, which flows through R1.

V1 = 18 VR1 = 8 ΩR2 = 15 ΩR3 = 4 ΩR4 = 12 Ω
IR1 = A
8.Series & parallel resistorsHard
R1​ = 15 ΩR3​ = 10 ΩR5​ = 5 Ω+−V1​10 VR2​12 ΩIR2​AR4​6 ΩBR6​8 Ω

Find the current IR2 through R2.

V1 = 10 VR1 = 15 ΩR2 = 12 ΩR3 = 10 ΩR4 = 6 ΩR5 = 5 ΩR6 = 8 Ω
IR2 = A
9.DC-DC convertersMedium
tiL​Imax​ = ?Imin​Io​DTT2T

A buck converter turns 9 V into 4.5 V for a 2.5 Ω load. It switches at 20 kHz with L = 47 µH. Find the peak inductor current Imax.

Vin​ = 9 VVo​ = 4.5 Vf = 20 kHzL = 47 µHR = 2.5 Ω
Imax = A
10.DC-DC convertersHard
+−9 VLSC = 470 µFR = 2 Ω+−22.5 V

An ideal boost converter turns 9 V into 22.5 V for a 2 Ω load at 100 kHz. The output capacitor is 470 µF. Find the peak-to-peak output voltage ripple ΔVo in mV.

Vin​ = 9 VVo​ = 22.5 Vf = 100 kHzC = 470 µFR = 2 Ω
ΔVo = mV
11.Wheatstone bridge & strain gaugesMedium
+−2 VR1​ = 100 ΩR2​ = 1000 ΩR3​ = 100 ΩR4​ = 20 ΩabGRg​ = 500 Ω

A galvanometer with a resistance of 500 Ω is connected between a and b of the bridge shown (Vs = 2 V). Find the galvanometer current Ig from a to b, in µA.

Vs = 2 VR1 = 100 ΩR2 = 1000 ΩR3 = 100 ΩR4 = 20 ΩRg = 500 Ω
Ig = µA
12.Wheatstone bridge & strain gaugesHard
+−3 V120 Ω − ΔR120 Ω + ΔR120 Ω + ΔR120 Ω − ΔRab+−Vo​ = ?

A bridge with 120 Ω arms is excited with 3 V and has four active gauges, two in tension and two in compression (full bridge). The gauge factor is 2.12 and the strain is 1500 µε. Find the bridge output Vo in mV.

Vs = 3 VGF = 2.12ε = 1500 µε
Vo = mV
13.Digital logic: gates, K-maps & flip-flopsMedium
ABCD000111100001111000110302041507161120130150141809111010

Use the Karnaugh map to find the minimal sum-of-products (SOP) form of F(A, B, C, D) = Σm(1, 5, 6, 8, 11, 12). How many literals L does it contain in total (a primed variable counts as one literal)?

F(A, B, C, D) = Σm(1, 5, 6, 8, 11, 12)
L =
14.Digital logic: gates, K-maps & flip-flopsHard
ABCD0001111000011110000103X2041517X6112X130151141819011110

Find the minimal SOP form of F(A, B, C, D) = Σm(5, 7, 8, 9, 10, 12, 14) + d(2, 6, 13), where d marks the don't-care conditions. How many product terms N does it have?

F(A, B, C, D) = Σm(5, 7, 8, 9, 10, 12, 14) + d(2, 6, 13)
N =

3Solutions

1.Diodes & transistors

Answer: VCE = 12.74 V

BJT bias point: in the active region VBE = 0.7 V, IC = β·IB and IE = (β + 1)·IB. Find IB from the base loop with KVL, then IC, then VCE from the collector–emitter loop. A voltage divider at the base is replaced by its Thévenin equivalent VTH = VCC·R₂/(R₁ + R₂), RTH = R₁∥R₂; an emitter resistor appears (β + 1) times larger in the base loop.

Thévenin equivalent of the divider

VTH = 20·12/(47 + 12) = 4.068 V
RTH = 47·12/(47 + 12) = 9.559 kΩ

Base current

KVL around the base loop; the emitter current is (β + 1)·IB.

IB = (4.068 − 0.7)/(9.559 + 101·0.68) = 43.04 µA

Collector current

IC = 100·43.04 µA = 4.304 mA
IE = 101·43.04 µA = 4.348 mA

Collector–emitter voltage

VCE = 20 − 4.304·1 − 4.348·0.68 = 12.74 V

Answer

VCE = 12.74 V
2.Diodes & transistors

Answer: Rmax = 66.67 Ω

Zener regulator: a reverse-biased Zener diode holds its voltage VZ while its current stays above a minimum IZ,min. The series resistor R takes the difference between input and output: IR = (Vin − VZ)/R. That current splits between the load, IL = VZ/RL, and the Zener: IZ = IR − IL. Design for the worst cases: the lowest input with the largest load must still leave IZ,min, and the highest input with no load gives the largest Zener power PZ = VZ·IZ.

Worst-case current

IR = 40 + 2 = 42 mA

Largest resistance

Rmax = 2.8/0.042 = 66.67 Ω

Answer

Rmax = 66.67 Ω
3.Op-amp circuits

Answer: Rf = 188 kΩ

Ideal op-amp rules: with negative feedback, the op-amp drives its output so that its two inputs sit at the same voltage (V₋ = V₊), and no current flows into either input. Writing KCL at the inverting input with these two facts gives the output.

Gain of a non-inverting amplifier

V₋ = V₊ = Vin, and the current through R₁ also flows through Rf, so Vout = Vin·(1 + Rf/R₁).

Av = 1 + Rf/R1
Rf = (5 − 1)·47 = 188 kΩ

Answer

Rf = 188 kΩ
4.Op-amp circuits

Answer: Av = −3.136

Ideal op-amp rules: with negative feedback, the op-amp drives its output so that its two inputs sit at the same voltage (V₋ = V₊), and no current flows into either input. Writing KCL at the inverting input with these two facts gives the output.

Gain of each stage

A1 = −Rf1/R1 = −47/47 = −1
A2 = 1 + Rf2/R2 = 1 + 47/22 = 3.136

Overall gain

Av = A1·A2 = −1·3.136 = −3.136

Answer

Av = −3.136
5.RC & RL transients

Answer: i = 0.2425 A

First-order transients: in a circuit with one capacitor or one inductor, every voltage and current moves exponentially from its initial value to its final value: x(t) = x(∞) + [x(0) − x(∞)]·e−t/τ, with τ = RC or τ = L/R. After about 5τ the circuit has settled.

Time constant and final current

Long after the switch closes the inductor behaves like a short circuit, so the final current is set by R alone.

τ = L/R = 10 mH / 22 Ω = 0.4545 ms
i(∞) = Vs/R = 6/22 = 0.2727 A

Current at the given time

i(t) = i(∞)·(1 − e−t/τ) = 0.2727·(1 − e−1/0.4545) = 0.2425 A

Answer

i = 0.2425 A
6.RC & RL transients

Answer: vC = 2.105 V

First-order transients: in a circuit with one capacitor or one inductor, every voltage and current moves exponentially from its initial value to its final value: x(t) = x(∞) + [x(0) − x(∞)]·e−t/τ, with τ = RC or τ = L/R. After about 5τ the circuit has settled.

Initial capacitor voltage

In steady state the capacitor is an open circuit, so R₁ and R₂ form a voltage divider. The capacitor voltage cannot jump when the switch opens.

vC(0) = 9·3.3/(6.8 + 3.3) = 2.941 V

Time constant after the switch opens

τ = R2·C = 3.3·68 = 224.4 ms

Discharge

vC(t) = 2.941·e−75/224.4 = 2.105 V

Answer

vC = 2.105 V
7.Series & parallel resistors

Answer: IR1 = 1.143 A

Series and parallel resistors: in series the same current flows through each resistor and R = R₁ + R₂ + …. In parallel each resistor has the same voltage and 1/R = 1/R₁ + 1/R₂ + …. A ladder network is reduced one pair at a time until a single equivalent resistance remains.

R1​ = 8 ΩR3​ = 4 Ω+−V1​18 VR2​15 ΩAR4​12 ΩB

Combine resistors from the far end

Start at the end farthest from the source and work back towards it. Resistors carrying the same current are in series; resistors across the same two nodes are in parallel.

R3 + R4 = 4 + 12 = 16 Ω
R2 ∥ 16 = 15·16/(15+16) = 7.742 Ω
Req = R1 + 7.742 = 8 + 7.742 = 15.74 Ω

Current from the source

The source sees only Req, so Ohm’s law gives the current it delivers. That current flows through R₁.

IR1 = V1/Req = 18/15.74 = 1.143 A

Answer

IR1 = 1.143 A
8.Series & parallel resistors

Answer: IR2 = 0.2515 A

Series and parallel resistors: in series the same current flows through each resistor and R = R₁ + R₂ + …. In parallel each resistor has the same voltage and 1/R = 1/R₁ + 1/R₂ + …. A ladder network is reduced one pair at a time until a single equivalent resistance remains.

R1​ = 15 ΩR3​ = 10 ΩR5​ = 5 Ω+−V1​10 VR2​12 ΩAR4​6 ΩBR6​8 Ω

Combine resistors from the far end

Start at the end farthest from the source and work back towards it. Resistors carrying the same current are in series; resistors across the same two nodes are in parallel.

R5 + R6 = 5 + 8 = 13 Ω
R4 ∥ 13 = 4.105 Ω
R3 + 4.105 = 14.11 Ω
R2 ∥ 14.11 = 6.484 Ω
Req = R1 + 6.484 = 15 + 6.484 = 21.48 Ω

Current from the source

The source sees only Req, so Ohm’s law gives the current it delivers. That current flows through R₁.

IR1 = V1/Req = 10/21.48 = 0.4655 A

Current through R₂

Subtract the drop across R₁ to get the voltage at node A, which is the voltage across R₂.

VA = V1 − IR1·R1 = 10 − 0.4655·15 = 3.018 V
IR2 = VA/R2 = 3.018/12 = 0.2515 A

Answer

IR2 = 0.2515 A
9.DC-DC converters

Answer: Imax = 2.997 A

DC-DC converters: a switch S turns on for the fraction D of each period T = 1/f. In steady state the average inductor voltage is zero (volt-second balance), which gives the ideal conversion ratios in continuous conduction: buck Vo = D·Vin, boost Vo = Vin/(1 − D), inverting buck-boost |Vo| = Vin·D/(1 − D). An ideal converter keeps the power: Vin·Iin = Vo·Io. While S is on the inductor current rises by ΔIL = VL·D·T/L, with VL = Vin − Vo for the buck and Vin for the boost and buck-boost. The output ripple is ΔVo = ΔIL/(8fC) for the buck and Io·D/(fC) for the boost and buck-boost. The inductor current just touches zero (the CCM boundary) when the average inductor current equals ΔIL/2.

Duty cycle

D = 4.5/9 = 0.5

Average and ripple current

Io = 4.5/2.5 = 1.8 A
ΔIL = VL·D/(L·f) = 4.5·0.5/(47·10⁻⁶·20·10³) = 2.394 A

Peak current

Imax = 1.8 + 2.394/2 = 2.997 A

Answer

Imax = 2.997 A
10.DC-DC converters

Answer: ΔVo = 143.6 mV

DC-DC converters: a switch S turns on for the fraction D of each period T = 1/f. In steady state the average inductor voltage is zero (volt-second balance), which gives the ideal conversion ratios in continuous conduction: buck Vo = D·Vin, boost Vo = Vin/(1 − D), inverting buck-boost |Vo| = Vin·D/(1 − D). An ideal converter keeps the power: Vin·Iin = Vo·Io. While S is on the inductor current rises by ΔIL = VL·D·T/L, with VL = Vin − Vo for the buck and Vin for the boost and buck-boost. The output ripple is ΔVo = ΔIL/(8fC) for the buck and Io·D/(fC) for the boost and buck-boost. The inductor current just touches zero (the CCM boundary) when the average inductor current equals ΔIL/2.

Duty cycle

D = 1 − 9/22.5 = 0.6

Load current

Io = 22.5/2 = 11.25 A

Output ripple

ΔVo = 11.25·0.6/(100·10³·470·10⁻⁶) = 143.6 mV

Answer

ΔVo = 143.6 mV
11.Wheatstone bridge & strain gauges

Answer: Ig = 2444 µA

Wheatstone bridge: two voltage dividers share one supply Vs. The left divider R1–R2 gives Va = Vs·R2/(R1 + R2) and the right divider R3–R4 gives Vb = Vs·R4/(R3 + R4); the output is Vab = Va − Vb. The bridge is balanced (Vab = 0, no current in the meter) when R1/R2 = R3/R4, that is R1·R4 = R2·R3. Seen from the output, the bridge is a Thévenin source with Rth = R1∥R2 + R3∥R4.

Thévenin voltage

Vth = 2·(1000/1100 − 20/120) = 1.485 V

Thévenin resistance

Rth = R₁∥R₂ + R₃∥R₄ = 107.6 Ω

Galvanometer current

Ig = 1.485/(107.6 + 500) = 2444 µA

Answer

Ig = 2444 µA
12.Wheatstone bridge & strain gauges

Answer: Vo = 9.54 mV

Strain gauges: a gauge changes its resistance with strain: ΔR/R = GF·ε, where the gauge factor GF is about 2 for metal foil. In a bridge with all arms equal to R, one active gauge (quarter bridge) gives Vo ≈ Vs·GF·ε/4. Two active gauges with opposite strains in adjacent arms (half bridge) give Vs·GF·ε/2, and four (full bridge) give Vs·GF·ε. Stress follows from Hooke’s law, σ = E·ε. Load cells state their sensitivity in mV/V: the output at full load per volt of excitation.

Relative resistance change

ΔR/R = 2.12·1500·10⁻⁶ = 0.00318

Bridge output

Vo = Vs·GF·ε = 3·0.00318 = 9.54 mV

Answer

Vo = 9.54 mV
13.Digital logic: gates, K-maps & flip-flops

Answer: L = 14

Karnaugh maps: the cells are ordered in Gray code (00, 01, 11, 10), so neighbouring cells, including the ones across the edges, differ in exactly one variable. Group the 1s in rectangles of 1, 2, 4, 8 or 16 cells, as large as possible and as few as possible, until every 1 is covered. Each group is one product term: the variables that stay constant inside it. A group of 2ᵏ cells loses k variables. Don't-cares (X) may be used to make groups bigger but never have to be covered. Grouping the 0s instead gives the minimal POS form.

ABCD000111100001111000110302041507161120130150141809111010

Group the 1s

Every group is a rectangle of 2ᵏ cells; edge cells are neighbours of the cells on the opposite edge.

A′C′D
AC′D′
A′BCD′
AB′CD

Minimal SOP form

F = A′C′D + AC′D′ + A′BCD′ + AB′CD
L = 14

Answer

L = 14
14.Digital logic: gates, K-maps & flip-flops

Answer: N = 3

Karnaugh maps: the cells are ordered in Gray code (00, 01, 11, 10), so neighbouring cells, including the ones across the edges, differ in exactly one variable. Group the 1s in rectangles of 1, 2, 4, 8 or 16 cells, as large as possible and as few as possible, until every 1 is covered. Each group is one product term: the variables that stay constant inside it. A group of 2ᵏ cells loses k variables. Don't-cares (X) may be used to make groups bigger but never have to be covered. Grouping the 0s instead gives the minimal POS form.

Prime implicants

The largest groups that can be formed from 1s and Xs.

CD′, BC′D, AD′, AC′, A′BD, A′BC
ABCD0001111000011110000103X2041517X6112X130151141819011110

Minimal cover

F = CD′ + AC′ + A′BD
N = 3

Answer

N = 3

Another grouping of the same size exists; it has the same number of terms and literals.

ExamProblems · examproblems.com/courses/electronics-1