Electronics 1: cram pack

Formula sheets, the key method steps for every topic and 14 practice problems, with full solutions at the back.

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1Formulas and methods

Diodes & transistors

Diode (constant drop)
VD = 0.7 V when conducting
Active region
VBE = 0.7 V, IC = β·IB, IE = (β + 1)·IB
Fixed bias
IB = (VCC − 0.7)/RB
Divider bias
IB = (VTH − 0.7)/(RTH + (β + 1)RE)
Thévenin of the divider
VTH = VCC·R2/(R1 + R2), RTH = R1∥R2
Collector loop
VCE = VCC − ICRC − IERE
Saturation
IC(sat) = (VCC − VCE(sat))/RC, IB ≥ IC(sat)/β

Op-amp circuits

Inverting amplifier
Vout = −(Rf/Rin)·Vin
Non-inverting amplifier
Vout = (1 + Rf/R1)·Vin
Summing amplifier
Vout = −Rf(V1/R1 + V2/R2)
Ideal op-amp
V+ = V−, Iin = 0

RC & RL transients

Time constant
τ = RC | τ = L/R
Response
x(t) = x(∞) + [x(0) − x(∞)]·e−t/τ
Capacitor at DC
open circuit; vC cannot jump
Inductor at DC
short circuit; iL cannot jump
Settled
t ≈ 5τ

Method

  1. Find the initial value just after switching: a capacitor voltage and an inductor current cannot jump.
  2. Find the final value long after switching: a capacitor acts as an open circuit, an inductor as a short circuit.
  3. Find the time constant: τ = RC or τ = L/R, using the resistance seen by the capacitor or inductor.
  4. Use x(t) = x(∞) + [x(0) − x(∞)]·e−t/τ.

Series & parallel resistors

Resistors in series
Req = R1 + R2 + …
Resistors in parallel
1/Req = 1/R1 + 1/R2 + …
Two in parallel
Req = R1R2 / (R1 + R2)
Ohm's law
V = I·R
Power
P = V·I = I²R = V²/R

Method

  1. Start at the end of the network furthest from the terminals.
  2. Combine resistors in series by adding them, and resistors in parallel with 1/R = 1/R₁ + 1/R₂ + …
  3. Redraw the circuit after each step.
  4. Repeat until one resistor is left between the terminals.

DC-DC converters

Buck
Vo = D·Vin
Boost
Vo = Vin/(1 − D)
Inverting buck-boost
|Vo| = Vin·D/(1 − D)
Ideal power balance
VinIin = VoIo
Inductor ripple
ΔIL = VL,on·D/(L·f); buck Vin − Vo, boost and buck-boost Vin
Average inductor current
buck Io; boost and buck-boost Io/(1 − D)
Output ripple
buck ΔIL/(8fC); boost and buck-boost Io·D/(fC)
CCM boundary
buck (1 − D)R/(2f); boost D(1 − D)²R/(2f); buck-boost (1 − D)²R/(2f)

Method

  1. Identify the converter (buck, boost or buck-boost) and the duty cycle D from the voltage ratio.
  2. Use volt-second balance on the inductor: the average inductor voltage over a period is zero.
  3. Find the inductor voltage while the switch is on, then ΔIL = VL·D/(L·f).
  4. For the output ripple, find the charge that flows in and out of the capacitor; for the CCM boundary, set the average inductor current equal to ΔIL/2.

Wheatstone bridge & strain gauges

Divider voltages
Va = VsR2/(R1 + R2), Vb = VsR4/(R3 + R4)
Output
Vab = Va − Vb
Balance
R1/R2 = R3/R4
Slide-wire bridge
R/Rx = l/(100 − l)
Thévenin resistance
Rth = R1∥R2 + R3∥R4
Gauge factor
ΔR/R = GF·ε
Bridge output
quarter Vs·GF·ε/4, half Vs·GF·ε/2, full Vs·GF·ε
Small change, one arm
Vab ≈ Vs·ΔR/(4R)
Stress
σ = E·ε

Method

  1. Treat the bridge as two voltage dividers across the same supply.
  2. For balance, set R₁/R₂ = R₃/R₄ and solve for the unknown resistor.
  3. For an unbalanced bridge, find Va and Vb from the dividers and subtract; use the Thévenin equivalent when a meter loads the output.
  4. For strain gauges, convert strain to ΔR/R = GF·ε and use Vs·GF·ε/4, /2 or ×1 for a quarter, half or full bridge.

Digital logic: gates, K-maps & flip-flops

Basic gates
A·B, A + B, A′, (A·B)′, (A + B)′, A ⊕ B
Boolean rules
X + X′ = 1, X·X′ = 0, X + XY = X, XY + XY′ = X
De Morgan
(X·Y)′ = X′ + Y′, (X + Y)′ = X′·Y′
Karnaugh map order
00, 01, 11, 10 (Gray code)
Group of 2ᵏ cells
loses k variables
4-to-1 multiplexer
F = A′B′I0 + A′BI1 + AB′I2 + ABI3
Flip-flops
D: Q⁺ = D, T: Q⁺ = T ⊕ Q, JK: Q⁺ = JQ′ + K′Q
Counters
n-bit: 2ⁿ states; mod-N: smallest n with 2ⁿ ≥ N; fout = fclk/N
Ripple counter
fmax = 1/(n·tpd)
Ring and Johnson counters
n and 2n states

Method

  1. For a circuit, work from the inputs to the output one gate at a time and write the value on every wire, or write its expression and fill in the truth table.
  2. For simplification, put the 1s (and the don’t-cares as X) into a Karnaugh map with Gray-code rows and columns: 00, 01, 11, 10.
  3. Cover the 1s with as few and as large groups of 1, 2, 4, 8 or 16 cells as possible, wrapping round the edges; each group is one product term made of the variables that stay constant. Group the 0s for the POS form.
  4. For flip-flops and counters, read the inputs at each active clock edge, write the state after every edge, and remember that an n-bit counter wraps round after 2ⁿ states.

2Practice problems

1.Diodes & transistorsMedium
RC​ = 1 kΩβ = 120RE​ = 470 ΩVCC​ = 20 VR1​ = 56 kΩR2​ = 12 kΩ

An NPN transistor with β = 120 has voltage-divider bias from VCC = 20 V: R₁ = 56 kΩ from VCC to the base and R₂ = 12 kΩ from the base to ground. The collector resistor is RC = 1 kΩ and the emitter resistor is RE = 470 Ω. Take VBE = 0.7 V and use the Thévenin equivalent of the divider (do not neglect the base current). Find the collector–emitter voltage VCE.

VCC = 20 VR1 = 56 kΩR2 = 12 kΩRC = 1 kΩRE = 470 Ωβ = 120
VCE = V
2.Diodes & transistorsHard
+−≥ 15 VR = ?3.3 V≤ 50 mA

A 3.3 V Zener regulator must supply up to 50 mA to a load. The input can drop to 15 V, and the Zener needs at least 1 mA to regulate. Find the largest series resistance Rmax that keeps it regulating.

Vin,min = 15 VVZ = 3.3 VIL,max = 50 mAIZ,min = 1 mA
Rmax = Ω
3.Op-amp circuitsMedium
−+Vout​R2​ = 100 kΩV1​ = −0.7 VR1​ = 4.7 kΩV2​ = −0.9 VR3​ = 4.7 kΩR4​ = 100 kΩ

The difference amplifier uses an ideal op-amp with ±15 V supplies, with R3 = R1 and R4 = R2. Find the output voltage Vout.

V1 = −0.7 VV2 = −0.9 VR1 = R3 = 4.7 kΩR2 = R4 = 100 kΩ
Vout = V
4.Op-amp circuitsHard
−+Vout​R2​ = 10 kΩV1​ = −0.7 VR1​ = 10 kΩV2​ = 1 VR3​ = 10 kΩR4​ = 47 kΩ

The op-amp is ideal and runs from ±15 V supplies. The resistor ratios are not matched. Find the output voltage Vout.

V1 = −0.7 VV2 = 1 VR1 = 10 kΩR2 = 10 kΩR3 = 10 kΩR4 = 47 kΩ
Vout = V
5.RC & RL transientsMedium
+−Vs​9 Vt = 0R1​ = 4.7 kΩR2​ = 2.2 kΩC68 µF+−vC​

The source Vₛ charges the capacitor through R₁, and R₂ is connected in parallel with C. The capacitor is uncharged when the switch closes at t = 0. Find the capacitor voltage vC at t = 50 ms.

Vs = 9 VR1 = 4.7 kΩR2 = 2.2 kΩC = 68 µFt = 50 ms
vC = V
6.RC & RL transientsHard
+−Vs​10 Vt = 0R = 10 kΩC68 µF+−vC​vC​(0) = 30 V

Just before the switch closes at t = 0, the capacitor holds 30 V with the polarity shown. How long does it take for vC to reach 20 V? Find t.

Vs = 10 VR = 10 kΩC = 68 µFvC(0) = 30 V
t = ms
7.Series & parallel resistorsMedium
R1​ = 8 ΩIR1​R3​ = 2 Ω+−V1​9 VR2​6 ΩAR4​8 ΩB

Find the current IR1 delivered by the source, which flows through R1.

V1 = 9 VR1 = 8 ΩR2 = 6 ΩR3 = 2 ΩR4 = 8 Ω
IR1 = A
8.Series & parallel resistorsHard
R1​ = 25 ΩIR1​R3​ = 20 ΩR5​ = 3 Ω+−V1​15 VR2​25 ΩAR4​20 ΩBR6​25 Ω

Find the current IR1 delivered by the source, which flows through R1.

V1 = 15 VR1 = 25 ΩR2 = 25 ΩR3 = 20 ΩR4 = 20 ΩR5 = 3 ΩR6 = 25 Ω
IR1 = A
9.DC-DC convertersMedium
+−36 VSL = ?CR+−21.6 V

An ideal buck converter turns 36 V into 21.6 V at a switching frequency of 200 kHz. Find the inductance L that keeps the peak-to-peak inductor ripple current at 0.5 A.

Vin​ = 36 VVo​ = 21.6 Vf = 200 kHzΔIL = 0.5 A
L = µH
10.DC-DC convertersHard
+−48 VLSC = 22 µFR = 2 Ω+−160 V

An ideal boost converter turns 48 V into 160 V for a 2 Ω load at 25 kHz. The output capacitor is 22 µF. Find the peak-to-peak output voltage ripple ΔVo in mV.

Vin​ = 48 VVo​ = 160 Vf = 25 kHzC = 22 µFR = 2 Ω
ΔVo = mV
11.Wheatstone bridge & strain gaugesMedium
+−12 V350 Ω350 Ω + ΔR350 Ω350 Ωab+−Vab​ = ?

A bridge has four 350 Ω arms and Vs = 12 V. The sensor R₂ increases by ΔR = 0.7 Ω. Using the small-change approximation, find the output Vab in mV.

Vs = 12 VR = 350 ΩΔR = 0.7 Ω
Vab = mV
12.Wheatstone bridge & strain gaugesHard
+−2.5 V120 Ω120 Ω + ΔR120 Ω120 Ωab+−Vo​ = ?

A bridge with 120 Ω arms is excited with 2.5 V and has one active gauge (quarter bridge). The gauge factor is 2 and the strain is 750 µε. Find the bridge output Vo in mV.

Vs = 2.5 VGF = 2ε = 750 µε
Vo = mV
13.Digital logic: gates, K-maps & flip-flopsMedium
ABC000111100101324576

Simplify F = BC′ + A′BC′ + A′B′C′ to its minimal sum-of-products form. How many literals L does the simplified expression contain?

F = BC′ + A′BC′ + A′B′C′
L =
14.Digital logic: gates, K-maps & flip-flopsHard
TQ0​Q0​TQ1​Q1​TQ2​Q2​TQ3​Q3​CLKMOD-10

A synchronous decade (mod-10) counter counts 0, 1, …, 9 and then returns to 0. It starts at 3. Which count Q (in decimal) does it show after 29 clock pulses?

Q0 = 329N = 10
Q =

3Solutions

1.Diodes & transistors

Answer: VCE = 12.5 V

BJT bias point: in the active region VBE = 0.7 V, IC = β·IB and IE = (β + 1)·IB. Find IB from the base loop with KVL, then IC, then VCE from the collector–emitter loop. A voltage divider at the base is replaced by its Thévenin equivalent VTH = VCC·R₂/(R₁ + R₂), RTH = R₁∥R₂; an emitter resistor appears (β + 1) times larger in the base loop.

Thévenin equivalent of the divider

VTH = 20·12/(56 + 12) = 3.529 V
RTH = 56·12/(56 + 12) = 9.882 kΩ

Base current

KVL around the base loop; the emitter current is (β + 1)·IB.

IB = (3.529 − 0.7)/(9.882 + 121·0.47) = 42.39 µA

Collector current

IC = 120·42.39 µA = 5.086 mA
IE = 121·42.39 µA = 5.129 mA

Collector–emitter voltage

VCE = 20 − 5.086·1 − 5.129·0.47 = 12.5 V

Answer

VCE = 12.5 V
2.Diodes & transistors

Answer: Rmax = 229.4 Ω

Zener regulator: a reverse-biased Zener diode holds its voltage VZ while its current stays above a minimum IZ,min. The series resistor R takes the difference between input and output: IR = (Vin − VZ)/R. That current splits between the load, IL = VZ/RL, and the Zener: IZ = IR − IL. Design for the worst cases: the lowest input with the largest load must still leave IZ,min, and the highest input with no load gives the largest Zener power PZ = VZ·IZ.

Worst-case current

IR = 50 + 1 = 51 mA

Largest resistance

Rmax = 11.7/0.051 = 229.4 Ω

Answer

Rmax = 229.4 Ω
3.Op-amp circuits

Answer: Vout = −4.255 V

Ideal op-amp rules: with negative feedback, the op-amp drives its output so that its two inputs sit at the same voltage (V₋ = V₊), and no current flows into either input. Writing KCL at the inverting input with these two facts gives the output.

Voltage at the inputs

R₃ and R₄ carry the same current, so they form a voltage divider; feedback makes V₋ = V₊.

V₊ = V2·R4/(R3 + R4) = −0.9·100/(4.7 + 100) = −0.8596 V
V₋ = V₊

KCL at the inverting input

(−0.7 − −0.8596)/4.7 = (−0.8596 − Vout)/100
Vout = (R2/R1)·(V2 − V1) = (100/4.7)·(−0.9 − (−0.7)) = −4.255 V

Answer

Vout = −4.255 V
4.Op-amp circuits

Answer: Vout = 2.349 V

Ideal op-amp rules: with negative feedback, the op-amp drives its output so that its two inputs sit at the same voltage (V₋ = V₊), and no current flows into either input. Writing KCL at the inverting input with these two facts gives the output.

Voltage at the + input

V₊ = V2·R4/(R3 + R4) = 1·47/(10 + 47) = 0.8246 V

Superpose the two inputs

With V₂ = 0, V₁ sees an inverting amplifier. With V₁ = 0, V₊ is amplified by the non-inverting gain 1 + R₂/R₁.

Vout = −(10/10)·(−0.7) + (1 + 10/10)·0.8246 = 0.7 + 1.649 = 2.349 V

Answer

Vout = 2.349 V
5.RC & RL transients

Answer: vC = 1.113 V

First-order transients: in a circuit with one capacitor or one inductor, every voltage and current moves exponentially from its initial value to its final value: x(t) = x(∞) + [x(0) − x(∞)]·e−t/τ, with τ = RC or τ = L/R. After about 5τ the circuit has settled.

Thévenin equivalent seen by the capacitor

Short the source to find Rth; open the capacitor to find the voltage it will settle at.

Rth = R1 ∥ R2 = 4.7·2.2/(4.7 + 2.2) = 1.499 kΩ
vC(∞) = 9·2.2/(4.7 + 2.2) = 2.87 V

Time constant

τ = Rth·C = 1.499·68 = 101.9 ms

Charging curve

vC(t) = 2.87·(1 − e−50/101.9) = 1.113 V

Answer

vC = 1.113 V
6.RC & RL transients

Answer: t = 471.3 ms

First-order transients: in a circuit with one capacitor or one inductor, every voltage and current moves exponentially from its initial value to its final value: x(t) = x(∞) + [x(0) − x(∞)]·e−t/τ, with τ = RC or τ = L/R. After about 5τ the circuit has settled.

Initial value, final value, time constant

The capacitor voltage cannot jump, so it starts at its stored value and heads for the source voltage.

vC(0) = 30 V, vC(∞) = Vs = 10 V
τ = R·C = 10 kΩ · 68 µF = 680 ms
vC(t) = 10 + (30 − 10)·e−t/τ

Solve for the time

20 = 10 + (20)·e−t/τ → e−t/τ = (20 − 10)/(30 − 10) = 0.5
t = τ·ln((30 − 10)/(20 − 10)) = 680·ln(2) = 471.3 ms

Answer

t = 471.3 ms
7.Series & parallel resistors

Answer: IR1 = 0.766 A

Series and parallel resistors: in series the same current flows through each resistor and R = R₁ + R₂ + …. In parallel each resistor has the same voltage and 1/R = 1/R₁ + 1/R₂ + …. A ladder network is reduced one pair at a time until a single equivalent resistance remains.

R1​ = 8 ΩR3​ = 2 Ω+−V1​9 VR2​6 ΩAR4​8 ΩB

Combine resistors from the far end

Start at the end farthest from the source and work back towards it. Resistors carrying the same current are in series; resistors across the same two nodes are in parallel.

R3 + R4 = 2 + 8 = 10 Ω
R2 ∥ 10 = 6·10/(6+10) = 3.75 Ω
Req = R1 + 3.75 = 8 + 3.75 = 11.75 Ω

Current from the source

The source sees only Req, so Ohm’s law gives the current it delivers. That current flows through R₁.

IR1 = V1/Req = 9/11.75 = 0.766 A

Answer

IR1 = 0.766 A
8.Series & parallel resistors

Answer: IR1 = 0.3849 A

Series and parallel resistors: in series the same current flows through each resistor and R = R₁ + R₂ + …. In parallel each resistor has the same voltage and 1/R = 1/R₁ + 1/R₂ + …. A ladder network is reduced one pair at a time until a single equivalent resistance remains.

R1​ = 25 ΩR3​ = 20 ΩR5​ = 3 Ω+−V1​15 VR2​25 ΩAR4​20 ΩBR6​25 Ω

Combine resistors from the far end

Start at the end farthest from the source and work back towards it. Resistors carrying the same current are in series; resistors across the same two nodes are in parallel.

R5 + R6 = 3 + 25 = 28 Ω
R4 ∥ 28 = 11.67 Ω
R3 + 11.67 = 31.67 Ω
R2 ∥ 31.67 = 13.97 Ω
Req = R1 + 13.97 = 25 + 13.97 = 38.97 Ω

Current from the source

The source sees only Req, so Ohm’s law gives the current it delivers. That current flows through R₁.

IR1 = V1/Req = 15/38.97 = 0.3849 A

Answer

IR1 = 0.3849 A
9.DC-DC converters

Answer: L = 86.4 µH

DC-DC converters: a switch S turns on for the fraction D of each period T = 1/f. In steady state the average inductor voltage is zero (volt-second balance), which gives the ideal conversion ratios in continuous conduction: buck Vo = D·Vin, boost Vo = Vin/(1 − D), inverting buck-boost |Vo| = Vin·D/(1 − D). An ideal converter keeps the power: Vin·Iin = Vo·Io. While S is on the inductor current rises by ΔIL = VL·D·T/L, with VL = Vin − Vo for the buck and Vin for the boost and buck-boost. The output ripple is ΔVo = ΔIL/(8fC) for the buck and Io·D/(fC) for the boost and buck-boost. The inductor current just touches zero (the CCM boundary) when the average inductor current equals ΔIL/2.

Duty cycle

D = 21.6/36 = 0.6

Inductance

L = 14.4·0.6/(0.5·200·10³) = 86.4 µH

Answer

L = 86.4 µH
10.DC-DC converters

Answer: ΔVo = 101818 mV

DC-DC converters: a switch S turns on for the fraction D of each period T = 1/f. In steady state the average inductor voltage is zero (volt-second balance), which gives the ideal conversion ratios in continuous conduction: buck Vo = D·Vin, boost Vo = Vin/(1 − D), inverting buck-boost |Vo| = Vin·D/(1 − D). An ideal converter keeps the power: Vin·Iin = Vo·Io. While S is on the inductor current rises by ΔIL = VL·D·T/L, with VL = Vin − Vo for the buck and Vin for the boost and buck-boost. The output ripple is ΔVo = ΔIL/(8fC) for the buck and Io·D/(fC) for the boost and buck-boost. The inductor current just touches zero (the CCM boundary) when the average inductor current equals ΔIL/2.

Duty cycle

D = 1 − 48/160 = 0.7

Load current

Io = 160/2 = 80 A

Output ripple

ΔVo = 80·0.7/(25·10³·22·10⁻⁶) = 101818 mV

Answer

ΔVo = 101818 mV
11.Wheatstone bridge & strain gauges

Answer: Vab = 6 mV

Wheatstone bridge: two voltage dividers share one supply Vs. The left divider R1–R2 gives Va = Vs·R2/(R1 + R2) and the right divider R3–R4 gives Vb = Vs·R4/(R3 + R4); the output is Vab = Va − Vb. The bridge is balanced (Vab = 0, no current in the meter) when R1/R2 = R3/R4, that is R1·R4 = R2·R3. Seen from the output, the bridge is a Thévenin source with Rth = R1∥R2 + R3∥R4.

Relative change

ΔR/R = 0.7/350 = 0.002

Linearised output

Vab ≈ 12·0.002/4 = 6 mV

Answer

Vab = 6 mV

The exact value is 5.994 mV; the approximation is good while ΔR/R is small.

12.Wheatstone bridge & strain gauges

Answer: Vo = 0.9375 mV

Strain gauges: a gauge changes its resistance with strain: ΔR/R = GF·ε, where the gauge factor GF is about 2 for metal foil. In a bridge with all arms equal to R, one active gauge (quarter bridge) gives Vo ≈ Vs·GF·ε/4. Two active gauges with opposite strains in adjacent arms (half bridge) give Vs·GF·ε/2, and four (full bridge) give Vs·GF·ε. Stress follows from Hooke’s law, σ = E·ε. Load cells state their sensitivity in mV/V: the output at full load per volt of excitation.

Relative resistance change

ΔR/R = 2·750·10⁻⁶ = 0.0015

Bridge output

Vo ≈ Vs·GF·ε/4 = 2.5·0.0015/4 = 0.9375 mV

Answer

Vo = 0.9375 mV
13.Digital logic: gates, K-maps & flip-flops

Answer: L = 4

Boolean algebra: the rules that simplify expressions are X + X′ = 1 and X·X′ = 0, X + X = X, absorption X + X·Y = X, the combining rule X·Y + X·Y′ = X, X + X′Y = X + Y and the consensus theorem XY + X′Z + YZ = XY + X′Z. De Morgan's laws turn (X·Y)′ into X′ + Y′ and (X + Y)′ into X′·Y′. A Karnaugh map applies these rules graphically: every group of two neighbouring cells is one use of XY + XY′ = X.

Minterms of the expression

BC′ → m(2, 6)
A′BC′ → m(2)
A′B′C′ → m(0)
ABC00011110011001031204050716

Group and read off

F = BC′ + A′C′

Count the literals

L = 4

Answer

L = 4
14.Digital logic: gates, K-maps & flip-flops

Answer: Q = 2

Flip-flops and counters: a flip-flop changes only at the active clock edge. D copies its input (Q⁺ = D); T toggles when T = 1; JK holds for 00, resets for 01, sets for 10 and toggles for 11. An n-bit binary counter has 2ⁿ states and counts modulo 2ⁿ; a mod-N counter goes 0, 1, …, N − 1 and back to 0, and needs the smallest n with 2ⁿ ≥ N flip-flops. Each stage of a ripple counter halves the frequency, so the last output of a mod-N counter runs at fclk/N. A Johnson counter of n flip-flops has 2n states, a ring counter n.

Full cycles

Every 10 pulses bring the counter back to the same state.

29 = 2·10 + 9

Count after the remaining pulses

Q = (3 + 9) mod 10 = 2
Q = 0010₂

Answer

Q = 2

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