Electronics 1: cram pack

Formula sheets, the key method steps for every topic and 14 practice problems, with full solutions at the back.

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1Formulas and methods

Diodes & transistors

Diode (constant drop)
VD = 0.7 V when conducting
Active region
VBE = 0.7 V, IC = β·IB, IE = (β + 1)·IB
Fixed bias
IB = (VCC − 0.7)/RB
Divider bias
IB = (VTH − 0.7)/(RTH + (β + 1)RE)
Thévenin of the divider
VTH = VCC·R2/(R1 + R2), RTH = R1∥R2
Collector loop
VCE = VCC − ICRC − IERE
Saturation
IC(sat) = (VCC − VCE(sat))/RC, IB ≥ IC(sat)/β

Op-amp circuits

Inverting amplifier
Vout = −(Rf/Rin)·Vin
Non-inverting amplifier
Vout = (1 + Rf/R1)·Vin
Summing amplifier
Vout = −Rf(V1/R1 + V2/R2)
Ideal op-amp
V+ = V−, Iin = 0

RC & RL transients

Time constant
τ = RC | τ = L/R
Response
x(t) = x(∞) + [x(0) − x(∞)]·e−t/τ
Capacitor at DC
open circuit; vC cannot jump
Inductor at DC
short circuit; iL cannot jump
Settled
t ≈ 5τ

Method

  1. Find the initial value just after switching: a capacitor voltage and an inductor current cannot jump.
  2. Find the final value long after switching: a capacitor acts as an open circuit, an inductor as a short circuit.
  3. Find the time constant: τ = RC or τ = L/R, using the resistance seen by the capacitor or inductor.
  4. Use x(t) = x(∞) + [x(0) − x(∞)]·e−t/τ.

Series & parallel resistors

Resistors in series
Req = R1 + R2 + …
Resistors in parallel
1/Req = 1/R1 + 1/R2 + …
Two in parallel
Req = R1R2 / (R1 + R2)
Ohm's law
V = I·R
Power
P = V·I = I²R = V²/R

Method

  1. Start at the end of the network furthest from the terminals.
  2. Combine resistors in series by adding them, and resistors in parallel with 1/R = 1/R₁ + 1/R₂ + …
  3. Redraw the circuit after each step.
  4. Repeat until one resistor is left between the terminals.

DC-DC converters

Buck
Vo = D·Vin
Boost
Vo = Vin/(1 − D)
Inverting buck-boost
|Vo| = Vin·D/(1 − D)
Ideal power balance
VinIin = VoIo
Inductor ripple
ΔIL = VL,on·D/(L·f); buck Vin − Vo, boost and buck-boost Vin
Average inductor current
buck Io; boost and buck-boost Io/(1 − D)
Output ripple
buck ΔIL/(8fC); boost and buck-boost Io·D/(fC)
CCM boundary
buck (1 − D)R/(2f); boost D(1 − D)²R/(2f); buck-boost (1 − D)²R/(2f)

Method

  1. Identify the converter (buck, boost or buck-boost) and the duty cycle D from the voltage ratio.
  2. Use volt-second balance on the inductor: the average inductor voltage over a period is zero.
  3. Find the inductor voltage while the switch is on, then ΔIL = VL·D/(L·f).
  4. For the output ripple, find the charge that flows in and out of the capacitor; for the CCM boundary, set the average inductor current equal to ΔIL/2.

Wheatstone bridge & strain gauges

Divider voltages
Va = VsR2/(R1 + R2), Vb = VsR4/(R3 + R4)
Output
Vab = Va − Vb
Balance
R1/R2 = R3/R4
Slide-wire bridge
R/Rx = l/(100 − l)
Thévenin resistance
Rth = R1∥R2 + R3∥R4
Gauge factor
ΔR/R = GF·ε
Bridge output
quarter Vs·GF·ε/4, half Vs·GF·ε/2, full Vs·GF·ε
Small change, one arm
Vab ≈ Vs·ΔR/(4R)
Stress
σ = E·ε

Method

  1. Treat the bridge as two voltage dividers across the same supply.
  2. For balance, set R₁/R₂ = R₃/R₄ and solve for the unknown resistor.
  3. For an unbalanced bridge, find Va and Vb from the dividers and subtract; use the Thévenin equivalent when a meter loads the output.
  4. For strain gauges, convert strain to ΔR/R = GF·ε and use Vs·GF·ε/4, /2 or ×1 for a quarter, half or full bridge.

Digital logic: gates, K-maps & flip-flops

Basic gates
A·B, A + B, A′, (A·B)′, (A + B)′, A ⊕ B
Boolean rules
X + X′ = 1, X·X′ = 0, X + XY = X, XY + XY′ = X
De Morgan
(X·Y)′ = X′ + Y′, (X + Y)′ = X′·Y′
Karnaugh map order
00, 01, 11, 10 (Gray code)
Group of 2ᵏ cells
loses k variables
4-to-1 multiplexer
F = A′B′I0 + A′BI1 + AB′I2 + ABI3
Flip-flops
D: Q⁺ = D, T: Q⁺ = T ⊕ Q, JK: Q⁺ = JQ′ + K′Q
Counters
n-bit: 2ⁿ states; mod-N: smallest n with 2ⁿ ≥ N; fout = fclk/N
Ripple counter
fmax = 1/(n·tpd)
Ring and Johnson counters
n and 2n states

Method

  1. For a circuit, work from the inputs to the output one gate at a time and write the value on every wire, or write its expression and fill in the truth table.
  2. For simplification, put the 1s (and the don’t-cares as X) into a Karnaugh map with Gray-code rows and columns: 00, 01, 11, 10.
  3. Cover the 1s with as few and as large groups of 1, 2, 4, 8 or 16 cells as possible, wrapping round the edges; each group is one product term made of the variables that stay constant. Group the 0s for the POS form.
  4. For flip-flops and counters, read the inputs at each active clock edge, write the state after every edge, and remember that an n-bit counter wraps round after 2ⁿ states.

2Practice problems

1.Diodes & transistorsMedium
+−24 V330 Ω6.2 V680 ΩIZ​ = ?

A 6.2 V Zener regulator is fed from 24 V through 330 Ω and supplies a 680 Ω load. Find the Zener current IZ.

Vin = 24 VVZ = 6.2 VR = 330 ΩRL = 680 Ω
IZ = mA
2.Diodes & transistorsHard
RC​ = 680 Ωβ = 200IC​ = ?VCC​ = 12 V3.3 VRB​ = 1 kΩ

An NPN transistor with β = 200 switches a 680 Ω load resistor connected between VCC = 12 V and its collector. The emitter is grounded. The base is driven from a 3.3 V logic output through a base resistor RB = 1 kΩ. Take VBE = 0.7 V and VCE(sat) = 0.2 V. Find the collector current IC in mA when the input is high. Decide first whether the transistor is saturated.

VCC = 12 VRC = 680 Ωβ = 200Vin = 3.3 VVBE = 0.7 VVCE(sat) = 0.2 VRB = 1 kΩ
IC = mA
3.Op-amp circuitsMedium
−+Vout​Rf​ = ?R1​ = 22 kΩVin​

Choose the feedback resistor Rf that gives this non-inverting amplifier a voltage gain of 5.

R1 = 22 kΩAv = 5
Rf = kΩ
4.Op-amp circuitsHard
−+Vout​C = 4.7 µFVin​ = 2 VR = 22 kΩ

The integrator uses an ideal op-amp with ±15 V supplies; its output saturates at ±12 V. The capacitor is uncharged when a constant input Vin = 2 V is applied at t = 0. Find the output voltage Vout at t = 100 ms.

Vin = 2 VR = 22 kΩC = 4.7 µFVsat = ±12 Vt = 100 ms
Vout = V
5.RC & RL transientsMedium
+−Vs​9 Vt = 0R = 50 ΩL150 mHi(t)

The inductor carries no current before the switch closes at t = 0. Find the energy W stored in the inductor at t = 5 ms, in mJ.

Vs = 9 VR = 50 ΩL = 150 mHt = 5 ms
W = mJ
6.RC & RL transientsHard
+−Vs​5 Vt = 0R = 10 kΩC220 µF+−vC​vC​(0) = 8 V

Just before the switch closes at t = 0, the capacitor holds 8 V with the polarity shown. How long does it take for vC to reach 6.8 V? Find t.

Vs = 5 VR = 10 kΩC = 220 µFvC(0) = 8 V
t = ms
7.Series & parallel resistorsMedium
R1​ = 2 ΩR3​ = 10 Ω+−V1​12 VR2​5 ΩIR2​AR4​3 ΩB

Find the current IR2 through R2.

V1 = 12 VR1 = 2 ΩR2 = 5 ΩR3 = 10 ΩR4 = 3 Ω
IR2 = A
8.Series & parallel resistorsHard
R1​ = 12 ΩIR1​R3​ = 4 ΩR5​ = 12 Ω+−V1​10 VR2​20 ΩAR4​6 ΩBR6​10 Ω

Find the current IR1 delivered by the source, which flows through R1.

V1 = 10 VR1 = 12 ΩR2 = 20 ΩR3 = 4 ΩR4 = 6 ΩR5 = 12 ΩR6 = 10 Ω
IR1 = A
9.DC-DC convertersMedium
+−9 VSL = ?CR+−5.4 V

An ideal buck converter turns 9 V into 5.4 V at a switching frequency of 100 kHz. Find the inductance L that keeps the peak-to-peak inductor ripple current at 0.4 A.

Vin​ = 9 VVo​ = 5.4 Vf = 100 kHzΔIL = 0.4 A
L = µH
10.DC-DC convertersHard
tiL​Imax​IL​DTT2T

An ideal boost converter turns 15 V into 20 V for a 5 Ω load at 50 kHz. Find the smallest inductance Lcrit for continuous conduction.

Vin​ = 15 VVo​ = 20 Vf = 50 kHzR = 5 Ω
Lcrit = µH
11.Wheatstone bridge & strain gaugesMedium
+−5 VR1​ = 400 ΩR2​ = 10 ΩR3​ = 100 ΩR4​ = 200 ΩabGRg​ = 20 Ω

A galvanometer with a resistance of 20 Ω is connected between a and b of the bridge shown (Vs = 5 V). Find the galvanometer current Ig from a to b, in µA.

Vs = 5 VR1 = 400 ΩR2 = 10 ΩR3 = 100 ΩR4 = 200 ΩRg = 20 Ω
Ig = µA
12.Wheatstone bridge & strain gaugesHard
+−10 V120 Ω − ΔR120 Ω + ΔR120 Ω + ΔR120 Ω − ΔRab+−Vo​ = ?

A bridge with 120 Ω arms is excited with 10 V and has four active gauges, two in tension and two in compression (full bridge). The gauge factor is 2 and the strain is 1500 µε. Find the bridge output Vo in mV.

Vs = 10 VGF = 2ε = 1500 µε
Vo = mV
13.Digital logic: gates, K-maps & flip-flopsMedium
ABCD000111100001111000111312140507160120130150140809111010

Use the Karnaugh map to find the minimal product-of-sums (POS) form of F(A, B, C, D) = Σm(1, 2, 3, 4, 6, 11). How many sum terms (factors) N does it have?

F(A, B, C, D) = Σm(1, 2, 3, 4, 6, 11)
N =
14.Digital logic: gates, K-maps & flip-flopsHard
FFQ0​Q0​FFQ1​Q1​FFQ2​Q2​FFQ3​Q3​FFQ4​Q4​CLKMOD-20

A mod-20 counter is built from the minimum number of flip-flops. How many of the possible states U are never used?

N = 20
U =

3Solutions

1.Diodes & transistors

Answer: IZ = 44.82 mA

Zener regulator: a reverse-biased Zener diode holds its voltage VZ while its current stays above a minimum IZ,min. The series resistor R takes the difference between input and output: IR = (Vin − VZ)/R. That current splits between the load, IL = VZ/RL, and the Zener: IZ = IR − IL. Design for the worst cases: the lowest input with the largest load must still leave IZ,min, and the highest input with no load gives the largest Zener power PZ = VZ·IZ.

Resistor current

IR = 17.8/330 = 53.94 mA

Load current

IL = 6.2/680 = 9.118 mA

Zener current

IZ = 53.94 − 9.118 = 44.82 mA

Answer

IZ = 44.82 mA
2.Diodes & transistors

Answer: IC = 17.35 mA

BJT as a switch: to switch a load fully on, the transistor is driven into saturation, where VCE = VCE(sat) and the collector current is set by the load: IC(sat) = (VCC − VCE(sat))/RC. Saturation needs at least IB = IC(sat)/β. If the base current is smaller, the transistor stays active and IC = β·IB.

Base current

IB = (3.3 − 0.7)/1 kΩ = 2600 µA

Saturated or active?

β·IB is larger than IC(sat), so the transistor saturates.

β·IB = 520 mA
IC(sat) = (12 − 0.2)/680 = 17.35 mA

Collector current

IC = IC(sat) = 17.35 mA

Answer

IC = 17.35 mA

The transistor is saturated.

3.Op-amp circuits

Answer: Rf = 88 kΩ

Ideal op-amp rules: with negative feedback, the op-amp drives its output so that its two inputs sit at the same voltage (V₋ = V₊), and no current flows into either input. Writing KCL at the inverting input with these two facts gives the output.

Gain of a non-inverting amplifier

V₋ = V₊ = Vin, and the current through R₁ also flows through Rf, so Vout = Vin·(1 + Rf/R₁).

Av = 1 + Rf/R1
Rf = (5 − 1)·22 = 88 kΩ

Answer

Rf = 88 kΩ
4.Op-amp circuits

Answer: Vout = −1.934 V

Ideal op-amp rules: with negative feedback, the op-amp drives its output so that its two inputs sit at the same voltage (V₋ = V₊), and no current flows into either input. Writing KCL at the inverting input with these two facts gives the output.

Input current and ramp rate

kΩ times µF gives milliseconds.

RC = 22 kΩ · 4.7 µF = 103.4 ms
ramp rate = −Vin/(RC) = −2/103.4 = −0.01934 V/ms

Output at the given time

The ideal value lies inside ±Vsat, so the integrator has not clipped yet.

Vout = −Vin·t/(RC) = −2·100/103.4 = −1.934 V

Answer

Vout = −1.934 V
5.RC & RL transients

Answer: W = 1.599 mJ

First-order transients: in a circuit with one capacitor or one inductor, every voltage and current moves exponentially from its initial value to its final value: x(t) = x(∞) + [x(0) − x(∞)]·e−t/τ, with τ = RC or τ = L/R. After about 5τ the circuit has settled.

Time constant and final current

Long after the switch closes the inductor behaves like a short circuit, so the final current is set by R alone.

τ = L/R = 150 mH / 50 Ω = 3 ms
i(∞) = Vs/R = 9/50 = 0.18 A

Current at the given time

i(t) = 0.18·(1 − e−5/3) = 0.146 A

Stored energy

W = ½·L·i² = ½·150·0.146² = 1.599 mJ

Answer

W = 1.599 mJ
6.RC & RL transients

Answer: t = 1124 ms

First-order transients: in a circuit with one capacitor or one inductor, every voltage and current moves exponentially from its initial value to its final value: x(t) = x(∞) + [x(0) − x(∞)]·e−t/τ, with τ = RC or τ = L/R. After about 5τ the circuit has settled.

Initial value, final value, time constant

The capacitor voltage cannot jump, so it starts at its stored value and heads for the source voltage.

vC(0) = 8 V, vC(∞) = Vs = 5 V
τ = R·C = 10 kΩ · 220 µF = 2200 ms
vC(t) = 5 + (8 − 5)·e−t/τ

Solve for the time

6.8 = 5 + (3)·e−t/τ → e−t/τ = (6.8 − 5)/(8 − 5) = 0.6
t = τ·ln((8 − 5)/(6.8 − 5)) = 2200·ln(1.667) = 1124 ms

Answer

t = 1124 ms
7.Series & parallel resistors

Answer: IR2 = 1.545 A

Series and parallel resistors: in series the same current flows through each resistor and R = R₁ + R₂ + …. In parallel each resistor has the same voltage and 1/R = 1/R₁ + 1/R₂ + …. A ladder network is reduced one pair at a time until a single equivalent resistance remains.

R1​ = 2 ΩR3​ = 10 Ω+−V1​12 VR2​5 ΩAR4​3 ΩB

Combine resistors from the far end

Start at the end farthest from the source and work back towards it. Resistors carrying the same current are in series; resistors across the same two nodes are in parallel.

R3 + R4 = 10 + 3 = 13 Ω
R2 ∥ 13 = 5·13/(5+13) = 3.611 Ω
Req = R1 + 3.611 = 2 + 3.611 = 5.611 Ω

Current from the source

The source sees only Req, so Ohm’s law gives the current it delivers. That current flows through R₁.

IR1 = V1/Req = 12/5.611 = 2.139 A

Current through R₂

Subtract the drop across R₁ to get the voltage at node A, which is the voltage across R₂.

VA = V1 − IR1·R1 = 12 − 2.139·2 = 7.723 V
IR2 = VA/R2 = 7.723/5 = 1.545 A

Answer

IR2 = 1.545 A
8.Series & parallel resistors

Answer: IR1 = 0.5534 A

Series and parallel resistors: in series the same current flows through each resistor and R = R₁ + R₂ + …. In parallel each resistor has the same voltage and 1/R = 1/R₁ + 1/R₂ + …. A ladder network is reduced one pair at a time until a single equivalent resistance remains.

R1​ = 12 ΩR3​ = 4 ΩR5​ = 12 Ω+−V1​10 VR2​20 ΩAR4​6 ΩBR6​10 Ω

Combine resistors from the far end

Start at the end farthest from the source and work back towards it. Resistors carrying the same current are in series; resistors across the same two nodes are in parallel.

R5 + R6 = 12 + 10 = 22 Ω
R4 ∥ 22 = 4.714 Ω
R3 + 4.714 = 8.714 Ω
R2 ∥ 8.714 = 6.07 Ω
Req = R1 + 6.07 = 12 + 6.07 = 18.07 Ω

Current from the source

The source sees only Req, so Ohm’s law gives the current it delivers. That current flows through R₁.

IR1 = V1/Req = 10/18.07 = 0.5534 A

Answer

IR1 = 0.5534 A
9.DC-DC converters

Answer: L = 54 µH

DC-DC converters: a switch S turns on for the fraction D of each period T = 1/f. In steady state the average inductor voltage is zero (volt-second balance), which gives the ideal conversion ratios in continuous conduction: buck Vo = D·Vin, boost Vo = Vin/(1 − D), inverting buck-boost |Vo| = Vin·D/(1 − D). An ideal converter keeps the power: Vin·Iin = Vo·Io. While S is on the inductor current rises by ΔIL = VL·D·T/L, with VL = Vin − Vo for the buck and Vin for the boost and buck-boost. The output ripple is ΔVo = ΔIL/(8fC) for the buck and Io·D/(fC) for the boost and buck-boost. The inductor current just touches zero (the CCM boundary) when the average inductor current equals ΔIL/2.

Duty cycle

D = 5.4/9 = 0.6

Inductance

L = 3.6·0.6/(0.4·100·10³) = 54 µH

Answer

L = 54 µH
10.DC-DC converters

Answer: Lcrit = 7.031 µH

DC-DC converters: a switch S turns on for the fraction D of each period T = 1/f. In steady state the average inductor voltage is zero (volt-second balance), which gives the ideal conversion ratios in continuous conduction: buck Vo = D·Vin, boost Vo = Vin/(1 − D), inverting buck-boost |Vo| = Vin·D/(1 − D). An ideal converter keeps the power: Vin·Iin = Vo·Io. While S is on the inductor current rises by ΔIL = VL·D·T/L, with VL = Vin − Vo for the buck and Vin for the boost and buck-boost. The output ripple is ΔVo = ΔIL/(8fC) for the buck and Io·D/(fC) for the boost and buck-boost. The inductor current just touches zero (the CCM boundary) when the average inductor current equals ΔIL/2.

Duty cycle

D = 1 − 15/20 = 0.25

Boundary condition

Set the average inductor current equal to half the ripple current and solve for L.

Lcrit = D(1 − D)²·R/(2f)

Critical inductance

Lcrit = 0.25(1 − 0.25)²·5/(250·10³) = 7.031 µH

Answer

Lcrit = 7.031 µH
11.Wheatstone bridge & strain gauges

Answer: Ig = −33305 µA

Wheatstone bridge: two voltage dividers share one supply Vs. The left divider R1–R2 gives Va = Vs·R2/(R1 + R2) and the right divider R3–R4 gives Vb = Vs·R4/(R3 + R4); the output is Vab = Va − Vb. The bridge is balanced (Vab = 0, no current in the meter) when R1/R2 = R3/R4, that is R1·R4 = R2·R3. Seen from the output, the bridge is a Thévenin source with Rth = R1∥R2 + R3∥R4.

Thévenin voltage

Vth = 5·(10/410 − 200/300) = −3.211 V

Thévenin resistance

Rth = R₁∥R₂ + R₃∥R₄ = 76.42 Ω

Galvanometer current

Ig = −3.211/(76.42 + 20) = −33305 µA

Answer

Ig = −33305 µA
12.Wheatstone bridge & strain gauges

Answer: Vo = 30 mV

Strain gauges: a gauge changes its resistance with strain: ΔR/R = GF·ε, where the gauge factor GF is about 2 for metal foil. In a bridge with all arms equal to R, one active gauge (quarter bridge) gives Vo ≈ Vs·GF·ε/4. Two active gauges with opposite strains in adjacent arms (half bridge) give Vs·GF·ε/2, and four (full bridge) give Vs·GF·ε. Stress follows from Hooke’s law, σ = E·ε. Load cells state their sensitivity in mV/V: the output at full load per volt of excitation.

Relative resistance change

ΔR/R = 2·1500·10⁻⁶ = 0.003

Bridge output

Vo = Vs·GF·ε = 10·0.003 = 30 mV

Answer

Vo = 30 mV
13.Digital logic: gates, K-maps & flip-flops

Answer: N = 4

Karnaugh maps: the cells are ordered in Gray code (00, 01, 11, 10), so neighbouring cells, including the ones across the edges, differ in exactly one variable. Group the 1s in rectangles of 1, 2, 4, 8 or 16 cells, as large as possible and as few as possible, until every 1 is covered. Each group is one product term: the variables that stay constant inside it. A group of 2ᵏ cells loses k variables. Don't-cares (X) may be used to make groups bigger but never have to be covered. Grouping the 0s instead gives the minimal POS form.

ABCD000111100001111000111312140507160120130150140809111010

Group the 0s

Every group is a rectangle of 2ᵏ cells; edge cells are neighbours of the cells on the opposite edge.

(B′ + D′)
(B + C + D)
(A′ + D)
(A′ + C)

Minimal POS form

F = (B′ + D′)(B + C + D)(A′ + D)(A′ + C)
N = 4

Answer

N = 4
14.Digital logic: gates, K-maps & flip-flops

Answer: U = 12

Flip-flops and counters: a flip-flop changes only at the active clock edge. D copies its input (Q⁺ = D); T toggles when T = 1; JK holds for 00, resets for 01, sets for 10 and toggles for 11. An n-bit binary counter has 2ⁿ states and counts modulo 2ⁿ; a mod-N counter goes 0, 1, …, N − 1 and back to 0, and needs the smallest n with 2ⁿ ≥ N flip-flops. Each stage of a ripple counter halves the frequency, so the last output of a mod-N counter runs at fclk/N. A Johnson counter of n flip-flops has 2n states, a ring counter n.

Number of flip-flops

2ⁿ ≥ 20 → n = 5 (2⁵ = 32)

Unused states

U = 32 − 20 = 12

Answer

U = 12

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