Identify the converter (buck, boost or buck-boost) and the duty cycle D from the voltage ratio.
Use volt-second balance on the inductor: the average inductor voltage over a period is zero.
Find the inductor voltage while the switch is on, then ΔIL = VL·D/(L·f).
For the output ripple, find the charge that flows in and out of the capacitor; for the CCM boundary, set the average inductor current equal to ΔIL/2.
Wheatstone bridge & strain gauges
Divider voltages
Va = VsR2/(R1 + R2), Vb = VsR4/(R3 + R4)
Output
Vab = Va − Vb
Balance
R1/R2 = R3/R4
Slide-wire bridge
R/Rx = l/(100 − l)
Thévenin resistance
Rth = R1∥R2 + R3∥R4
Gauge factor
ΔR/R = GF·ε
Bridge output
quarter Vs·GF·ε/4, half Vs·GF·ε/2, full Vs·GF·ε
Small change, one arm
Vab ≈ Vs·ΔR/(4R)
Stress
σ = E·ε
Method
Treat the bridge as two voltage dividers across the same supply.
For balance, set R₁/R₂ = R₃/R₄ and solve for the unknown resistor.
For an unbalanced bridge, find Va and Vb from the dividers and subtract; use the Thévenin equivalent when a meter loads the output.
For strain gauges, convert strain to ΔR/R = GF·ε and use Vs·GF·ε/4, /2 or ×1 for a quarter, half or full bridge.
Digital logic: gates, K-maps & flip-flops
Basic gates
A·B, A + B, A′, (A·B)′, (A + B)′, A ⊕ B
Boolean rules
X + X′ = 1, X·X′ = 0, X + XY = X, XY + XY′ = X
De Morgan
(X·Y)′ = X′ + Y′, (X + Y)′ = X′·Y′
Karnaugh map order
00, 01, 11, 10 (Gray code)
Group of 2ᵏ cells
loses k variables
4-to-1 multiplexer
F = A′B′I0 + A′BI1 + AB′I2 + ABI3
Flip-flops
D: Q⁺ = D, T: Q⁺ = T ⊕ Q, JK: Q⁺ = JQ′ + K′Q
Counters
n-bit: 2ⁿ states; mod-N: smallest n with 2ⁿ ≥ N; fout = fclk/N
Ripple counter
fmax = 1/(n·tpd)
Ring and Johnson counters
n and 2n states
Method
For a circuit, work from the inputs to the output one gate at a time and write the value on every wire, or write its expression and fill in the truth table.
For simplification, put the 1s (and the don’t-cares as X) into a Karnaugh map with Gray-code rows and columns: 00, 01, 11, 10.
Cover the 1s with as few and as large groups of 1, 2, 4, 8 or 16 cells as possible, wrapping round the edges; each group is one product term made of the variables that stay constant. Group the 0s for the POS form.
For flip-flops and counters, read the inputs at each active clock edge, write the state after every edge, and remember that an n-bit counter wraps round after 2ⁿ states.
2Practice problems
1.Diodes & transistorsMedium
An NPN transistor with β = 75 is biased by a base resistor RB = 220 kΩ from the supply VCC = 10 V. The collector resistor is RC = 1.2 kΩ and the emitter is grounded. Take VBE = 0.7 V and assume the transistor is in the active region. Find the collector current IC in mA.
VCC = 10 VRB = 220 kΩRC = 1.2 kΩβ = 75VBE = 0.7 V
IC = mA
2.Diodes & transistorsHard
An NPN transistor with β = 80 switches a 100 Ω load resistor connected between VCC = 9 V and its collector. The emitter is grounded. The base is driven from a 3.3 V logic output through a base resistor RB = 10 kΩ. Take VBE = 0.7 V and VCE(sat) = 0.2 V. Find the collector current IC in mA when the input is high. Decide first whether the transistor is saturated.
The inductor carries a steady current of 2 A. At t = 0 the switch closes the loop through R and the source is removed, so the inductor current decays through R. Find the voltage vR across R at t = 15 ms.
i(0) = 2 AR = 15 ΩL = 150 mHt = 15 ms
vR = V
6.RC & RL transientsHard
The switch has been closed for a long time, so the circuit is in steady state. At t = 0 the switch opens. Find the current i2 through R2 at t = 15 ms.
Vs = 10 VR1 = 2.2 kΩR2 = 1 kΩC = 10 µFt = 15 ms
i2 = mA
7.Series & parallel resistorsMedium
Find the equivalent resistance Req seen by the source V1.
V1 = 15 VR1 = 12 ΩR2 = 10 ΩR3 = 3 ΩR4 = 12 Ω
Req = Ω
8.Series & parallel resistorsHard
Find the current IR1 delivered by the source, which flows through R1.
An ideal boost converter turns 12 V into 20 V at 50 kHz with L = 220 µH. Find the peak-to-peak inductor ripple current ΔIL.
Vin = 12 VVo = 20 Vf = 50 kHzL = 220 µH
ΔIL = A
10.DC-DC convertersHard
A buck converter turns 48 V into 12 V for a 25 Ω load at 100 kHz, with L = 220 µH and C = 22 µF. Find the peak-to-peak output voltage ripple ΔVo in mV.
A bridge has four 250 Ω arms and Vs = 9 V. The sensor R₂ increases by ΔR = 1.25 Ω. Using the small-change approximation, find the output Vab in mV.
Vs = 9 VR = 250 ΩΔR = 1.25 Ω
Vab = mV
12.Wheatstone bridge & strain gaugesHard
A quarter bridge (one active gauge, GF = 2) is excited with 5 V. The largest strain to be measured is 200 µε, and it must give 3.3 V at the input of an analogue-to-digital converter. Find the amplifier gain G.
Simplify F = A′B′C′ + A′BC′ + AB + A′B′ to its minimal sum-of-products form. How many literals L does the simplified expression contain?
F = A′B′C′ + A′BC′ + AB + A′B′
L =
14.Digital logic: gates, K-maps & flip-flopsHard
Find the minimal SOP form of F(A, B, C, D) = Σm(0, 1, 3, 10, 11, 14, 15) + d(9, 12), where d marks the don't-care conditions. How many product terms N does it have?
BJT bias point: in the active region VBE = 0.7 V, IC = β·IB and IE = (β + 1)·IB. Find IB from the base loop with KVL, then IC, then VCE from the collector–emitter loop. A voltage divider at the base is replaced by its Thévenin equivalent VTH = VCC·R₂/(R₁ + R₂), RTH = R₁∥R₂; an emitter resistor appears (β + 1) times larger in the base loop.
Check: VCE = 6.195 V is well above 0.2 V, so the transistor is indeed active.
2.Diodes & transistors
Answer: IC = 20.8 mA
BJT as a switch: to switch a load fully on, the transistor is driven into saturation, where VCE = VCE(sat) and the collector current is set by the load: IC(sat) = (VCC − VCE(sat))/RC. Saturation needs at least IB = IC(sat)/β. If the base current is smaller, the transistor stays active and IC = β·IB.
Base current
IB = (3.3 − 0.7)/10 kΩ = 260 µA
Saturated or active?
β·IB is smaller than IC(sat), so the transistor stays active.
β·IB = 20.8 mA
IC(sat) = (9 − 0.2)/100 = 88 mA
Collector current
IC = β·IB = 20.8 mA
Answer
IC = 20.8 mA
The transistor is active, so the load is not fully switched on.
3.Op-amp circuits
Answer: Vout = −0.2727 V
Ideal op-amp rules: with negative feedback, the op-amp drives its output so that its two inputs sit at the same voltage (V₋ = V₊), and no current flows into either input. Writing KCL at the inverting input with these two facts gives the output.
Voltage at the inputs
R₃ and R₄ carry the same current, so they form a voltage divider; feedback makes V₋ = V₊.
Ideal op-amp rules: with negative feedback, the op-amp drives its output so that its two inputs sit at the same voltage (V₋ = V₊), and no current flows into either input. Writing KCL at the inverting input with these two facts gives the output.
Input currents
V₋ = 0, so each input resistor has its full input voltage across it.
I1 = V1/R1 = 0.6/4.7 = 0.1277 mA
I2 = V2/R2 = −0.5/22 = −0.02273 mA
If = I1 + I2 = 0.1049 mA
Output voltage
Vout = −Rf·If = −4.7·0.1049 = −0.4932 V
Answer
Vout = −0.4932 V
5.RC & RL transients
Answer: vR = 6.694 V
First-order transients: in a circuit with one capacitor or one inductor, every voltage and current moves exponentially from its initial value to its final value: x(t) = x(∞) + [x(0) − x(∞)]·e−t/τ, with τ = RC or τ = L/R. After about 5τ the circuit has settled.
Time constant
τ = L/R = 150 mH / 15 Ω = 10 ms
Decay of the current
i(t) = 2·e−15/10 = 0.4463 A
vR = R·i = 15·0.4463 = 6.694 V
Answer
vR = 6.694 V
6.RC & RL transients
Answer: i2 = 0.6973 mA
First-order transients: in a circuit with one capacitor or one inductor, every voltage and current moves exponentially from its initial value to its final value: x(t) = x(∞) + [x(0) − x(∞)]·e−t/τ, with τ = RC or τ = L/R. After about 5τ the circuit has settled.
Initial capacitor voltage
In steady state the capacitor is an open circuit, so R₁ and R₂ form a voltage divider. The capacitor voltage cannot jump when the switch opens.
vC(0) = 10·1/(2.2 + 1) = 3.125 V
Time constant after the switch opens
τ = R2·C = 1·10 = 10 ms
Discharge
vC(t) = 3.125·e−15/10 = 0.6973 V
i2 = vC/R2 = 0.6973/1 = 0.6973 mA
Answer
i2 = 0.6973 mA
7.Series & parallel resistors
Answer: Req = 18 Ω
Series and parallel resistors: in series the same current flows through each resistor and R = R₁ + R₂ + …. In parallel each resistor has the same voltage and 1/R = 1/R₁ + 1/R₂ + …. A ladder network is reduced one pair at a time until a single equivalent resistance remains.
Combine resistors from the far end
Start at the end farthest from the source and work back towards it. Resistors carrying the same current are in series; resistors across the same two nodes are in parallel.
R3 + R4 = 3 + 12 = 15 Ω
R2 ∥ 15 = 10·15/(10+15) = 6 Ω
Req = R1 + 6 = 12 + 6 = 18 Ω
Answer
Req = 18 Ω
8.Series & parallel resistors
Answer: IR1 = 1.268 A
Series and parallel resistors: in series the same current flows through each resistor and R = R₁ + R₂ + …. In parallel each resistor has the same voltage and 1/R = 1/R₁ + 1/R₂ + …. A ladder network is reduced one pair at a time until a single equivalent resistance remains.
Combine resistors from the far end
Start at the end farthest from the source and work back towards it. Resistors carrying the same current are in series; resistors across the same two nodes are in parallel.
R5 + R6 = 6 + 25 = 31 Ω
R4 ∥ 31 = 6.359 Ω
R3 + 6.359 = 9.359 Ω
R2 ∥ 9.359 = 3.656 Ω
Req = R1 + 3.656 = 20 + 3.656 = 23.66 Ω
Current from the source
The source sees only Req, so Ohm’s law gives the current it delivers. That current flows through R₁.
IR1 = V1/Req = 30/23.66 = 1.268 A
Answer
IR1 = 1.268 A
9.DC-DC converters
Answer: ΔIL = 0.4364 A
DC-DC converters: a switch S turns on for the fraction D of each period T = 1/f. In steady state the average inductor voltage is zero (volt-second balance), which gives the ideal conversion ratios in continuous conduction: buck Vo = D·Vin, boost Vo = Vin/(1 − D), inverting buck-boost |Vo| = Vin·D/(1 − D). An ideal converter keeps the power: Vin·Iin = Vo·Io. While S is on the inductor current rises by ΔIL = VL·D·T/L, with VL = Vin − Vo for the buck and Vin for the boost and buck-boost. The output ripple is ΔVo = ΔIL/(8fC) for the buck and Io·D/(fC) for the boost and buck-boost. The inductor current just touches zero (the CCM boundary) when the average inductor current equals ΔIL/2.
Duty cycle
D = 1 − 12/20 = 0.4
Inductor voltage during the on-time
While S is on, the inductor sits directly across Vin.
VL = 12 V
Ripple current
ΔIL = VL·D/(L·f) = 12·0.4/(220·10⁻⁶·50·10³) = 0.4364 A
Answer
ΔIL = 0.4364 A
10.DC-DC converters
Answer: ΔVo = 23.24 mV
DC-DC converters: a switch S turns on for the fraction D of each period T = 1/f. In steady state the average inductor voltage is zero (volt-second balance), which gives the ideal conversion ratios in continuous conduction: buck Vo = D·Vin, boost Vo = Vin/(1 − D), inverting buck-boost |Vo| = Vin·D/(1 − D). An ideal converter keeps the power: Vin·Iin = Vo·Io. While S is on the inductor current rises by ΔIL = VL·D·T/L, with VL = Vin − Vo for the buck and Vin for the boost and buck-boost. The output ripple is ΔVo = ΔIL/(8fC) for the buck and Io·D/(fC) for the boost and buck-boost. The inductor current just touches zero (the CCM boundary) when the average inductor current equals ΔIL/2.
Duty cycle
D = 12/48 = 0.25
Inductor ripple current
ΔIL = (48 − 12)·0.25/(220·10⁻⁶·100·10³) = 0.4091 A
Output ripple
ΔVo = 0.4091/(8·100·10³·22·10⁻⁶) = 23.24 mV
Answer
ΔVo = 23.24 mV
11.Wheatstone bridge & strain gauges
Answer: Vab = 11.25 mV
Wheatstone bridge: two voltage dividers share one supply Vs. The left divider R1–R2 gives Va = Vs·R2/(R1 + R2) and the right divider R3–R4 gives Vb = Vs·R4/(R3 + R4); the output is Vab = Va − Vb. The bridge is balanced (Vab = 0, no current in the meter) when R1/R2 = R3/R4, that is R1·R4 = R2·R3. Seen from the output, the bridge is a Thévenin source with Rth = R1∥R2 + R3∥R4.
Relative change
ΔR/R = 1.25/250 = 0.005
Linearised output
Vab ≈ 9·0.005/4 = 11.25 mV
Answer
Vab = 11.25 mV
The exact value is 11.22 mV; the approximation is good while ΔR/R is small.
12.Wheatstone bridge & strain gauges
Answer: G = 6600
Strain gauges: a gauge changes its resistance with strain: ΔR/R = GF·ε, where the gauge factor GF is about 2 for metal foil. In a bridge with all arms equal to R, one active gauge (quarter bridge) gives Vo ≈ Vs·GF·ε/4. Two active gauges with opposite strains in adjacent arms (half bridge) give Vs·GF·ε/2, and four (full bridge) give Vs·GF·ε. Stress follows from Hooke’s law, σ = E·ε. Load cells state their sensitivity in mV/V: the output at full load per volt of excitation.
Bridge output at full scale
Vo = 0.5 mV
Gain
G = 3.3/0.0005 = 6600
Answer
G = 6600
13.Digital logic: gates, K-maps & flip-flops
Answer: L = 6
Boolean algebra: the rules that simplify expressions are X + X′ = 1 and X·X′ = 0, X + X = X, absorption X + X·Y = X, the combining rule X·Y + X·Y′ = X, X + X′Y = X + Y and the consensus theorem XY + X′Z + YZ = XY + X′Z. De Morgan's laws turn (X·Y)′ into X′ + Y′ and (X + Y)′ into X′·Y′. A Karnaugh map applies these rules graphically: every group of two neighbouring cells is one use of XY + XY′ = X.
Minterms of the expression
A′B′C′ → m(0)
A′BC′ → m(2)
AB → m(6, 7)
A′B′ → m(0, 1)
Group and read off
F = BC′ + A′B′ + AB
Count the literals
L = 6
Answer
L = 6
Another grouping of the same size exists; it has the same number of literals.
14.Digital logic: gates, K-maps & flip-flops
Answer: N = 3
Karnaugh maps: the cells are ordered in Gray code (00, 01, 11, 10), so neighbouring cells, including the ones across the edges, differ in exactly one variable. Group the 1s in rectangles of 1, 2, 4, 8 or 16 cells, as large as possible and as few as possible, until every 1 is covered. Each group is one product term: the variables that stay constant inside it. A group of 2ᵏ cells loses k variables. Don't-cares (X) may be used to make groups bigger but never have to be covered. Grouping the 0s instead gives the minimal POS form.
Prime implicants
The largest groups that can be formed from 1s and Xs.