Electronics 1: cram pack

Formula sheets, the key method steps for every topic and 14 practice problems, with full solutions at the back.

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1Formulas and methods

Diodes & transistors

Diode (constant drop)
VD = 0.7 V when conducting
Active region
VBE = 0.7 V, IC = β·IB, IE = (β + 1)·IB
Fixed bias
IB = (VCC − 0.7)/RB
Divider bias
IB = (VTH − 0.7)/(RTH + (β + 1)RE)
Thévenin of the divider
VTH = VCC·R2/(R1 + R2), RTH = R1∥R2
Collector loop
VCE = VCC − ICRC − IERE
Saturation
IC(sat) = (VCC − VCE(sat))/RC, IB ≥ IC(sat)/β

Op-amp circuits

Inverting amplifier
Vout = −(Rf/Rin)·Vin
Non-inverting amplifier
Vout = (1 + Rf/R1)·Vin
Summing amplifier
Vout = −Rf(V1/R1 + V2/R2)
Ideal op-amp
V+ = V−, Iin = 0

RC & RL transients

Time constant
τ = RC | τ = L/R
Response
x(t) = x(∞) + [x(0) − x(∞)]·e−t/τ
Capacitor at DC
open circuit; vC cannot jump
Inductor at DC
short circuit; iL cannot jump
Settled
t ≈ 5τ

Method

  1. Find the initial value just after switching: a capacitor voltage and an inductor current cannot jump.
  2. Find the final value long after switching: a capacitor acts as an open circuit, an inductor as a short circuit.
  3. Find the time constant: τ = RC or τ = L/R, using the resistance seen by the capacitor or inductor.
  4. Use x(t) = x(∞) + [x(0) − x(∞)]·e−t/τ.

Series & parallel resistors

Resistors in series
Req = R1 + R2 + …
Resistors in parallel
1/Req = 1/R1 + 1/R2 + …
Two in parallel
Req = R1R2 / (R1 + R2)
Ohm's law
V = I·R
Power
P = V·I = I²R = V²/R

Method

  1. Start at the end of the network furthest from the terminals.
  2. Combine resistors in series by adding them, and resistors in parallel with 1/R = 1/R₁ + 1/R₂ + …
  3. Redraw the circuit after each step.
  4. Repeat until one resistor is left between the terminals.

DC-DC converters

Buck
Vo = D·Vin
Boost
Vo = Vin/(1 − D)
Inverting buck-boost
|Vo| = Vin·D/(1 − D)
Ideal power balance
VinIin = VoIo
Inductor ripple
ΔIL = VL,on·D/(L·f); buck Vin − Vo, boost and buck-boost Vin
Average inductor current
buck Io; boost and buck-boost Io/(1 − D)
Output ripple
buck ΔIL/(8fC); boost and buck-boost Io·D/(fC)
CCM boundary
buck (1 − D)R/(2f); boost D(1 − D)²R/(2f); buck-boost (1 − D)²R/(2f)

Method

  1. Identify the converter (buck, boost or buck-boost) and the duty cycle D from the voltage ratio.
  2. Use volt-second balance on the inductor: the average inductor voltage over a period is zero.
  3. Find the inductor voltage while the switch is on, then ΔIL = VL·D/(L·f).
  4. For the output ripple, find the charge that flows in and out of the capacitor; for the CCM boundary, set the average inductor current equal to ΔIL/2.

Wheatstone bridge & strain gauges

Divider voltages
Va = VsR2/(R1 + R2), Vb = VsR4/(R3 + R4)
Output
Vab = Va − Vb
Balance
R1/R2 = R3/R4
Slide-wire bridge
R/Rx = l/(100 − l)
Thévenin resistance
Rth = R1∥R2 + R3∥R4
Gauge factor
ΔR/R = GF·ε
Bridge output
quarter Vs·GF·ε/4, half Vs·GF·ε/2, full Vs·GF·ε
Small change, one arm
Vab ≈ Vs·ΔR/(4R)
Stress
σ = E·ε

Method

  1. Treat the bridge as two voltage dividers across the same supply.
  2. For balance, set R₁/R₂ = R₃/R₄ and solve for the unknown resistor.
  3. For an unbalanced bridge, find Va and Vb from the dividers and subtract; use the Thévenin equivalent when a meter loads the output.
  4. For strain gauges, convert strain to ΔR/R = GF·ε and use Vs·GF·ε/4, /2 or ×1 for a quarter, half or full bridge.

Digital logic: gates, K-maps & flip-flops

Basic gates
A·B, A + B, A′, (A·B)′, (A + B)′, A ⊕ B
Boolean rules
X + X′ = 1, X·X′ = 0, X + XY = X, XY + XY′ = X
De Morgan
(X·Y)′ = X′ + Y′, (X + Y)′ = X′·Y′
Karnaugh map order
00, 01, 11, 10 (Gray code)
Group of 2ᵏ cells
loses k variables
4-to-1 multiplexer
F = A′B′I0 + A′BI1 + AB′I2 + ABI3
Flip-flops
D: Q⁺ = D, T: Q⁺ = T ⊕ Q, JK: Q⁺ = JQ′ + K′Q
Counters
n-bit: 2ⁿ states; mod-N: smallest n with 2ⁿ ≥ N; fout = fclk/N
Ripple counter
fmax = 1/(n·tpd)
Ring and Johnson counters
n and 2n states

Method

  1. For a circuit, work from the inputs to the output one gate at a time and write the value on every wire, or write its expression and fill in the truth table.
  2. For simplification, put the 1s (and the don’t-cares as X) into a Karnaugh map with Gray-code rows and columns: 00, 01, 11, 10.
  3. Cover the 1s with as few and as large groups of 1, 2, 4, 8 or 16 cells as possible, wrapping round the edges; each group is one product term made of the variables that stay constant. Group the 0s for the POS form.
  4. For flip-flops and counters, read the inputs at each active clock edge, write the state after every edge, and remember that an n-bit counter wraps round after 2ⁿ states.

2Practice problems

1.Diodes & transistorsMedium
+−24 VR = ?4 × 2.1 V5 mA

4 yellow LEDs (forward voltage 2.1 V each) are connected in series with a resistor to a 24 V supply. Find the resistance R that sets the current to 5 mA.

Vs = 24 VVF = 2.1 Vn = 4I = 5 mA
R = Ω
2.Diodes & transistorsHard
RC​ = 1 kΩβ = 150VCC​ = 9 V5 VRB​ = ?

An NPN transistor with β = 150 switches a 1 kΩ load resistor connected between VCC = 9 V and its collector. The emitter is grounded. The base is driven from a 5 V logic output through a base resistor RB. Take VBE = 0.7 V and VCE(sat) = 0.2 V. For reliable switching, design for a base current 10 times the minimum needed for saturation. Find RB in kΩ.

VCC = 9 VRC = 1 kΩβ = 150Vin = 5 VVBE = 0.7 VVCE(sat) = 0.2 Voverdrive = 10
RB = kΩ
3.Op-amp circuitsMedium
−+Vout​R2​ = 47 kΩV1​ = 0.4 VR1​ = 100 kΩV2​ = 0.9 VR3​ = 100 kΩR4​ = 47 kΩ

The difference amplifier uses an ideal op-amp with ±15 V supplies, with R3 = R1 and R4 = R2. Find the voltage V− at the inverting input.

V1 = 0.4 VV2 = 0.9 VR1 = R3 = 100 kΩR2 = R4 = 47 kΩ
V− = V
4.Op-amp circuitsHard
−+Vout​Rf​ = 4.7 kΩV1​ = 2 VR1​ = 2 kΩV2​ = 1.6 VR2​ = 47 kΩ

The summing amplifier uses an ideal op-amp with ±15 V supplies. Find the output voltage Vout.

V1 = 2 VV2 = 1.6 VR1 = 2 kΩR2 = 47 kΩRf = 4.7 kΩ
Vout = V
5.RC & RL transientsMedium
+−Vs​6 Vt = 0R = 68 ΩL10 mHi(t)

The inductor carries no current before the switch closes at t = 0. How long after the switch closes does the current reach 95% of its final value? Find t.

Vs = 6 VR = 68 ΩL = 10 mH
t = ms
6.RC & RL transientsHard
+−Vs​5 Vt = 0R = 2.2 kΩC33 µF+−vC​vC​(0) = 10 V

Just before the switch closes at t = 0, the capacitor holds 10 V with the polarity shown. Find the capacitor voltage vC at t = 30 ms.

Vs = 5 VR = 2.2 kΩC = 33 µFvC(0) = 10 Vt = 30 ms
vC = V
7.Series & parallel resistorsMedium
R1​ = 10 ΩR3​ = 2 Ω+−V1​10 VR2​3 ΩAR4​6 ΩB

Find the equivalent resistance Req seen by the source V1.

V1 = 10 VR1 = 10 ΩR2 = 3 ΩR3 = 2 ΩR4 = 6 Ω
Req = Ω
8.Series & parallel resistorsHard
R1​ = 2 ΩR3​ = 5 ΩR5​ = 3 Ω+−V1​12 VR2​3 ΩAR4​15 ΩBR6​10 Ω

Find the equivalent resistance Req seen by the source V1.

V1 = 12 VR1 = 2 ΩR2 = 3 ΩR3 = 5 ΩR4 = 15 ΩR5 = 3 ΩR6 = 10 Ω
Req = Ω
9.DC-DC convertersMedium
tiL​Imax​Imin​ΔI = ?DTT2T

An ideal boost converter turns 36 V into 48 V at 25 kHz with L = 100 µH. Find the peak-to-peak inductor ripple current ΔIL.

Vin​ = 36 VVo​ = 48 Vf = 25 kHzL = 100 µH
ΔIL = A
10.DC-DC convertersHard
tvo​Vo​ΔV = ?DTT2T

A buck converter turns 12 V into 3 V for a 20 Ω load at 40 kHz, with L = 330 µH and C = 220 µF. Find the peak-to-peak output voltage ripple ΔVo in mV.

Vin​ = 12 VVo​ = 3 Vf = 40 kHzL = 330 µHC = 220 µF
ΔVo = mV
11.Wheatstone bridge & strain gaugesMedium
+−3 V100 Ω100 Ω + ΔR100 Ω100 Ωab+−7.46 mV

A bridge with four 100 Ω arms is supplied with 3 V. When the sensor R₂ changes, the output reads Vab = 7.46 mV. Find the exact change ΔR of R₂.

Vs = 3 VR = 100 ΩVab = 7.46 mV
ΔR = Ω
12.Wheatstone bridge & strain gaugesHard
+−5 V120 Ω120 Ω + ΔR120 Ω120 Ωab+−0.641 mV

A quarter bridge with one active gauge (GF = 2.05) is excited with 5 V. Under load the output reads 0.641 mV. Find the strain ε in µε.

Vs = 5 VGF = 2.05Vo = 0.641 mV
ε = µε
13.Digital logic: gates, K-maps & flip-flopsMedium
MUX0I0​0I1​0I2​1I3​ABS1​S0​F

A 4-to-1 multiplexer has its select inputs S₁ = A and S₀ = B, and its data inputs tied to I₀ = 0, I₁ = 0, I₂ = 0, I₃ = 1. For how many of the 8 combinations of A, B and C is the output F = 1? Find N.

I₀ = 0I₁ = 0I₂ = 0I₃ = 1
N =
14.Digital logic: gates, K-maps & flip-flopsHard
FFQ0​Q0​FFQ1​Q1​FFQ2​Q2​FFQ3​Q3​FFQ4​Q4​CLKMOD-24

A mod-24 counter is built from the minimum number of flip-flops. How many of the possible states U are never used?

N = 24
U =

3Solutions

1.Diodes & transistors

Answer: R = 3120 Ω

LED and diode circuits: a forward-biased LED drops roughly its forward voltage VF (about 2 V for red, 3 V for blue or white), whatever the current. A series resistor sets the current: R = (Vs − n·VF)/I for n LEDs in series. With a more exact diode model V = V₀ + I·rd, the operating point is where the diode line meets the load line I = (Vs − V)/R, so I = (Vs − V₀)/(R + rd).

Voltage across the resistor

VR = 24 − 4·2.1 = 15.6 V

Resistance

R = 15.6/0.005 = 3120 Ω

Answer

R = 3120 Ω

The resistor dissipates 78 mW.

2.Diodes & transistors

Answer: RB = 7.33 kΩ

BJT as a switch: to switch a load fully on, the transistor is driven into saturation, where VCE = VCE(sat) and the collector current is set by the load: IC(sat) = (VCC − VCE(sat))/RC. Saturation needs at least IB = IC(sat)/β. If the base current is smaller, the transistor stays active and IC = β·IB.

Collector current in saturation

IC(sat) = (9 − 0.2)/1000 = 8.8 mA

Minimum base current

IB(min) = IC(sat)/β = 8.8/150 = 58.67 µA

Design base current

IB = 10·58.67 µA = 586.7 µA

Base resistor

RB = (5 − 0.7)/IB = 4.3 V/0.5867 mA = 7.33 kΩ

Answer

RB = 7.33 kΩ
3.Op-amp circuits

Answer: V− = 0.2878 V

Ideal op-amp rules: with negative feedback, the op-amp drives its output so that its two inputs sit at the same voltage (V₋ = V₊), and no current flows into either input. Writing KCL at the inverting input with these two facts gives the output.

Voltage at the inputs

R₃ and R₄ carry the same current, so they form a voltage divider; feedback makes V₋ = V₊.

V₊ = V2·R4/(R3 + R4) = 0.9·47/(100 + 47) = 0.2878 V
V₋ = V₊

Answer

V− = 0.2878 V
4.Op-amp circuits

Answer: Vout = −4.86 V

Ideal op-amp rules: with negative feedback, the op-amp drives its output so that its two inputs sit at the same voltage (V₋ = V₊), and no current flows into either input. Writing KCL at the inverting input with these two facts gives the output.

Input currents

V₋ = 0, so each input resistor has its full input voltage across it.

I1 = V1/R1 = 2/2 = 1 mA
I2 = V2/R2 = 1.6/47 = 0.03404 mA
If = I1 + I2 = 1.034 mA

Output voltage

Vout = −Rf·If = −4.7·1.034 = −4.86 V

Answer

Vout = −4.86 V
5.RC & RL transients

Answer: t = 0.4405 ms

First-order transients: in a circuit with one capacitor or one inductor, every voltage and current moves exponentially from its initial value to its final value: x(t) = x(∞) + [x(0) − x(∞)]·e−t/τ, with τ = RC or τ = L/R. After about 5τ the circuit has settled.

Time constant and final current

Long after the switch closes the inductor behaves like a short circuit, so the final current is set by R alone.

τ = L/R = 10 mH / 68 Ω = 0.1471 ms
i(∞) = Vs/R = 6/68 = 0.08824 A

Solve for the time

0.95 = 1 − e−t/τ → t = −τ·ln(1 − 0.95)
t = −0.1471·ln(0.05) = 0.4405 ms

Answer

t = 0.4405 ms
6.RC & RL transients

Answer: vC = 8.308 V

First-order transients: in a circuit with one capacitor or one inductor, every voltage and current moves exponentially from its initial value to its final value: x(t) = x(∞) + [x(0) − x(∞)]·e−t/τ, with τ = RC or τ = L/R. After about 5τ the circuit has settled.

Initial value, final value, time constant

The capacitor voltage cannot jump, so it starts at its stored value and heads for the source voltage.

vC(0) = 10 V, vC(∞) = Vs = 5 V
τ = R·C = 2.2 kΩ · 33 µF = 72.6 ms
vC(t) = 5 + (10 − 5)·e−t/τ

Voltage at the given time

vC(30) = 5 + (5)·e−30/72.6 = 8.308 V

Answer

vC = 8.308 V
7.Series & parallel resistors

Answer: Req = 12.18 Ω

Series and parallel resistors: in series the same current flows through each resistor and R = R₁ + R₂ + …. In parallel each resistor has the same voltage and 1/R = 1/R₁ + 1/R₂ + …. A ladder network is reduced one pair at a time until a single equivalent resistance remains.

R1​ = 10 ΩR3​ = 2 Ω+−V1​10 VR2​3 ΩAR4​6 ΩB

Combine resistors from the far end

Start at the end farthest from the source and work back towards it. Resistors carrying the same current are in series; resistors across the same two nodes are in parallel.

R3 + R4 = 2 + 6 = 8 Ω
R2 ∥ 8 = 3·8/(3+8) = 2.182 Ω
Req = R1 + 2.182 = 10 + 2.182 = 12.18 Ω

Answer

Req = 12.18 Ω
8.Series & parallel resistors

Answer: Req = 4.399 Ω

Series and parallel resistors: in series the same current flows through each resistor and R = R₁ + R₂ + …. In parallel each resistor has the same voltage and 1/R = 1/R₁ + 1/R₂ + …. A ladder network is reduced one pair at a time until a single equivalent resistance remains.

R1​ = 2 ΩR3​ = 5 ΩR5​ = 3 Ω+−V1​12 VR2​3 ΩAR4​15 ΩBR6​10 Ω

Combine resistors from the far end

Start at the end farthest from the source and work back towards it. Resistors carrying the same current are in series; resistors across the same two nodes are in parallel.

R5 + R6 = 3 + 10 = 13 Ω
R4 ∥ 13 = 6.964 Ω
R3 + 6.964 = 11.96 Ω
R2 ∥ 11.96 = 2.399 Ω
Req = R1 + 2.399 = 2 + 2.399 = 4.399 Ω

Answer

Req = 4.399 Ω
9.DC-DC converters

Answer: ΔIL = 3.6 A

DC-DC converters: a switch S turns on for the fraction D of each period T = 1/f. In steady state the average inductor voltage is zero (volt-second balance), which gives the ideal conversion ratios in continuous conduction: buck Vo = D·Vin, boost Vo = Vin/(1 − D), inverting buck-boost |Vo| = Vin·D/(1 − D). An ideal converter keeps the power: Vin·Iin = Vo·Io. While S is on the inductor current rises by ΔIL = VL·D·T/L, with VL = Vin − Vo for the buck and Vin for the boost and buck-boost. The output ripple is ΔVo = ΔIL/(8fC) for the buck and Io·D/(fC) for the boost and buck-boost. The inductor current just touches zero (the CCM boundary) when the average inductor current equals ΔIL/2.

Duty cycle

D = 1 − 36/48 = 0.25

Inductor voltage during the on-time

While S is on, the inductor sits directly across Vin.

VL = 36 V

Ripple current

ΔIL = VL·D/(L·f) = 36·0.25/(100·10⁻⁶·25·10³) = 3.6 A

Answer

ΔIL = 3.6 A
10.DC-DC converters

Answer: ΔVo = 2.421 mV

DC-DC converters: a switch S turns on for the fraction D of each period T = 1/f. In steady state the average inductor voltage is zero (volt-second balance), which gives the ideal conversion ratios in continuous conduction: buck Vo = D·Vin, boost Vo = Vin/(1 − D), inverting buck-boost |Vo| = Vin·D/(1 − D). An ideal converter keeps the power: Vin·Iin = Vo·Io. While S is on the inductor current rises by ΔIL = VL·D·T/L, with VL = Vin − Vo for the buck and Vin for the boost and buck-boost. The output ripple is ΔVo = ΔIL/(8fC) for the buck and Io·D/(fC) for the boost and buck-boost. The inductor current just touches zero (the CCM boundary) when the average inductor current equals ΔIL/2.

Duty cycle

D = 3/12 = 0.25

Inductor ripple current

ΔIL = (12 − 3)·0.25/(330·10⁻⁶·40·10³) = 0.1705 A

Output ripple

ΔVo = 0.1705/(8·40·10³·220·10⁻⁶) = 2.421 mV

Answer

ΔVo = 2.421 mV
11.Wheatstone bridge & strain gauges

Answer: ΔR = 0.9996 Ω

Wheatstone bridge: two voltage dividers share one supply Vs. The left divider R1–R2 gives Va = Vs·R2/(R1 + R2) and the right divider R3–R4 gives Vb = Vs·R4/(R3 + R4); the output is Vab = Va − Vb. The bridge is balanced (Vab = 0, no current in the meter) when R1/R2 = R3/R4, that is R1·R4 = R2·R3. Seen from the output, the bridge is a Thévenin source with Rth = R1∥R2 + R3∥R4.

Node voltage

Va = 1.5 + 0.00746 = 1.507 V

Solve the divider

R₂ = 100·1.507/(3 − 1.507) = 101 Ω
ΔR = 101 − 100 = 0.9996 Ω

Answer

ΔR = 0.9996 Ω
12.Wheatstone bridge & strain gauges

Answer: ε = 250.1 µε

Strain gauges: a gauge changes its resistance with strain: ΔR/R = GF·ε, where the gauge factor GF is about 2 for metal foil. In a bridge with all arms equal to R, one active gauge (quarter bridge) gives Vo ≈ Vs·GF·ε/4. Two active gauges with opposite strains in adjacent arms (half bridge) give Vs·GF·ε/2, and four (full bridge) give Vs·GF·ε. Stress follows from Hooke’s law, σ = E·ε. Load cells state their sensitivity in mV/V: the output at full load per volt of excitation.

Solve the quarter-bridge equation

ε = 4·0.000641/(5·2.05) = 0.0002501

In microstrain

ε = 250.1 µε

Answer

ε = 250.1 µε
13.Digital logic: gates, K-maps & flip-flops

Answer: N = 2

Multiplexer: a 2ⁿ-to-1 multiplexer passes one of its data inputs to the output; the select lines, read as a binary number, pick which one. For a 4-to-1 MUX with selects S₁S₀ = AB, F = A′B′·I₀ + A′B·I₁ + AB′·I₂ + AB·I₃. Tying the data inputs to 0, 1, C or C′ makes the MUX produce any function of A, B and C, which is a common way to build logic with one chip.

Output expression

F = AB

Rows with F = 1

ABC = 110, 111
N = 2

Answer

N = 2
14.Digital logic: gates, K-maps & flip-flops

Answer: U = 8

Flip-flops and counters: a flip-flop changes only at the active clock edge. D copies its input (Q⁺ = D); T toggles when T = 1; JK holds for 00, resets for 01, sets for 10 and toggles for 11. An n-bit binary counter has 2ⁿ states and counts modulo 2ⁿ; a mod-N counter goes 0, 1, …, N − 1 and back to 0, and needs the smallest n with 2ⁿ ≥ N flip-flops. Each stage of a ripple counter halves the frequency, so the last output of a mod-N counter runs at fclk/N. A Johnson counter of n flip-flops has 2n states, a ring counter n.

Number of flip-flops

2ⁿ ≥ 24 → n = 5 (2⁵ = 32)

Unused states

U = 32 − 24 = 8

Answer

U = 8

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