Formula sheets, the key method steps for every topic and 14 practice problems, with full solutions at the back.
An NPN transistor with β = 200 has voltage-divider bias from VCC = 12 V: R₁ = 22 kΩ from VCC to the base and R₂ = 6.8 kΩ from the base to ground. The collector resistor is RC = 4.7 kΩ and the emitter resistor is RE = 1.5 kΩ. Take VBE = 0.7 V and use the Thévenin equivalent of the divider (do not neglect the base current). Find the collector–emitter voltage VCE.
A 6.2 V Zener regulator must supply up to 20 mA to a load. The input can drop to 24 V, and the Zener needs at least 1 mA to regulate. Find the largest series resistance Rmax that keeps it regulating.
Choose the feedback resistor Rf that gives this non-inverting amplifier a voltage gain of 5.
The summing amplifier uses an ideal op-amp with ±15 V supplies. Find the current If through the feedback resistor, flowing towards the output.
The inductor carries no current before the switch closes at t = 0. Find the voltage vL across the inductor at t = 1 ms.
Just before the switch closes at t = 0, the capacitor holds 20 V with the polarity shown. How long does it take for vC to reach 8.8 V? Find t.
Find the equivalent resistance Req seen by the source V1.
Find the current IR1 delivered by the source, which flows through R1.
An ideal boost converter turns 12 V into 24 V at 20 kHz with L = 220 µH. Find the peak-to-peak inductor ripple current ΔIL.
A buck converter turns 9 V into 2.7 V at 250 kHz with L = 47 µH. Find the output capacitance C that limits the peak-to-peak output ripple to 10 mV.
A bridge with four 350 Ω arms is supplied with 15 V. When the sensor R₂ changes, the output reads Vab = 182.9 mV. Find the exact change ΔR of R₂.
A quarter bridge (one active gauge, GF = 2.1) is excited with 5 V. The largest strain to be measured is 200 µε, and it must give 2.5 V at the input of an analogue-to-digital converter. Find the amplifier gain G.
A 4-to-1 multiplexer has its select inputs S₁ = A and S₀ = B, and its data inputs tied to I₀ = C′, I₁ = C′, I₂ = C′, I₃ = 1. For how many of the 8 combinations of A, B and C is the output F = 1? Find N.
A 4-bit binary up counter starts at 4 (decimal, Q = 0100). Which count Q (in decimal) does it show after 48 clock pulses?
Answer: VCE = 3.364 V
BJT bias point: in the active region VBE = 0.7 V, IC = β·IB and IE = (β + 1)·IB. Find IB from the base loop with KVL, then IC, then VCE from the collector–emitter loop. A voltage divider at the base is replaced by its Thévenin equivalent VTH = VCC·R₂/(R₁ + R₂), RTH = R₁∥R₂; an emitter resistor appears (β + 1) times larger in the base loop.
KVL around the base loop; the emitter current is (β + 1)·IB.
Answer: Rmax = 847.6 Ω
Zener regulator: a reverse-biased Zener diode holds its voltage VZ while its current stays above a minimum IZ,min. The series resistor R takes the difference between input and output: IR = (Vin − VZ)/R. That current splits between the load, IL = VZ/RL, and the Zener: IZ = IR − IL. Design for the worst cases: the lowest input with the largest load must still leave IZ,min, and the highest input with no load gives the largest Zener power PZ = VZ·IZ.
Answer: Rf = 188 kΩ
Ideal op-amp rules: with negative feedback, the op-amp drives its output so that its two inputs sit at the same voltage (V₋ = V₊), and no current flows into either input. Writing KCL at the inverting input with these two facts gives the output.
V₋ = V₊ = Vin, and the current through R₁ also flows through Rf, so Vout = Vin·(1 + Rf/R₁).
Answer: If = 0.07582 mA
Ideal op-amp rules: with negative feedback, the op-amp drives its output so that its two inputs sit at the same voltage (V₋ = V₊), and no current flows into either input. Writing KCL at the inverting input with these two facts gives the output.
V₋ = 0, so each input resistor has its full input voltage across it.
Answer: vL = 3.447 V
First-order transients: in a circuit with one capacitor or one inductor, every voltage and current moves exponentially from its initial value to its final value: x(t) = x(∞) + [x(0) − x(∞)]·e−t/τ, with τ = RC or τ = L/R. After about 5τ the circuit has settled.
Long after the switch closes the inductor behaves like a short circuit, so the final current is set by R alone.
At t = 0 the whole supply voltage appears across the inductor; it then decays to zero.
Answer: t = 109.4 ms
First-order transients: in a circuit with one capacitor or one inductor, every voltage and current moves exponentially from its initial value to its final value: x(t) = x(∞) + [x(0) − x(∞)]·e−t/τ, with τ = RC or τ = L/R. After about 5τ the circuit has settled.
The capacitor voltage cannot jump, so it starts at its stored value and heads for the source voltage.
Answer: Req = 9.8 Ω
Series and parallel resistors: in series the same current flows through each resistor and R = R₁ + R₂ + …. In parallel each resistor has the same voltage and 1/R = 1/R₁ + 1/R₂ + …. A ladder network is reduced one pair at a time until a single equivalent resistance remains.
Start at the end farthest from the source and work back towards it. Resistors carrying the same current are in series; resistors across the same two nodes are in parallel.
Answer: IR1 = 0.3344 A
Series and parallel resistors: in series the same current flows through each resistor and R = R₁ + R₂ + …. In parallel each resistor has the same voltage and 1/R = 1/R₁ + 1/R₂ + …. A ladder network is reduced one pair at a time until a single equivalent resistance remains.
Start at the end farthest from the source and work back towards it. Resistors carrying the same current are in series; resistors across the same two nodes are in parallel.
The source sees only Req, so Ohm’s law gives the current it delivers. That current flows through R₁.
Answer: ΔIL = 1.364 A
DC-DC converters: a switch S turns on for the fraction D of each period T = 1/f. In steady state the average inductor voltage is zero (volt-second balance), which gives the ideal conversion ratios in continuous conduction: buck Vo = D·Vin, boost Vo = Vin/(1 − D), inverting buck-boost |Vo| = Vin·D/(1 − D). An ideal converter keeps the power: Vin·Iin = Vo·Io. While S is on the inductor current rises by ΔIL = VL·D·T/L, with VL = Vin − Vo for the buck and Vin for the boost and buck-boost. The output ripple is ΔVo = ΔIL/(8fC) for the buck and Io·D/(fC) for the boost and buck-boost. The inductor current just touches zero (the CCM boundary) when the average inductor current equals ΔIL/2.
While S is on, the inductor sits directly across Vin.
Answer: C = 8.043 µF
DC-DC converters: a switch S turns on for the fraction D of each period T = 1/f. In steady state the average inductor voltage is zero (volt-second balance), which gives the ideal conversion ratios in continuous conduction: buck Vo = D·Vin, boost Vo = Vin/(1 − D), inverting buck-boost |Vo| = Vin·D/(1 − D). An ideal converter keeps the power: Vin·Iin = Vo·Io. While S is on the inductor current rises by ΔIL = VL·D·T/L, with VL = Vin − Vo for the buck and Vin for the boost and buck-boost. The output ripple is ΔVo = ΔIL/(8fC) for the buck and Io·D/(fC) for the boost and buck-boost. The inductor current just touches zero (the CCM boundary) when the average inductor current equals ΔIL/2.
Answer: ΔR = 17.5 Ω
Wheatstone bridge: two voltage dividers share one supply Vs. The left divider R1–R2 gives Va = Vs·R2/(R1 + R2) and the right divider R3–R4 gives Vb = Vs·R4/(R3 + R4); the output is Vab = Va − Vb. The bridge is balanced (Vab = 0, no current in the meter) when R1/R2 = R3/R4, that is R1·R4 = R2·R3. Seen from the output, the bridge is a Thévenin source with Rth = R1∥R2 + R3∥R4.
Answer: G = 4762
Strain gauges: a gauge changes its resistance with strain: ΔR/R = GF·ε, where the gauge factor GF is about 2 for metal foil. In a bridge with all arms equal to R, one active gauge (quarter bridge) gives Vo ≈ Vs·GF·ε/4. Two active gauges with opposite strains in adjacent arms (half bridge) give Vs·GF·ε/2, and four (full bridge) give Vs·GF·ε. Stress follows from Hooke’s law, σ = E·ε. Load cells state their sensitivity in mV/V: the output at full load per volt of excitation.
Answer: N = 5
Multiplexer: a 2ⁿ-to-1 multiplexer passes one of its data inputs to the output; the select lines, read as a binary number, pick which one. For a 4-to-1 MUX with selects S₁S₀ = AB, F = A′B′·I₀ + A′B·I₁ + AB′·I₂ + AB·I₃. Tying the data inputs to 0, 1, C or C′ makes the MUX produce any function of A, B and C, which is a common way to build logic with one chip.
Answer: Q = 4
Flip-flops and counters: a flip-flop changes only at the active clock edge. D copies its input (Q⁺ = D); T toggles when T = 1; JK holds for 00, resets for 01, sets for 10 and toggles for 11. An n-bit binary counter has 2ⁿ states and counts modulo 2ⁿ; a mod-N counter goes 0, 1, …, N − 1 and back to 0, and needs the smallest n with 2ⁿ ≥ N flip-flops. Each stage of a ripple counter halves the frequency, so the last output of a mod-N counter runs at fclk/N. A Johnson counter of n flip-flops has 2n states, a ring counter n.
Every 16 pulses bring the counter back to the same state.
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