Electronics 1: cram pack

Formula sheets, the key method steps for every topic and 14 practice problems, with full solutions at the back.

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1Formulas and methods

Diodes & transistors

Diode (constant drop)
VD = 0.7 V when conducting
Active region
VBE = 0.7 V, IC = β·IB, IE = (β + 1)·IB
Fixed bias
IB = (VCC − 0.7)/RB
Divider bias
IB = (VTH − 0.7)/(RTH + (β + 1)RE)
Thévenin of the divider
VTH = VCC·R2/(R1 + R2), RTH = R1∥R2
Collector loop
VCE = VCC − ICRC − IERE
Saturation
IC(sat) = (VCC − VCE(sat))/RC, IB ≥ IC(sat)/β

Op-amp circuits

Inverting amplifier
Vout = −(Rf/Rin)·Vin
Non-inverting amplifier
Vout = (1 + Rf/R1)·Vin
Summing amplifier
Vout = −Rf(V1/R1 + V2/R2)
Ideal op-amp
V+ = V−, Iin = 0

RC & RL transients

Time constant
τ = RC | τ = L/R
Response
x(t) = x(∞) + [x(0) − x(∞)]·e−t/τ
Capacitor at DC
open circuit; vC cannot jump
Inductor at DC
short circuit; iL cannot jump
Settled
t ≈ 5τ

Method

  1. Find the initial value just after switching: a capacitor voltage and an inductor current cannot jump.
  2. Find the final value long after switching: a capacitor acts as an open circuit, an inductor as a short circuit.
  3. Find the time constant: τ = RC or τ = L/R, using the resistance seen by the capacitor or inductor.
  4. Use x(t) = x(∞) + [x(0) − x(∞)]·e−t/τ.

Series & parallel resistors

Resistors in series
Req = R1 + R2 + …
Resistors in parallel
1/Req = 1/R1 + 1/R2 + …
Two in parallel
Req = R1R2 / (R1 + R2)
Ohm's law
V = I·R
Power
P = V·I = I²R = V²/R

Method

  1. Start at the end of the network furthest from the terminals.
  2. Combine resistors in series by adding them, and resistors in parallel with 1/R = 1/R₁ + 1/R₂ + …
  3. Redraw the circuit after each step.
  4. Repeat until one resistor is left between the terminals.

DC-DC converters

Buck
Vo = D·Vin
Boost
Vo = Vin/(1 − D)
Inverting buck-boost
|Vo| = Vin·D/(1 − D)
Ideal power balance
VinIin = VoIo
Inductor ripple
ΔIL = VL,on·D/(L·f); buck Vin − Vo, boost and buck-boost Vin
Average inductor current
buck Io; boost and buck-boost Io/(1 − D)
Output ripple
buck ΔIL/(8fC); boost and buck-boost Io·D/(fC)
CCM boundary
buck (1 − D)R/(2f); boost D(1 − D)²R/(2f); buck-boost (1 − D)²R/(2f)

Method

  1. Identify the converter (buck, boost or buck-boost) and the duty cycle D from the voltage ratio.
  2. Use volt-second balance on the inductor: the average inductor voltage over a period is zero.
  3. Find the inductor voltage while the switch is on, then ΔIL = VL·D/(L·f).
  4. For the output ripple, find the charge that flows in and out of the capacitor; for the CCM boundary, set the average inductor current equal to ΔIL/2.

Wheatstone bridge & strain gauges

Divider voltages
Va = VsR2/(R1 + R2), Vb = VsR4/(R3 + R4)
Output
Vab = Va − Vb
Balance
R1/R2 = R3/R4
Slide-wire bridge
R/Rx = l/(100 − l)
Thévenin resistance
Rth = R1∥R2 + R3∥R4
Gauge factor
ΔR/R = GF·ε
Bridge output
quarter Vs·GF·ε/4, half Vs·GF·ε/2, full Vs·GF·ε
Small change, one arm
Vab ≈ Vs·ΔR/(4R)
Stress
σ = E·ε

Method

  1. Treat the bridge as two voltage dividers across the same supply.
  2. For balance, set R₁/R₂ = R₃/R₄ and solve for the unknown resistor.
  3. For an unbalanced bridge, find Va and Vb from the dividers and subtract; use the Thévenin equivalent when a meter loads the output.
  4. For strain gauges, convert strain to ΔR/R = GF·ε and use Vs·GF·ε/4, /2 or ×1 for a quarter, half or full bridge.

Digital logic: gates, K-maps & flip-flops

Basic gates
A·B, A + B, A′, (A·B)′, (A + B)′, A ⊕ B
Boolean rules
X + X′ = 1, X·X′ = 0, X + XY = X, XY + XY′ = X
De Morgan
(X·Y)′ = X′ + Y′, (X + Y)′ = X′·Y′
Karnaugh map order
00, 01, 11, 10 (Gray code)
Group of 2ᵏ cells
loses k variables
4-to-1 multiplexer
F = A′B′I0 + A′BI1 + AB′I2 + ABI3
Flip-flops
D: Q⁺ = D, T: Q⁺ = T ⊕ Q, JK: Q⁺ = JQ′ + K′Q
Counters
n-bit: 2ⁿ states; mod-N: smallest n with 2ⁿ ≥ N; fout = fclk/N
Ripple counter
fmax = 1/(n·tpd)
Ring and Johnson counters
n and 2n states

Method

  1. For a circuit, work from the inputs to the output one gate at a time and write the value on every wire, or write its expression and fill in the truth table.
  2. For simplification, put the 1s (and the don’t-cares as X) into a Karnaugh map with Gray-code rows and columns: 00, 01, 11, 10.
  3. Cover the 1s with as few and as large groups of 1, 2, 4, 8 or 16 cells as possible, wrapping round the edges; each group is one product term made of the variables that stay constant. Group the 0s for the POS form.
  4. For flip-flops and counters, read the inputs at each active clock edge, write the state after every edge, and remember that an n-bit counter wraps round after 2ⁿ states.

2Practice problems

1.Diodes & transistorsMedium
RC​ = 3.3 kΩβ = 80RE​ = 1.5 kΩVCC​ = 18 VR1​ = 100 kΩR2​ = 15 kΩ

An NPN transistor with β = 80 has voltage-divider bias from VCC = 18 V: R₁ = 100 kΩ from VCC to the base and R₂ = 15 kΩ from the base to ground. The collector resistor is RC = 3.3 kΩ and the emitter resistor is RE = 1.5 kΩ. Take VBE = 0.7 V and use the Thévenin equivalent of the divider (do not neglect the base current). Find the collector–emitter voltage VCE.

VCC = 18 VR1 = 100 kΩR2 = 15 kΩRC = 3.3 kΩRE = 1.5 kΩβ = 80
VCE = V
2.Diodes & transistorsHard
+−≤ 26 V330 Ω12 V

A 12 V Zener regulator has a 330 Ω series resistor. The input can rise to 26 V, and the load may be disconnected. Find the largest power PZ,max the Zener must dissipate.

Vin,max = 26 VVZ = 12 VR = 330 Ω
PZ,max = mW
3.Op-amp circuitsMedium
−+Vout​Rf​ = 100 kΩVin​R1​ = 4.7 kΩ

The op-amp is ideal and runs from ±15 V supplies; its output saturates at ±12 V. The inverting amplifier is driven by a sine wave. Find the largest input amplitude Vin,max (peak value) for which the output does not clip.

R1 = 4.7 kΩRf = 100 kΩVsat = ±12 V
Vin,max = V
4.Op-amp circuitsHard
−+Vout​Rf​ = 47 kΩV1​ = −1.8 VR1​ = 4.7 kΩV2​ = 0.4 VR2​ = 1 kΩIf​

The summing amplifier uses an ideal op-amp with ±15 V supplies. Find the current If through the feedback resistor, flowing towards the output.

V1 = −1.8 VV2 = 0.4 VR1 = 4.7 kΩR2 = 1 kΩRf = 47 kΩ
If = mA
5.RC & RL transientsMedium
+−Vs​9 Vt = 0R = 100 ΩL22 mHi(t)

The inductor carries no current before the switch closes at t = 0. Find the voltage vL across the inductor at t = 1 ms.

Vs = 9 VR = 100 ΩL = 22 mHt = 1 ms
vL = V
6.RC & RL transientsHard
+−Vs​20 Vt = 0R = 4.7 kΩC220 µF+−vC​vC​(0) = 12 V

Just before the switch closes at t = 0, the capacitor holds 12 V with the polarity shown. How long does it take for vC to reach 15.2 V? Find t.

Vs = 20 VR = 4.7 kΩC = 220 µFvC(0) = 12 V
t = ms
7.Series & parallel resistorsMedium
R1​ = 15 ΩIR1​R3​ = 20 Ω+−V1​9 VR2​2 ΩAR4​4 ΩB

Find the current IR1 delivered by the source, which flows through R1.

V1 = 9 VR1 = 15 ΩR2 = 2 ΩR3 = 20 ΩR4 = 4 Ω
IR1 = A
8.Series & parallel resistorsHard
R1​ = 15 ΩR3​ = 5 ΩR5​ = 6 Ω+−V1​30 VR2​8 ΩAR4​6 ΩBR6​3 Ω

Find the equivalent resistance Req seen by the source V1.

V1 = 30 VR1 = 15 ΩR2 = 8 ΩR3 = 5 ΩR4 = 6 ΩR5 = 6 ΩR6 = 3 Ω
Req = Ω
9.DC-DC convertersMedium
+−12 VLSCR = 12 Ω+−24 V

An ideal boost converter turns 12 V into 24 V for a 12 Ω load. Find the average inductor current IL.

Vin​ = 12 VVo​ = 24 VR = 12 Ω
IL = A
10.DC-DC convertersHard
tiL​Imax​Io​DTT2T

A buck converter turns 12 V into 7.2 V at 100 kHz with L = 33 µH. Find the smallest load current Io,min for which it stays in continuous conduction.

Vin​ = 12 VVo​ = 7.2 Vf = 100 kHzL = 33 µH
Io,min = A
11.Wheatstone bridge & strain gaugesMedium
+−3 V250 Ω250 Ω + ΔR250 Ω250 Ωab+−Vab​ = ?

A bridge has four 250 Ω arms and Vs = 3 V. The sensor R₂ increases by ΔR = 0.625 Ω. Using the small-change approximation, find the output Vab in mV.

Vs = 3 VR = 250 ΩΔR = 0.625 Ω
Vab = mV
12.Wheatstone bridge & strain gaugesHard
+−5 V1000 Ω1000 Ω + ΔR1000 Ω1000 Ωab+−Vo​

A quarter bridge (one active gauge, GF = 2) is excited with 5 V. The largest strain to be measured is 1500 µε, and it must give 10 V at the input of an analogue-to-digital converter. Find the amplifier gain G.

Vs = 5 VGF = 2εmax = 1500 µεVFS = 10 V
G =
13.Digital logic: gates, K-maps & flip-flopsMedium
ABCD0001111000011110111111

In this Karnaugh map exactly one 1 has no neighbouring 1, so it stays a group of one cell (a full minterm of four literals) in the minimal SOP form. Neighbours across the map edges count. Click that cell.

F = Σm(1, 4, 5, 7, 10, 13)
  1. 1AB = 00, CD = 00
  2. 2AB = 00, CD = 01
  3. 3AB = 00, CD = 11
  4. 4AB = 00, CD = 10
  5. 5AB = 01, CD = 00
  6. 6AB = 01, CD = 01
  7. 7AB = 01, CD = 11
  8. 8AB = 01, CD = 10
  9. 9AB = 11, CD = 00
  10. 10AB = 11, CD = 01
  11. 11AB = 11, CD = 11
  12. 12AB = 11, CD = 10
  13. 13AB = 10, CD = 00
  14. 14AB = 10, CD = 01
  15. 15AB = 10, CD = 11
  16. 16AB = 10, CD = 10
14.Digital logic: gates, K-maps & flip-flopsHard
ABCD00011110000111101011X30214150706X12013X15114X819011110

For F(A, B, C, D) = Σm(0, 1, 4, 5, 9, 10, 14) + d(3, 8, 12, 15), where d marks the don't-care conditions, find the number N of essential prime implicants.

F(A, B, C, D) = Σm(0, 1, 4, 5, 9, 10, 14) + d(3, 8, 12, 15)
N =

3Solutions

1.Diodes & transistors

Answer: VCE = 13.28 V

BJT bias point: in the active region VBE = 0.7 V, IC = β·IB and IE = (β + 1)·IB. Find IB from the base loop with KVL, then IC, then VCE from the collector–emitter loop. A voltage divider at the base is replaced by its Thévenin equivalent VTH = VCC·R₂/(R₁ + R₂), RTH = R₁∥R₂; an emitter resistor appears (β + 1) times larger in the base loop.

Thévenin equivalent of the divider

VTH = 18·15/(100 + 15) = 2.348 V
RTH = 100·15/(100 + 15) = 13.04 kΩ

Base current

KVL around the base loop; the emitter current is (β + 1)·IB.

IB = (2.348 − 0.7)/(13.04 + 81·1.5) = 12.25 µA

Collector current

IC = 80·12.25 µA = 0.9798 mA
IE = 81·12.25 µA = 0.9921 mA

Collector–emitter voltage

VCE = 18 − 0.9798·3.3 − 0.9921·1.5 = 13.28 V

Answer

VCE = 13.28 V
2.Diodes & transistors

Answer: PZ,max = 509.1 mW

Zener regulator: a reverse-biased Zener diode holds its voltage VZ while its current stays above a minimum IZ,min. The series resistor R takes the difference between input and output: IR = (Vin − VZ)/R. That current splits between the load, IL = VZ/RL, and the Zener: IZ = IR − IL. Design for the worst cases: the lowest input with the largest load must still leave IZ,min, and the highest input with no load gives the largest Zener power PZ = VZ·IZ.

Worst-case Zener current

IZ = 14/330 = 42.42 mA

Zener power

PZ = 12·42.42 = 509.1 mW

Answer

PZ,max = 509.1 mW
3.Op-amp circuits

Answer: Vin,max = 0.564 V

Ideal op-amp rules: with negative feedback, the op-amp drives its output so that its two inputs sit at the same voltage (V₋ = V₊), and no current flows into either input. Writing KCL at the inverting input with these two facts gives the output.

Gain

|Av| = Rf/R1 = 100/4.7 = 21.28

Largest input before clipping

Vin,max = Vsat/|Av| = 12/21.28 = 0.564 V

Answer

Vin,max = 0.564 V
4.Op-amp circuits

Answer: If = 0.01702 mA

Ideal op-amp rules: with negative feedback, the op-amp drives its output so that its two inputs sit at the same voltage (V₋ = V₊), and no current flows into either input. Writing KCL at the inverting input with these two facts gives the output.

Input currents

V₋ = 0, so each input resistor has its full input voltage across it.

I1 = V1/R1 = −1.8/4.7 = −0.383 mA
I2 = V2/R2 = 0.4/1 = 0.4 mA
If = I1 + I2 = 0.01702 mA

Answer

If = 0.01702 mA
5.RC & RL transients

Answer: vL = 0.09554 V

First-order transients: in a circuit with one capacitor or one inductor, every voltage and current moves exponentially from its initial value to its final value: x(t) = x(∞) + [x(0) − x(∞)]·e−t/τ, with τ = RC or τ = L/R. After about 5τ the circuit has settled.

Time constant and final current

Long after the switch closes the inductor behaves like a short circuit, so the final current is set by R alone.

τ = L/R = 22 mH / 100 Ω = 0.22 ms
i(∞) = Vs/R = 9/100 = 0.09 A

Inductor voltage

At t = 0 the whole supply voltage appears across the inductor; it then decays to zero.

vL(t) = Vs·e−t/τ = 9·e−1/0.22 = 0.09554 V

Answer

vL = 0.09554 V
6.RC & RL transients

Answer: t = 528.2 ms

First-order transients: in a circuit with one capacitor or one inductor, every voltage and current moves exponentially from its initial value to its final value: x(t) = x(∞) + [x(0) − x(∞)]·e−t/τ, with τ = RC or τ = L/R. After about 5τ the circuit has settled.

Initial value, final value, time constant

The capacitor voltage cannot jump, so it starts at its stored value and heads for the source voltage.

vC(0) = 12 V, vC(∞) = Vs = 20 V
τ = R·C = 4.7 kΩ · 220 µF = 1034 ms
vC(t) = 20 + (12 − 20)·e−t/τ

Solve for the time

15.2 = 20 + (−8)·e−t/τ → e−t/τ = (15.2 − 20)/(12 − 20) = 0.6
t = τ·ln((12 − 20)/(15.2 − 20)) = 1034·ln(1.667) = 528.2 ms

Answer

t = 528.2 ms
7.Series & parallel resistors

Answer: IR1 = 0.5342 A

Series and parallel resistors: in series the same current flows through each resistor and R = R₁ + R₂ + …. In parallel each resistor has the same voltage and 1/R = 1/R₁ + 1/R₂ + …. A ladder network is reduced one pair at a time until a single equivalent resistance remains.

R1​ = 15 ΩR3​ = 20 Ω+−V1​9 VR2​2 ΩAR4​4 ΩB

Combine resistors from the far end

Start at the end farthest from the source and work back towards it. Resistors carrying the same current are in series; resistors across the same two nodes are in parallel.

R3 + R4 = 20 + 4 = 24 Ω
R2 ∥ 24 = 2·24/(2+24) = 1.846 Ω
Req = R1 + 1.846 = 15 + 1.846 = 16.85 Ω

Current from the source

The source sees only Req, so Ohm’s law gives the current it delivers. That current flows through R₁.

IR1 = V1/Req = 9/16.85 = 0.5342 A

Answer

IR1 = 0.5342 A
8.Series & parallel resistors

Answer: Req = 19.14 Ω

Series and parallel resistors: in series the same current flows through each resistor and R = R₁ + R₂ + …. In parallel each resistor has the same voltage and 1/R = 1/R₁ + 1/R₂ + …. A ladder network is reduced one pair at a time until a single equivalent resistance remains.

R1​ = 15 ΩR3​ = 5 ΩR5​ = 6 Ω+−V1​30 VR2​8 ΩAR4​6 ΩBR6​3 Ω

Combine resistors from the far end

Start at the end farthest from the source and work back towards it. Resistors carrying the same current are in series; resistors across the same two nodes are in parallel.

R5 + R6 = 6 + 3 = 9 Ω
R4 ∥ 9 = 3.6 Ω
R3 + 3.6 = 8.6 Ω
R2 ∥ 8.6 = 4.145 Ω
Req = R1 + 4.145 = 15 + 4.145 = 19.14 Ω

Answer

Req = 19.14 Ω
9.DC-DC converters

Answer: IL = 4 A

DC-DC converters: a switch S turns on for the fraction D of each period T = 1/f. In steady state the average inductor voltage is zero (volt-second balance), which gives the ideal conversion ratios in continuous conduction: buck Vo = D·Vin, boost Vo = Vin/(1 − D), inverting buck-boost |Vo| = Vin·D/(1 − D). An ideal converter keeps the power: Vin·Iin = Vo·Io. While S is on the inductor current rises by ΔIL = VL·D·T/L, with VL = Vin − Vo for the buck and Vin for the boost and buck-boost. The output ripple is ΔVo = ΔIL/(8fC) for the buck and Io·D/(fC) for the boost and buck-boost. The inductor current just touches zero (the CCM boundary) when the average inductor current equals ΔIL/2.

Duty cycle

D = 1 − 12/24 = 0.5

Load current

Io = 24/12 = 2 A

Inductor current

IL = Io/(1 − D) = 2/0.5 = 4 A

Answer

IL = 4 A
10.DC-DC converters

Answer: Io,min = 0.4364 A

DC-DC converters: a switch S turns on for the fraction D of each period T = 1/f. In steady state the average inductor voltage is zero (volt-second balance), which gives the ideal conversion ratios in continuous conduction: buck Vo = D·Vin, boost Vo = Vin/(1 − D), inverting buck-boost |Vo| = Vin·D/(1 − D). An ideal converter keeps the power: Vin·Iin = Vo·Io. While S is on the inductor current rises by ΔIL = VL·D·T/L, with VL = Vin − Vo for the buck and Vin for the boost and buck-boost. The output ripple is ΔVo = ΔIL/(8fC) for the buck and Io·D/(fC) for the boost and buck-boost. The inductor current just touches zero (the CCM boundary) when the average inductor current equals ΔIL/2.

Duty cycle

D = 7.2/12 = 0.6

Ripple current

ΔIL = 7.2·0.4/(33·10⁻⁶·100·10³) = 0.8727 A

Boundary load current

Io,min = ΔIL/2 = 0.4364 A

Answer

Io,min = 0.4364 A

Below this current the converter enters discontinuous conduction and Vo rises above D·Vin.

11.Wheatstone bridge & strain gauges

Answer: Vab = 1.875 mV

Wheatstone bridge: two voltage dividers share one supply Vs. The left divider R1–R2 gives Va = Vs·R2/(R1 + R2) and the right divider R3–R4 gives Vb = Vs·R4/(R3 + R4); the output is Vab = Va − Vb. The bridge is balanced (Vab = 0, no current in the meter) when R1/R2 = R3/R4, that is R1·R4 = R2·R3. Seen from the output, the bridge is a Thévenin source with Rth = R1∥R2 + R3∥R4.

Relative change

ΔR/R = 0.625/250 = 0.0025

Linearised output

Vab ≈ 3·0.0025/4 = 1.875 mV

Answer

Vab = 1.875 mV

The exact value is 1.873 mV; the approximation is good while ΔR/R is small.

12.Wheatstone bridge & strain gauges

Answer: G = 2667

Strain gauges: a gauge changes its resistance with strain: ΔR/R = GF·ε, where the gauge factor GF is about 2 for metal foil. In a bridge with all arms equal to R, one active gauge (quarter bridge) gives Vo ≈ Vs·GF·ε/4. Two active gauges with opposite strains in adjacent arms (half bridge) give Vs·GF·ε/2, and four (full bridge) give Vs·GF·ε. Stress follows from Hooke’s law, σ = E·ε. Load cells state their sensitivity in mV/V: the output at full load per volt of excitation.

Bridge output at full scale

Vo = 3.75 mV

Gain

G = 10/0.00375 = 2667

Answer

G = 2667
13.Digital logic: gates, K-maps & flip-flops

Answer: AB = 10, CD = 10

Karnaugh maps: the cells are ordered in Gray code (00, 01, 11, 10), so neighbouring cells, including the ones across the edges, differ in exactly one variable. Group the 1s in rectangles of 1, 2, 4, 8 or 16 cells, as large as possible and as few as possible, until every 1 is covered. Each group is one product term: the variables that stay constant inside it. A group of 2ᵏ cells loses k variables. Don't-cares (X) may be used to make groups bigger but never have to be covered. Grouping the 0s instead gives the minimal POS form.

Neighbours of each 1

A 1 with a neighbouring 1 can join a group of two or more.

m10: m11, m8, m14, m2 → 0
ABCD0001111000011110111111

The isolated 1

m10 = AB′CD′ → AB = 10, CD = 10

Answer

AB = 10, CD = 10
14.Digital logic: gates, K-maps & flip-flops

Answer: N = 3

Karnaugh maps: the cells are ordered in Gray code (00, 01, 11, 10), so neighbouring cells, including the ones across the edges, differ in exactly one variable. Group the 1s in rectangles of 1, 2, 4, 8 or 16 cells, as large as possible and as few as possible, until every 1 is covered. Each group is one product term: the variables that stay constant inside it. A group of 2ᵏ cells loses k variables. Don't-cares (X) may be used to make groups bigger but never have to be covered. Grouping the 0s instead gives the minimal POS form.

Prime implicants

The largest groups that can be formed from 1s and Xs.

C′D′, B′C′, AD′, A′C′, A′B′D, ABC
ABCD00011110000111101011X30214150706X12013X15114X819011110

Essential prime implicants

B′C′, AD′, A′C′
N = 3

Answer

N = 3

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