Electronics 1: cram pack

Formula sheets, the key method steps for every topic and 14 practice problems, with full solutions at the back.

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1Formulas and methods

Diodes & transistors

Diode (constant drop)
VD = 0.7 V when conducting
Active region
VBE = 0.7 V, IC = β·IB, IE = (β + 1)·IB
Fixed bias
IB = (VCC − 0.7)/RB
Divider bias
IB = (VTH − 0.7)/(RTH + (β + 1)RE)
Thévenin of the divider
VTH = VCC·R2/(R1 + R2), RTH = R1∥R2
Collector loop
VCE = VCC − ICRC − IERE
Saturation
IC(sat) = (VCC − VCE(sat))/RC, IB ≥ IC(sat)/β

Op-amp circuits

Inverting amplifier
Vout = −(Rf/Rin)·Vin
Non-inverting amplifier
Vout = (1 + Rf/R1)·Vin
Summing amplifier
Vout = −Rf(V1/R1 + V2/R2)
Ideal op-amp
V+ = V−, Iin = 0

RC & RL transients

Time constant
τ = RC | τ = L/R
Response
x(t) = x(∞) + [x(0) − x(∞)]·e−t/τ
Capacitor at DC
open circuit; vC cannot jump
Inductor at DC
short circuit; iL cannot jump
Settled
t ≈ 5τ

Method

  1. Find the initial value just after switching: a capacitor voltage and an inductor current cannot jump.
  2. Find the final value long after switching: a capacitor acts as an open circuit, an inductor as a short circuit.
  3. Find the time constant: τ = RC or τ = L/R, using the resistance seen by the capacitor or inductor.
  4. Use x(t) = x(∞) + [x(0) − x(∞)]·e−t/τ.

Series & parallel resistors

Resistors in series
Req = R1 + R2 + …
Resistors in parallel
1/Req = 1/R1 + 1/R2 + …
Two in parallel
Req = R1R2 / (R1 + R2)
Ohm's law
V = I·R
Power
P = V·I = I²R = V²/R

Method

  1. Start at the end of the network furthest from the terminals.
  2. Combine resistors in series by adding them, and resistors in parallel with 1/R = 1/R₁ + 1/R₂ + …
  3. Redraw the circuit after each step.
  4. Repeat until one resistor is left between the terminals.

DC-DC converters

Buck
Vo = D·Vin
Boost
Vo = Vin/(1 − D)
Inverting buck-boost
|Vo| = Vin·D/(1 − D)
Ideal power balance
VinIin = VoIo
Inductor ripple
ΔIL = VL,on·D/(L·f); buck Vin − Vo, boost and buck-boost Vin
Average inductor current
buck Io; boost and buck-boost Io/(1 − D)
Output ripple
buck ΔIL/(8fC); boost and buck-boost Io·D/(fC)
CCM boundary
buck (1 − D)R/(2f); boost D(1 − D)²R/(2f); buck-boost (1 − D)²R/(2f)

Method

  1. Identify the converter (buck, boost or buck-boost) and the duty cycle D from the voltage ratio.
  2. Use volt-second balance on the inductor: the average inductor voltage over a period is zero.
  3. Find the inductor voltage while the switch is on, then ΔIL = VL·D/(L·f).
  4. For the output ripple, find the charge that flows in and out of the capacitor; for the CCM boundary, set the average inductor current equal to ΔIL/2.

Wheatstone bridge & strain gauges

Divider voltages
Va = VsR2/(R1 + R2), Vb = VsR4/(R3 + R4)
Output
Vab = Va − Vb
Balance
R1/R2 = R3/R4
Slide-wire bridge
R/Rx = l/(100 − l)
Thévenin resistance
Rth = R1∥R2 + R3∥R4
Gauge factor
ΔR/R = GF·ε
Bridge output
quarter Vs·GF·ε/4, half Vs·GF·ε/2, full Vs·GF·ε
Small change, one arm
Vab ≈ Vs·ΔR/(4R)
Stress
σ = E·ε

Method

  1. Treat the bridge as two voltage dividers across the same supply.
  2. For balance, set R₁/R₂ = R₃/R₄ and solve for the unknown resistor.
  3. For an unbalanced bridge, find Va and Vb from the dividers and subtract; use the Thévenin equivalent when a meter loads the output.
  4. For strain gauges, convert strain to ΔR/R = GF·ε and use Vs·GF·ε/4, /2 or ×1 for a quarter, half or full bridge.

Digital logic: gates, K-maps & flip-flops

Basic gates
A·B, A + B, A′, (A·B)′, (A + B)′, A ⊕ B
Boolean rules
X + X′ = 1, X·X′ = 0, X + XY = X, XY + XY′ = X
De Morgan
(X·Y)′ = X′ + Y′, (X + Y)′ = X′·Y′
Karnaugh map order
00, 01, 11, 10 (Gray code)
Group of 2ᵏ cells
loses k variables
4-to-1 multiplexer
F = A′B′I0 + A′BI1 + AB′I2 + ABI3
Flip-flops
D: Q⁺ = D, T: Q⁺ = T ⊕ Q, JK: Q⁺ = JQ′ + K′Q
Counters
n-bit: 2ⁿ states; mod-N: smallest n with 2ⁿ ≥ N; fout = fclk/N
Ripple counter
fmax = 1/(n·tpd)
Ring and Johnson counters
n and 2n states

Method

  1. For a circuit, work from the inputs to the output one gate at a time and write the value on every wire, or write its expression and fill in the truth table.
  2. For simplification, put the 1s (and the don’t-cares as X) into a Karnaugh map with Gray-code rows and columns: 00, 01, 11, 10.
  3. Cover the 1s with as few and as large groups of 1, 2, 4, 8 or 16 cells as possible, wrapping round the edges; each group is one product term made of the variables that stay constant. Group the 0s for the POS form.
  4. For flip-flops and counters, read the inputs at each active clock edge, write the state after every edge, and remember that an n-bit counter wraps round after 2ⁿ states.

2Practice problems

1.Diodes & transistorsMedium
RC​ = 4.7 kΩβ = 100IC​ = ?RE​ = 680 ΩVCC​ = 12 VR1​ = 68 kΩR2​ = 10 kΩ

An NPN transistor with β = 100 has voltage-divider bias from VCC = 12 V: R₁ = 68 kΩ from VCC to the base and R₂ = 10 kΩ from the base to ground. The collector resistor is RC = 4.7 kΩ and the emitter resistor is RE = 680 Ω. Take VBE = 0.7 V and use the Thévenin equivalent of the divider (do not neglect the base current). Find the collector current IC in mA.

VCC = 12 VR1 = 68 kΩR2 = 10 kΩRC = 4.7 kΩRE = 680 Ωβ = 100
IC = mA
2.Diodes & transistorsHard
V (V)I (mA)0.61254.55Q = ?

A diode is modelled as 0.6 V in series with 25 Ω (it conducts above 0.6 V). It is in series with a 220 Ω resistor across a 12 V supply. Find the operating current ID where the diode line meets the load line.

Vs = 12 VR = 220 ΩV0 = 0.6 Vrd = 25 Ω
ID = mA
3.Op-amp circuitsMedium
−+Vout​Rf​ = 100 kΩR1​ = 22 kΩVin​ = 0.5 VRa​ = 47 kΩRb​ = 22 kΩ

The op-amp is ideal and runs from ±15 V supplies. Find the output voltage Vout.

Vin = 0.5 VRa = 47 kΩRb = 22 kΩR1 = 22 kΩRf = 100 kΩ
Vout = V
4.Op-amp circuitsHard
−+Vout​Rf​ = 10 kΩV1​ = 1.2 VR1​ = 47 kΩV2​ = −1.3 VR2​ = 2 kΩIf​

The summing amplifier uses an ideal op-amp with ±15 V supplies. Find the current If through the feedback resistor, flowing towards the output.

V1 = 1.2 VV2 = −1.3 VR1 = 47 kΩR2 = 2 kΩRf = 10 kΩ
If = mA
5.RC & RL transientsMedium
+−Vs​24 Vt = 0R1​ = 6.8 kΩR2​ = 3.3 kΩC100 µF+−vC​

The source Vₛ charges the capacitor through R₁, and R₂ is connected in parallel with C. The capacitor is uncharged when the switch closes at t = 0. Find the time constant τ of the circuit after the switch closes.

Vs = 24 VR1 = 6.8 kΩR2 = 3.3 kΩC = 100 µF
τ = ms
6.RC & RL transientsHard
+−Vs​24 Vopens at t = 0R1​ = 3.3 kΩR2​ = 2.2 kΩi2​C100 µF+−vC​

The switch has been closed for a long time, so the circuit is in steady state. At t = 0 the switch opens. Find the current i2 through R2 at t = 300 ms.

Vs = 24 VR1 = 3.3 kΩR2 = 2.2 kΩC = 100 µFt = 300 ms
i2 = mA
7.Series & parallel resistorsMedium
R1​ = 8 ΩR3​ = 20 Ω+−V1​12 VR2​3 ΩAR4​10 ΩB

Find the equivalent resistance Req seen by the source V1.

V1 = 12 VR1 = 8 ΩR2 = 3 ΩR3 = 20 ΩR4 = 10 Ω
Req = Ω
8.Series & parallel resistorsHard
R1​ = 2 ΩR3​ = 3 ΩR5​ = 4 Ω+−V1​9 VR2​30 ΩIR2​AR4​5 ΩBR6​6 Ω

Find the current IR2 through R2.

V1 = 9 VR1 = 2 ΩR2 = 30 ΩR3 = 3 ΩR4 = 5 ΩR5 = 4 ΩR6 = 6 Ω
IR2 = A
9.DC-DC convertersMedium
tiL​Imax​ = ?Imin​Io​DTT2T

A buck converter turns 24 V into 16.8 V for a 4 Ω load. It switches at 250 kHz with L = 47 µH. Find the peak inductor current Imax.

Vin​ = 24 VVo​ = 16.8 Vf = 250 kHzL = 47 µHR = 4 Ω
Imax = A
10.DC-DC convertersHard
+−48 VSL = 220 µHC = ?R+−33.6 V

A buck converter turns 48 V into 33.6 V at 20 kHz with L = 220 µH. Find the output capacitance C that limits the peak-to-peak output ripple to 20 mV.

Vin​ = 48 VVo​ = 33.6 Vf = 20 kHzL = 220 µHΔVo = 20 mV
C = µF
11.Wheatstone bridge & strain gaugesMedium
+−12 VR1​ = 80 ΩR2​ = 800 ΩR3​ = 50 ΩR4​ = 300 Ωab+−Rth​ = ?

Find the Thévenin resistance Rth of the bridge shown, seen from the output terminals a and b.

Vs = 12 VR1 = 80 ΩR2 = 800 ΩR3 = 50 ΩR4 = 300 Ω
Rth = Ω
12.Wheatstone bridge & strain gaugesHard
+−5 V1000 Ω − ΔR1000 Ω + ΔR1000 Ω + ΔR1000 Ω − ΔRab+−Vo​ = ?

A load cell (a full bridge of strain gauges) has a rated output of 3 mV/V at its rated load of 200 kg. It is excited with 5 V. Find its output Vo under a load of 160 kg.

3 mV/VFrated = 200 kgVs = 5 VF = 160 kg
Vo = mV
13.Digital logic: gates, K-maps & flip-flopsMedium
ABCD00011110000111101111

In this Karnaugh map exactly one 1 has no neighbouring 1, so it stays a group of one cell (a full minterm of four literals) in the minimal SOP form. Neighbours across the map edges count. Click that cell.

F = Σm(2, 6, 7, 13)
  1. 1AB = 00, CD = 00
  2. 2AB = 00, CD = 01
  3. 3AB = 00, CD = 11
  4. 4AB = 00, CD = 10
  5. 5AB = 01, CD = 00
  6. 6AB = 01, CD = 01
  7. 7AB = 01, CD = 11
  8. 8AB = 01, CD = 10
  9. 9AB = 11, CD = 00
  10. 10AB = 11, CD = 01
  11. 11AB = 11, CD = 11
  12. 12AB = 11, CD = 10
  13. 13AB = 10, CD = 00
  14. 14AB = 10, CD = 01
  15. 15AB = 10, CD = 11
  16. 16AB = 10, CD = 10
14.Digital logic: gates, K-maps & flip-flopsHard
ABCD0001111000011110000103X2040507160120131151140819X11010

For F(A, B, C, D) = Σm(6, 9, 14, 15) + d(2, 11), where d marks the don't-care conditions, find the number N of essential prime implicants.

F(A, B, C, D) = Σm(6, 9, 14, 15) + d(2, 11)
N =

3Solutions

1.Diodes & transistors

Answer: IC = 1.083 mA

BJT bias point: in the active region VBE = 0.7 V, IC = β·IB and IE = (β + 1)·IB. Find IB from the base loop with KVL, then IC, then VCE from the collector–emitter loop. A voltage divider at the base is replaced by its Thévenin equivalent VTH = VCC·R₂/(R₁ + R₂), RTH = R₁∥R₂; an emitter resistor appears (β + 1) times larger in the base loop.

Thévenin equivalent of the divider

VTH = 12·10/(68 + 10) = 1.538 V
RTH = 68·10/(68 + 10) = 8.718 kΩ

Base current

KVL around the base loop; the emitter current is (β + 1)·IB.

IB = (1.538 − 0.7)/(8.718 + 101·0.68) = 10.83 µA

Collector current

IC = 100·10.83 µA = 1.083 mA
IE = 101·10.83 µA = 1.094 mA

Answer

IC = 1.083 mA
2.Diodes & transistors

Answer: ID = 46.53 mA

LED and diode circuits: a forward-biased LED drops roughly its forward voltage VF (about 2 V for red, 3 V for blue or white), whatever the current. A series resistor sets the current: R = (Vs − n·VF)/I for n LEDs in series. With a more exact diode model V = V₀ + I·rd, the operating point is where the diode line meets the load line I = (Vs − V)/R, so I = (Vs − V₀)/(R + rd).

Combine the two equations

12 = 0.6 + I·(220 + 25)

Operating current

ID = 11.4/245 = 46.53 mA
VD = 0.6 + 0.04653·25 = 1.763 V

Answer

ID = 46.53 mA
3.Op-amp circuits

Answer: Vout = 0.8841 V

Ideal op-amp rules: with negative feedback, the op-amp drives its output so that its two inputs sit at the same voltage (V₋ = V₊), and no current flows into either input. Writing KCL at the inverting input with these two facts gives the output.

Voltage at the + input

V₊ = Vin·Rb/(Ra + Rb) = 0.5·22/(47 + 22) = 0.1594 V

Non-inverting gain

V₋ = V₊, and the current through R₁ also flows through Rf.

Vout = V₊·(1 + Rf/R1) = 0.1594·(1 + 100/22) = 0.8841 V

Answer

Vout = 0.8841 V
4.Op-amp circuits

Answer: If = −0.6245 mA

Ideal op-amp rules: with negative feedback, the op-amp drives its output so that its two inputs sit at the same voltage (V₋ = V₊), and no current flows into either input. Writing KCL at the inverting input with these two facts gives the output.

Input currents

V₋ = 0, so each input resistor has its full input voltage across it.

I1 = V1/R1 = 1.2/47 = 0.02553 mA
I2 = V2/R2 = −1.3/2 = −0.65 mA
If = I1 + I2 = −0.6245 mA

Answer

If = −0.6245 mA
5.RC & RL transients

Answer: τ = 222.2 ms

First-order transients: in a circuit with one capacitor or one inductor, every voltage and current moves exponentially from its initial value to its final value: x(t) = x(∞) + [x(0) − x(∞)]·e−t/τ, with τ = RC or τ = L/R. After about 5τ the circuit has settled.

Thévenin equivalent seen by the capacitor

Short the source to find Rth; open the capacitor to find the voltage it will settle at.

Rth = R1 ∥ R2 = 6.8·3.3/(6.8 + 3.3) = 2.222 kΩ
vC(∞) = 24·3.3/(6.8 + 3.3) = 7.842 V

Time constant

τ = Rth·C = 2.222·100 = 222.2 ms

Answer

τ = 222.2 ms
6.RC & RL transients

Answer: i2 = 1.116 mA

First-order transients: in a circuit with one capacitor or one inductor, every voltage and current moves exponentially from its initial value to its final value: x(t) = x(∞) + [x(0) − x(∞)]·e−t/τ, with τ = RC or τ = L/R. After about 5τ the circuit has settled.

Initial capacitor voltage

In steady state the capacitor is an open circuit, so R₁ and R₂ form a voltage divider. The capacitor voltage cannot jump when the switch opens.

vC(0) = 24·2.2/(3.3 + 2.2) = 9.6 V

Time constant after the switch opens

τ = R2·C = 2.2·100 = 220 ms

Discharge

vC(t) = 9.6·e−300/220 = 2.455 V
i2 = vC/R2 = 2.455/2.2 = 1.116 mA

Answer

i2 = 1.116 mA
7.Series & parallel resistors

Answer: Req = 10.73 Ω

Series and parallel resistors: in series the same current flows through each resistor and R = R₁ + R₂ + …. In parallel each resistor has the same voltage and 1/R = 1/R₁ + 1/R₂ + …. A ladder network is reduced one pair at a time until a single equivalent resistance remains.

R1​ = 8 ΩR3​ = 20 Ω+−V1​12 VR2​3 ΩAR4​10 ΩB

Combine resistors from the far end

Start at the end farthest from the source and work back towards it. Resistors carrying the same current are in series; resistors across the same two nodes are in parallel.

R3 + R4 = 20 + 10 = 30 Ω
R2 ∥ 30 = 3·30/(3+30) = 2.727 Ω
Req = R1 + 2.727 = 8 + 2.727 = 10.73 Ω

Answer

Req = 10.73 Ω
8.Series & parallel resistors

Answer: IR2 = 0.217 A

Series and parallel resistors: in series the same current flows through each resistor and R = R₁ + R₂ + …. In parallel each resistor has the same voltage and 1/R = 1/R₁ + 1/R₂ + …. A ladder network is reduced one pair at a time until a single equivalent resistance remains.

R1​ = 2 ΩR3​ = 3 ΩR5​ = 4 Ω+−V1​9 VR2​30 ΩAR4​5 ΩBR6​6 Ω

Combine resistors from the far end

Start at the end farthest from the source and work back towards it. Resistors carrying the same current are in series; resistors across the same two nodes are in parallel.

R5 + R6 = 4 + 6 = 10 Ω
R4 ∥ 10 = 3.333 Ω
R3 + 3.333 = 6.333 Ω
R2 ∥ 6.333 = 5.229 Ω
Req = R1 + 5.229 = 2 + 5.229 = 7.229 Ω

Current from the source

The source sees only Req, so Ohm’s law gives the current it delivers. That current flows through R₁.

IR1 = V1/Req = 9/7.229 = 1.245 A

Current through R₂

Subtract the drop across R₁ to get the voltage at node A, which is the voltage across R₂.

VA = V1 − IR1·R1 = 9 − 1.245·2 = 6.51 V
IR2 = VA/R2 = 6.51/30 = 0.217 A

Answer

IR2 = 0.217 A
9.DC-DC converters

Answer: Imax = 4.414 A

DC-DC converters: a switch S turns on for the fraction D of each period T = 1/f. In steady state the average inductor voltage is zero (volt-second balance), which gives the ideal conversion ratios in continuous conduction: buck Vo = D·Vin, boost Vo = Vin/(1 − D), inverting buck-boost |Vo| = Vin·D/(1 − D). An ideal converter keeps the power: Vin·Iin = Vo·Io. While S is on the inductor current rises by ΔIL = VL·D·T/L, with VL = Vin − Vo for the buck and Vin for the boost and buck-boost. The output ripple is ΔVo = ΔIL/(8fC) for the buck and Io·D/(fC) for the boost and buck-boost. The inductor current just touches zero (the CCM boundary) when the average inductor current equals ΔIL/2.

Duty cycle

D = 16.8/24 = 0.7

Average and ripple current

Io = 16.8/4 = 4.2 A
ΔIL = VL·D/(L·f) = 7.2·0.7/(47·10⁻⁶·250·10³) = 0.4289 A

Peak current

Imax = 4.2 + 0.4289/2 = 4.414 A

Answer

Imax = 4.414 A
10.DC-DC converters

Answer: C = 715.9 µF

DC-DC converters: a switch S turns on for the fraction D of each period T = 1/f. In steady state the average inductor voltage is zero (volt-second balance), which gives the ideal conversion ratios in continuous conduction: buck Vo = D·Vin, boost Vo = Vin/(1 − D), inverting buck-boost |Vo| = Vin·D/(1 − D). An ideal converter keeps the power: Vin·Iin = Vo·Io. While S is on the inductor current rises by ΔIL = VL·D·T/L, with VL = Vin − Vo for the buck and Vin for the boost and buck-boost. The output ripple is ΔVo = ΔIL/(8fC) for the buck and Io·D/(fC) for the boost and buck-boost. The inductor current just touches zero (the CCM boundary) when the average inductor current equals ΔIL/2.

Duty cycle

D = 33.6/48 = 0.7

Inductor ripple current

ΔIL = (48 − 33.6)·0.7/(220·10⁻⁶·20·10³) = 2.291 A

Capacitance

C = 2.291/(8·20·10³·20·10⁻³) = 715.9 µF

Answer

C = 715.9 µF
11.Wheatstone bridge & strain gauges

Answer: Rth = 115.6 Ω

Wheatstone bridge: two voltage dividers share one supply Vs. The left divider R1–R2 gives Va = Vs·R2/(R1 + R2) and the right divider R3–R4 gives Vb = Vs·R4/(R3 + R4); the output is Vab = Va − Vb. The bridge is balanced (Vab = 0, no current in the meter) when R1/R2 = R3/R4, that is R1·R4 = R2·R3. Seen from the output, the bridge is a Thévenin source with Rth = R1∥R2 + R3∥R4.

Supply shorted

R₁∥R₂ = 80·800/880 = 72.73 Ω
R₃∥R₄ = 50·300/350 = 42.86 Ω

Thévenin resistance

Rth = 115.6 Ω

Answer

Rth = 115.6 Ω
12.Wheatstone bridge & strain gauges

Answer: Vo = 12 mV

Strain gauges: a gauge changes its resistance with strain: ΔR/R = GF·ε, where the gauge factor GF is about 2 for metal foil. In a bridge with all arms equal to R, one active gauge (quarter bridge) gives Vo ≈ Vs·GF·ε/4. Two active gauges with opposite strains in adjacent arms (half bridge) give Vs·GF·ε/2, and four (full bridge) give Vs·GF·ε. Stress follows from Hooke’s law, σ = E·ε. Load cells state their sensitivity in mV/V: the output at full load per volt of excitation.

Full-scale output

3·5 = 15 mV

Output at this load

Vo = 15·160/200 = 12 mV

Answer

Vo = 12 mV
13.Digital logic: gates, K-maps & flip-flops

Answer: AB = 11, CD = 01

Karnaugh maps: the cells are ordered in Gray code (00, 01, 11, 10), so neighbouring cells, including the ones across the edges, differ in exactly one variable. Group the 1s in rectangles of 1, 2, 4, 8 or 16 cells, as large as possible and as few as possible, until every 1 is covered. Each group is one product term: the variables that stay constant inside it. A group of 2ᵏ cells loses k variables. Don't-cares (X) may be used to make groups bigger but never have to be covered. Grouping the 0s instead gives the minimal POS form.

Neighbours of each 1

A 1 with a neighbouring 1 can join a group of two or more.

m13: m12, m15, m9, m5 → 0
ABCD00011110000111101111

The isolated 1

m13 = ABC′D → AB = 11, CD = 01

Answer

AB = 11, CD = 01
14.Digital logic: gates, K-maps & flip-flops

Answer: N = 1

Karnaugh maps: the cells are ordered in Gray code (00, 01, 11, 10), so neighbouring cells, including the ones across the edges, differ in exactly one variable. Group the 1s in rectangles of 1, 2, 4, 8 or 16 cells, as large as possible and as few as possible, until every 1 is covered. Each group is one product term: the variables that stay constant inside it. A group of 2ᵏ cells loses k variables. Don't-cares (X) may be used to make groups bigger but never have to be covered. Grouping the 0s instead gives the minimal POS form.

Prime implicants

The largest groups that can be formed from 1s and Xs.

BCD′, A′CD′, ACD, AB′D, ABC
ABCD0001111000011110000103X2040507160120131151140819X11010

Essential prime implicants

AB′D
N = 1

Answer

N = 1

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