Electronics 1: cram pack

Formula sheets, the key method steps for every topic and 14 practice problems, with full solutions at the back.

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1Formulas and methods

Diodes & transistors

Diode (constant drop)
VD = 0.7 V when conducting
Active region
VBE = 0.7 V, IC = β·IB, IE = (β + 1)·IB
Fixed bias
IB = (VCC − 0.7)/RB
Divider bias
IB = (VTH − 0.7)/(RTH + (β + 1)RE)
Thévenin of the divider
VTH = VCC·R2/(R1 + R2), RTH = R1∥R2
Collector loop
VCE = VCC − ICRC − IERE
Saturation
IC(sat) = (VCC − VCE(sat))/RC, IB ≥ IC(sat)/β

Op-amp circuits

Inverting amplifier
Vout = −(Rf/Rin)·Vin
Non-inverting amplifier
Vout = (1 + Rf/R1)·Vin
Summing amplifier
Vout = −Rf(V1/R1 + V2/R2)
Ideal op-amp
V+ = V−, Iin = 0

RC & RL transients

Time constant
τ = RC | τ = L/R
Response
x(t) = x(∞) + [x(0) − x(∞)]·e−t/τ
Capacitor at DC
open circuit; vC cannot jump
Inductor at DC
short circuit; iL cannot jump
Settled
t ≈ 5τ

Method

  1. Find the initial value just after switching: a capacitor voltage and an inductor current cannot jump.
  2. Find the final value long after switching: a capacitor acts as an open circuit, an inductor as a short circuit.
  3. Find the time constant: τ = RC or τ = L/R, using the resistance seen by the capacitor or inductor.
  4. Use x(t) = x(∞) + [x(0) − x(∞)]·e−t/τ.

Series & parallel resistors

Resistors in series
Req = R1 + R2 + …
Resistors in parallel
1/Req = 1/R1 + 1/R2 + …
Two in parallel
Req = R1R2 / (R1 + R2)
Ohm's law
V = I·R
Power
P = V·I = I²R = V²/R

Method

  1. Start at the end of the network furthest from the terminals.
  2. Combine resistors in series by adding them, and resistors in parallel with 1/R = 1/R₁ + 1/R₂ + …
  3. Redraw the circuit after each step.
  4. Repeat until one resistor is left between the terminals.

DC-DC converters

Buck
Vo = D·Vin
Boost
Vo = Vin/(1 − D)
Inverting buck-boost
|Vo| = Vin·D/(1 − D)
Ideal power balance
VinIin = VoIo
Inductor ripple
ΔIL = VL,on·D/(L·f); buck Vin − Vo, boost and buck-boost Vin
Average inductor current
buck Io; boost and buck-boost Io/(1 − D)
Output ripple
buck ΔIL/(8fC); boost and buck-boost Io·D/(fC)
CCM boundary
buck (1 − D)R/(2f); boost D(1 − D)²R/(2f); buck-boost (1 − D)²R/(2f)

Method

  1. Identify the converter (buck, boost or buck-boost) and the duty cycle D from the voltage ratio.
  2. Use volt-second balance on the inductor: the average inductor voltage over a period is zero.
  3. Find the inductor voltage while the switch is on, then ΔIL = VL·D/(L·f).
  4. For the output ripple, find the charge that flows in and out of the capacitor; for the CCM boundary, set the average inductor current equal to ΔIL/2.

Wheatstone bridge & strain gauges

Divider voltages
Va = VsR2/(R1 + R2), Vb = VsR4/(R3 + R4)
Output
Vab = Va − Vb
Balance
R1/R2 = R3/R4
Slide-wire bridge
R/Rx = l/(100 − l)
Thévenin resistance
Rth = R1∥R2 + R3∥R4
Gauge factor
ΔR/R = GF·ε
Bridge output
quarter Vs·GF·ε/4, half Vs·GF·ε/2, full Vs·GF·ε
Small change, one arm
Vab ≈ Vs·ΔR/(4R)
Stress
σ = E·ε

Method

  1. Treat the bridge as two voltage dividers across the same supply.
  2. For balance, set R₁/R₂ = R₃/R₄ and solve for the unknown resistor.
  3. For an unbalanced bridge, find Va and Vb from the dividers and subtract; use the Thévenin equivalent when a meter loads the output.
  4. For strain gauges, convert strain to ΔR/R = GF·ε and use Vs·GF·ε/4, /2 or ×1 for a quarter, half or full bridge.

Digital logic: gates, K-maps & flip-flops

Basic gates
A·B, A + B, A′, (A·B)′, (A + B)′, A ⊕ B
Boolean rules
X + X′ = 1, X·X′ = 0, X + XY = X, XY + XY′ = X
De Morgan
(X·Y)′ = X′ + Y′, (X + Y)′ = X′·Y′
Karnaugh map order
00, 01, 11, 10 (Gray code)
Group of 2ᵏ cells
loses k variables
4-to-1 multiplexer
F = A′B′I0 + A′BI1 + AB′I2 + ABI3
Flip-flops
D: Q⁺ = D, T: Q⁺ = T ⊕ Q, JK: Q⁺ = JQ′ + K′Q
Counters
n-bit: 2ⁿ states; mod-N: smallest n with 2ⁿ ≥ N; fout = fclk/N
Ripple counter
fmax = 1/(n·tpd)
Ring and Johnson counters
n and 2n states

Method

  1. For a circuit, work from the inputs to the output one gate at a time and write the value on every wire, or write its expression and fill in the truth table.
  2. For simplification, put the 1s (and the don’t-cares as X) into a Karnaugh map with Gray-code rows and columns: 00, 01, 11, 10.
  3. Cover the 1s with as few and as large groups of 1, 2, 4, 8 or 16 cells as possible, wrapping round the edges; each group is one product term made of the variables that stay constant. Group the 0s for the POS form.
  4. For flip-flops and counters, read the inputs at each active clock edge, write the state after every edge, and remember that an n-bit counter wraps round after 2ⁿ states.

2Practice problems

1.Diodes & transistorsMedium
+−24 V220 Ω12 V2200 ΩIZ​ = ?

A 12 V Zener regulator is fed from 24 V through 220 Ω and supplies a 2200 Ω load. Find the Zener current IZ.

Vin = 24 VVZ = 12 VR = 220 ΩRL = 2200 Ω
IZ = mA
2.Diodes & transistorsHard
+−≤ 15 V150 Ω9.1 V

A 9.1 V Zener regulator has a 150 Ω series resistor. The input can rise to 15 V, and the load may be disconnected. Find the largest power PZ,max the Zener must dissipate.

Vin,max = 15 VVZ = 9.1 VR = 150 Ω
PZ,max = mW
3.Op-amp circuitsMedium
−+Vout​Rf​ = 47 kΩR1​ = 47 kΩVin​ = 5 VRa​ = 2 kΩRb​ = 1 kΩ

The op-amp is ideal and runs from ±15 V supplies. Find the output voltage Vout.

Vin = 5 VRa = 2 kΩRb = 1 kΩR1 = 47 kΩRf = 47 kΩ
Vout = V
4.Op-amp circuitsHard
−+Vout​R2​ = 4.7 kΩV1​ = −1.5 VR1​ = 10 kΩV2​ = −1.9 VR3​ = 22 kΩR4​ = 1 kΩ

The op-amp is ideal and runs from ±15 V supplies. The resistor ratios are not matched. Find the output voltage Vout.

V1 = −1.5 VV2 = −1.9 VR1 = 10 kΩR2 = 4.7 kΩR3 = 22 kΩR4 = 1 kΩ
Vout = V
5.RC & RL transientsMedium
+−Vs​5 Vt = 0R = 15 ΩL220 mHi(t)

The inductor carries no current before the switch closes at t = 0. Find the voltage vL across the inductor at t = 20 ms.

Vs = 5 VR = 15 ΩL = 220 mHt = 20 ms
vL = V
6.RC & RL transientsHard
+−Vs​5 Vt = 0R = 2.2 kΩC?+−vC​

A timer starts charging an uncharged capacitor through a resistor from a 5 V supply at t = 0. It must trigger when the capacitor voltage reaches 2.5 V, exactly 1000 ms after the start. With R = 2.2 kΩ, find the capacitance C needed.

Vs = 5 VVth = 2.5 VT = 1000 msR = 2.2 kΩ
C = µF
7.Series & parallel resistorsMedium
R1​ = 20 ΩR3​ = 4 Ω+−V1​18 VR2​8 ΩAR4​15 ΩB

Find the equivalent resistance Req seen by the source V1.

V1 = 18 VR1 = 20 ΩR2 = 8 ΩR3 = 4 ΩR4 = 15 Ω
Req = Ω
8.Series & parallel resistorsHard
R1​ = 10 ΩR3​ = 12 ΩR5​ = 2 Ω+−V1​12 VR2​6 ΩAR4​30 ΩBR6​6 Ω

Find the equivalent resistance Req seen by the source V1.

V1 = 12 VR1 = 10 ΩR2 = 6 ΩR3 = 12 ΩR4 = 30 ΩR5 = 2 ΩR6 = 6 Ω
Req = Ω
9.DC-DC convertersMedium
tiL​Imax​Imin​ΔI = ?DTT2T

An ideal inverting buck-boost converter turns 12 V into −8 V at 25 kHz with L = 330 µH. Find the peak-to-peak inductor ripple current ΔIL.

Vin​ = 12 VVo​ = −8 Vf = 25 kHzL = 330 µH
ΔIL = A
10.DC-DC convertersHard
tiL​Imax​IL​DTT2T

An ideal inverting buck-boost converter turns 9 V into −9 V for a 12 Ω load at 50 kHz. Find the smallest inductance Lcrit for continuous conduction.

Vin​ = 9 VVo​ = −9 Vf = 50 kHzR = 12 Ω
Lcrit = µH
11.Wheatstone bridge & strain gaugesMedium
+−15 V1000 Ω1000 Ω + ΔR1000 Ω1000 Ωab+−Vab​ = ?

A bridge has four 1000 Ω arms and Vs = 15 V. The sensor R₂ increases by ΔR = 2 Ω. Using the small-change approximation, find the output Vab in mV.

Vs = 15 VR = 1000 ΩΔR = 2 Ω
Vab = mV
12.Wheatstone bridge & strain gaugesHard
+−3 V1000 Ω1000 Ω + ΔR1000 Ω1000 Ωab+−Vo​ = ?

A bridge with 1000 Ω arms is excited with 3 V and has one active gauge (quarter bridge). The gauge factor is 2 and the strain is 1000 µε. Find the bridge output Vo in mV.

Vs = 3 VGF = 2ε = 1000 µε
Vo = mV
13.Digital logic: gates, K-maps & flip-flopsMedium
ABC000111100101324576

Simplify F = ABC + A′BC + B′C + B′C′ to its minimal sum-of-products form. How many literals L does the simplified expression contain?

F = ABC + A′BC + B′C + B′C′
L =
14.Digital logic: gates, K-maps & flip-flopsHard
DQ3​Q3​DQ2​Q2​DQ1​Q1​DQ0​Q0​CLKJOHNSON

A 4-bit Johnson counter Q₃Q₂Q₁Q₀ starts at 0000. At every clock edge the bits shift one place to the right (Q₃ → Q₂ → Q₁ → Q₀) and Q₃ receives the inverse of Q₀. Give the state Q = Q₃Q₂Q₁Q₀ as a decimal number after 9 clock edges.

Q₃Q₂Q₁Q₀ = 00009
Q =

3Solutions

1.Diodes & transistors

Answer: IZ = 49.09 mA

Zener regulator: a reverse-biased Zener diode holds its voltage VZ while its current stays above a minimum IZ,min. The series resistor R takes the difference between input and output: IR = (Vin − VZ)/R. That current splits between the load, IL = VZ/RL, and the Zener: IZ = IR − IL. Design for the worst cases: the lowest input with the largest load must still leave IZ,min, and the highest input with no load gives the largest Zener power PZ = VZ·IZ.

Resistor current

IR = 12/220 = 54.55 mA

Load current

IL = 12/2200 = 5.455 mA

Zener current

IZ = 54.55 − 5.455 = 49.09 mA

Answer

IZ = 49.09 mA
2.Diodes & transistors

Answer: PZ,max = 357.9 mW

Zener regulator: a reverse-biased Zener diode holds its voltage VZ while its current stays above a minimum IZ,min. The series resistor R takes the difference between input and output: IR = (Vin − VZ)/R. That current splits between the load, IL = VZ/RL, and the Zener: IZ = IR − IL. Design for the worst cases: the lowest input with the largest load must still leave IZ,min, and the highest input with no load gives the largest Zener power PZ = VZ·IZ.

Worst-case Zener current

IZ = 5.9/150 = 39.33 mA

Zener power

PZ = 9.1·39.33 = 357.9 mW

Answer

PZ,max = 357.9 mW
3.Op-amp circuits

Answer: Vout = 3.333 V

Ideal op-amp rules: with negative feedback, the op-amp drives its output so that its two inputs sit at the same voltage (V₋ = V₊), and no current flows into either input. Writing KCL at the inverting input with these two facts gives the output.

Voltage at the + input

V₊ = Vin·Rb/(Ra + Rb) = 5·1/(2 + 1) = 1.667 V

Non-inverting gain

V₋ = V₊, and the current through R₁ also flows through Rf.

Vout = V₊·(1 + Rf/R1) = 1.667·(1 + 47/47) = 3.333 V

Answer

Vout = 3.333 V
4.Op-amp circuits

Answer: Vout = 0.5836 V

Ideal op-amp rules: with negative feedback, the op-amp drives its output so that its two inputs sit at the same voltage (V₋ = V₊), and no current flows into either input. Writing KCL at the inverting input with these two facts gives the output.

Voltage at the + input

V₊ = V2·R4/(R3 + R4) = −1.9·1/(22 + 1) = −0.08261 V

Superpose the two inputs

With V₂ = 0, V₁ sees an inverting amplifier. With V₁ = 0, V₊ is amplified by the non-inverting gain 1 + R₂/R₁.

Vout = −(4.7/10)·(−1.5) + (1 + 4.7/10)·(−0.08261) = 0.705 + (−0.1214) = 0.5836 V

Answer

Vout = 0.5836 V
5.RC & RL transients

Answer: vL = 1.279 V

First-order transients: in a circuit with one capacitor or one inductor, every voltage and current moves exponentially from its initial value to its final value: x(t) = x(∞) + [x(0) − x(∞)]·e−t/τ, with τ = RC or τ = L/R. After about 5τ the circuit has settled.

Time constant and final current

Long after the switch closes the inductor behaves like a short circuit, so the final current is set by R alone.

τ = L/R = 220 mH / 15 Ω = 14.67 ms
i(∞) = Vs/R = 5/15 = 0.3333 A

Inductor voltage

At t = 0 the whole supply voltage appears across the inductor; it then decays to zero.

vL(t) = Vs·e−t/τ = 5·e−20/14.67 = 1.279 V

Answer

vL = 1.279 V
6.RC & RL transients

Answer: C = 655.8 µF

First-order transients: in a circuit with one capacitor or one inductor, every voltage and current moves exponentially from its initial value to its final value: x(t) = x(∞) + [x(0) − x(∞)]·e−t/τ, with τ = RC or τ = L/R. After about 5τ the circuit has settled.

Required time constant

2.5 = 5·(1 − e−1000/τ) → τ = 1000/ln(5/(5 − 2.5))
τ = 1000/0.6931 = 1443 ms

Capacitance

kΩ times µF gives milliseconds.

C = τ/R = 1443/2.2 = 655.8 µF

Answer

C = 655.8 µF
7.Series & parallel resistors

Answer: Req = 25.63 Ω

Series and parallel resistors: in series the same current flows through each resistor and R = R₁ + R₂ + …. In parallel each resistor has the same voltage and 1/R = 1/R₁ + 1/R₂ + …. A ladder network is reduced one pair at a time until a single equivalent resistance remains.

R1​ = 20 ΩR3​ = 4 Ω+−V1​18 VR2​8 ΩAR4​15 ΩB

Combine resistors from the far end

Start at the end farthest from the source and work back towards it. Resistors carrying the same current are in series; resistors across the same two nodes are in parallel.

R3 + R4 = 4 + 15 = 19 Ω
R2 ∥ 19 = 8·19/(8+19) = 5.63 Ω
Req = R1 + 5.63 = 20 + 5.63 = 25.63 Ω

Answer

Req = 25.63 Ω
8.Series & parallel resistors

Answer: Req = 14.52 Ω

Series and parallel resistors: in series the same current flows through each resistor and R = R₁ + R₂ + …. In parallel each resistor has the same voltage and 1/R = 1/R₁ + 1/R₂ + …. A ladder network is reduced one pair at a time until a single equivalent resistance remains.

R1​ = 10 ΩR3​ = 12 ΩR5​ = 2 Ω+−V1​12 VR2​6 ΩAR4​30 ΩBR6​6 Ω

Combine resistors from the far end

Start at the end farthest from the source and work back towards it. Resistors carrying the same current are in series; resistors across the same two nodes are in parallel.

R5 + R6 = 2 + 6 = 8 Ω
R4 ∥ 8 = 6.316 Ω
R3 + 6.316 = 18.32 Ω
R2 ∥ 18.32 = 4.519 Ω
Req = R1 + 4.519 = 10 + 4.519 = 14.52 Ω

Answer

Req = 14.52 Ω
9.DC-DC converters

Answer: ΔIL = 0.5818 A

DC-DC converters: a switch S turns on for the fraction D of each period T = 1/f. In steady state the average inductor voltage is zero (volt-second balance), which gives the ideal conversion ratios in continuous conduction: buck Vo = D·Vin, boost Vo = Vin/(1 − D), inverting buck-boost |Vo| = Vin·D/(1 − D). An ideal converter keeps the power: Vin·Iin = Vo·Io. While S is on the inductor current rises by ΔIL = VL·D·T/L, with VL = Vin − Vo for the buck and Vin for the boost and buck-boost. The output ripple is ΔVo = ΔIL/(8fC) for the buck and Io·D/(fC) for the boost and buck-boost. The inductor current just touches zero (the CCM boundary) when the average inductor current equals ΔIL/2.

Duty cycle

D = 8/(12 + 8) = 0.4

Inductor voltage during the on-time

While S is on, the inductor sits directly across Vin.

VL = 12 V

Ripple current

ΔIL = VL·D/(L·f) = 12·0.4/(330·10⁻⁶·25·10³) = 0.5818 A

Answer

ΔIL = 0.5818 A
10.DC-DC converters

Answer: Lcrit = 30 µH

DC-DC converters: a switch S turns on for the fraction D of each period T = 1/f. In steady state the average inductor voltage is zero (volt-second balance), which gives the ideal conversion ratios in continuous conduction: buck Vo = D·Vin, boost Vo = Vin/(1 − D), inverting buck-boost |Vo| = Vin·D/(1 − D). An ideal converter keeps the power: Vin·Iin = Vo·Io. While S is on the inductor current rises by ΔIL = VL·D·T/L, with VL = Vin − Vo for the buck and Vin for the boost and buck-boost. The output ripple is ΔVo = ΔIL/(8fC) for the buck and Io·D/(fC) for the boost and buck-boost. The inductor current just touches zero (the CCM boundary) when the average inductor current equals ΔIL/2.

Duty cycle

D = 9/(9 + 9) = 0.5

Boundary condition

Set the average inductor current equal to half the ripple current and solve for L.

Lcrit = (1 − D)²·R/(2f)

Critical inductance

Lcrit = (1 − 0.5)²·12/(250·10³) = 30 µH

Answer

Lcrit = 30 µH
11.Wheatstone bridge & strain gauges

Answer: Vab = 7.5 mV

Wheatstone bridge: two voltage dividers share one supply Vs. The left divider R1–R2 gives Va = Vs·R2/(R1 + R2) and the right divider R3–R4 gives Vb = Vs·R4/(R3 + R4); the output is Vab = Va − Vb. The bridge is balanced (Vab = 0, no current in the meter) when R1/R2 = R3/R4, that is R1·R4 = R2·R3. Seen from the output, the bridge is a Thévenin source with Rth = R1∥R2 + R3∥R4.

Relative change

ΔR/R = 2/1000 = 0.002

Linearised output

Vab ≈ 15·0.002/4 = 7.5 mV

Answer

Vab = 7.5 mV

The exact value is 7.493 mV; the approximation is good while ΔR/R is small.

12.Wheatstone bridge & strain gauges

Answer: Vo = 1.5 mV

Strain gauges: a gauge changes its resistance with strain: ΔR/R = GF·ε, where the gauge factor GF is about 2 for metal foil. In a bridge with all arms equal to R, one active gauge (quarter bridge) gives Vo ≈ Vs·GF·ε/4. Two active gauges with opposite strains in adjacent arms (half bridge) give Vs·GF·ε/2, and four (full bridge) give Vs·GF·ε. Stress follows from Hooke’s law, σ = E·ε. Load cells state their sensitivity in mV/V: the output at full load per volt of excitation.

Relative resistance change

ΔR/R = 2·1000·10⁻⁶ = 0.002

Bridge output

Vo ≈ Vs·GF·ε/4 = 3·0.002/4 = 1.5 mV

Answer

Vo = 1.5 mV
13.Digital logic: gates, K-maps & flip-flops

Answer: L = 2

Boolean algebra: the rules that simplify expressions are X + X′ = 1 and X·X′ = 0, X + X = X, absorption X + X·Y = X, the combining rule X·Y + X·Y′ = X, X + X′Y = X + Y and the consensus theorem XY + X′Z + YZ = XY + X′Z. De Morgan's laws turn (X·Y)′ into X′ + Y′ and (X + Y)′ into X′·Y′. A Karnaugh map applies these rules graphically: every group of two neighbouring cells is one use of XY + XY′ = X.

Minterms of the expression

ABC → m(7)
A′BC → m(3)
B′C → m(1, 5)
B′C′ → m(0, 4)
ABC00011110011011130214151706

Group and read off

F = C + B′

Count the literals

L = 2

Answer

L = 2
14.Digital logic: gates, K-maps & flip-flops

Answer: Q = 8

Flip-flops and counters: a flip-flop changes only at the active clock edge. D copies its input (Q⁺ = D); T toggles when T = 1; JK holds for 00, resets for 01, sets for 10 and toggles for 11. An n-bit binary counter has 2ⁿ states and counts modulo 2ⁿ; a mod-N counter goes 0, 1, …, N − 1 and back to 0, and needs the smallest n with 2ⁿ ≥ N flip-flops. Each stage of a ripple counter halves the frequency, so the last output of a mod-N counter runs at fclk/N. A Johnson counter of n flip-flops has 2n states, a ring counter n.

State after every edge

0000 → 1000 → 1100 → 1110 → 1111 → 0111 → 0011 → 0001 → 0000 → 1000

Decimal value

1000₂ = 8

Answer

Q = 8

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