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1Formulas and methods
Wheatstone bridge & strain gauges
Divider voltages
Va = VsR2/(R1 + R2), Vb = VsR4/(R3 + R4)
Output
Vab = Va − Vb
Balance
R1/R2 = R3/R4
Slide-wire bridge
R/Rx = l/(100 − l)
Thévenin resistance
Rth = R1∥R2 + R3∥R4
Gauge factor
ΔR/R = GF·ε
Bridge output
quarter Vs·GF·ε/4, half Vs·GF·ε/2, full Vs·GF·ε
Small change, one arm
Vab ≈ Vs·ΔR/(4R)
Stress
σ = E·ε
Method
Treat the bridge as two voltage dividers across the same supply.
For balance, set R₁/R₂ = R₃/R₄ and solve for the unknown resistor.
For an unbalanced bridge, find Va and Vb from the dividers and subtract; use the Thévenin equivalent when a meter loads the output.
For strain gauges, convert strain to ΔR/R = GF·ε and use Vs·GF·ε/4, /2 or ×1 for a quarter, half or full bridge.
Data acquisition & sampling
Nyquist criterion
fs > 2·fmax, fN = fs/2
Alias frequency
fa = |f − k·fs|, k = round(f/fs)
Step size
1 LSB = VFSR/2ᴺ
Quantisation error (rounding)
±½ LSB
Truncating ADC code
D = ⌊Vin/LSB⌋
Bits for a resolution r
2ᴺ ≥ span/r
Ideal SQNR, full-scale sine
SQNR = 6.02·N + 1.76 dB
Data rate
channels × fs × N bit/s
Multiplexed ADC
fs = 1/(n·(tc + tset))
UART
Tb = 1/baud; 8N1 = 10 bits per byte; bytes/s = baud/bits per frame
Baud rate divider
baud = fclk/(16·D)
Method
Write down what is given: sampling rate, signal frequencies, number of bits, input range, baud rate.
For sampling questions, compare each frequency with fs/2; a higher frequency appears at fa = |f − k·fs| with the nearest multiple of fs.
For resolution questions, find 1 LSB = VFSR/2ᴺ, or the smallest N with 2ᴺ ≥ span/resolution.
For data rates and UART links, count everything that is sent: channels, samples per second, bits or whole bytes per sample, and the start, parity and stop bits of every frame.
Op-amp circuits
Inverting amplifier
Vout = −(Rf/Rin)·Vin
Non-inverting amplifier
Vout = (1 + Rf/R1)·Vin
Summing amplifier
Vout = −Rf(V1/R1 + V2/R2)
Ideal op-amp
V+ = V−, Iin = 0
Series & parallel resistors
Resistors in series
Req = R1 + R2 + …
Resistors in parallel
1/Req = 1/R1 + 1/R2 + …
Two in parallel
Req = R1R2 / (R1 + R2)
Ohm's law
V = I·R
Power
P = V·I = I²R = V²/R
Method
Start at the end of the network furthest from the terminals.
Combine resistors in series by adding them, and resistors in parallel with 1/R = 1/R₁ + 1/R₂ + …
Redraw the circuit after each step.
Repeat until one resistor is left between the terminals.
Thévenin & Norton
Thévenin voltage
Vth = Vopen circuit
Thévenin resistance
Rth: all sources off, seen from a–b
Norton current
IN = Vth/Rth
Load current
IL = Vth/(Rth + RL)
Maximum power transfer
RL = Rth, Pmax = Vth²/(4Rth)
Method
Remove the load and mark the two terminals a and b.
Find the open-circuit voltage between a and b: this is Vth.
Switch off all independent sources and find the resistance seen from a–b: this is Rth.
Put the load back on the equivalent circuit: Vth in series with Rth.
For the Norton equivalent, convert: IN = Vth/Rth, with RN = Rth in parallel.
2Practice problems
1.Wheatstone bridge & strain gaugesMedium
Find the Thévenin resistance Rth of the bridge shown, seen from the output terminals a and b.
Vs = 15 VR1 = 20 ΩR2 = 800 ΩR3 = 600 ΩR4 = 20 Ω
Rth = Ω
2.Wheatstone bridge & strain gaugesHard
A 350 Ω strain gauge with gauge factor 2.1 is bonded to a steel bar. Under load its resistance rises by 0.588 Ω. Find the strain ε in microstrain (µε).
R = 350 ΩGF = 2.1ΔR = 0.588 Ω
ε = µε
3.Data acquisition & samplingMedium
An ADC with an input range of 0 to 10 V must resolve steps of 10 mV or smaller. Find the smallest number of bits N.
VFSR = 10 Vresolution = 10 mV
N =
4.Data acquisition & samplingHard
A 24-bit ADC streams every sample over a UART at 115200 baud, format 8N1 (start bit, 8 data bits, 1 stop bit). Each sample is sent as 3 whole byte(s) and the link is busy all the time. Find the highest signal frequency fmax that can be sampled without aliasing, in Hz.
baud = 115200 BdN = 248N1
fmax = Hz
5.Op-amp circuitsMedium
The op-amp is ideal and runs from ±15 V supplies. Find the output voltage Vout.
Wheatstone bridge: two voltage dividers share one supply Vs. The left divider R1–R2 gives Va = Vs·R2/(R1 + R2) and the right divider R3–R4 gives Vb = Vs·R4/(R3 + R4); the output is Vab = Va − Vb. The bridge is balanced (Vab = 0, no current in the meter) when R1/R2 = R3/R4, that is R1·R4 = R2·R3. Seen from the output, the bridge is a Thévenin source with Rth = R1∥R2 + R3∥R4.
Supply shorted
R₁∥R₂ = 20·800/820 = 19.51 Ω
R₃∥R₄ = 600·20/620 = 19.35 Ω
Thévenin resistance
Rth = 38.87 Ω
Answer
Rth = 38.87 Ω
2.Wheatstone bridge & strain gauges
Answer: ε = 800 µε
Strain gauges: a gauge changes its resistance with strain: ΔR/R = GF·ε, where the gauge factor GF is about 2 for metal foil. In a bridge with all arms equal to R, one active gauge (quarter bridge) gives Vo ≈ Vs·GF·ε/4. Two active gauges with opposite strains in adjacent arms (half bridge) give Vs·GF·ε/2, and four (full bridge) give Vs·GF·ε. Stress follows from Hooke’s law, σ = E·ε. Load cells state their sensitivity in mV/V: the output at full load per volt of excitation.
Relative resistance change
ΔR/R = 0.588/350 = 0.00168
Strain
ε = 0.00168/2.1 = 0.0008 = 800 µε
Answer
ε = 800 µε
3.Data acquisition & sampling
Answer: N = 10
ADC resolution: an N-bit converter divides its full-scale range VFSR into 2ᴺ codes, from 0 to 2ᴺ − 1. One step is 1 LSB = VFSR/2ᴺ: the smallest change the converter can show. A truncating ADC gives the code ⌊Vin/LSB⌋; a rounding ADC is never more than ½ LSB away from the true value, its quantisation error. Every extra bit halves the LSB and adds about 6 dB to the ideal signal-to-quantisation-noise ratio SQNR = 6.02·N + 1.76 dB for a full-scale sine. To reach a resolution r over a span, choose the smallest N with 2ᴺ ≥ span/r.
Steps needed
10000 mV/10 mV = 1000
Bits
log₂(1000) = 9.966
29 = 512 < 1000 ≤ 210 = 1024
N = 10
Answer
N = 10
4.Data acquisition & sampling
Answer: fmax = 1920 Hz
UART: an asynchronous serial link sends each byte as a frame: one start bit (low), the data bits, an optional parity bit and one or two stop bits (high). The baud rate is the number of bits per second, so one bit lasts Tb = 1/baud and a frame of n bits lasts n/baud. The common 8N1 format has 10 bits per byte. The baud generator divides the clock: baud = fclk/(16·D) with a whole number D, so the real baud rate differs slightly from the target; an error below about 2 % is usually acceptable.
Bits per sample on the line
3·10 = 30 bit
Highest sampling rate
fs,max = 115200/30 = 3840 Hz
Nyquist limit
fmax = 3840/2 = 1920 Hz
Answer
fmax = 1920 Hz
5.Op-amp circuits
Answer: Vout = 2.97 V
Ideal op-amp rules: with negative feedback, the op-amp drives its output so that its two inputs sit at the same voltage (V₋ = V₊), and no current flows into either input. Writing KCL at the inverting input with these two facts gives the output.
Ideal op-amp rules: with negative feedback, the op-amp drives its output so that its two inputs sit at the same voltage (V₋ = V₊), and no current flows into either input. Writing KCL at the inverting input with these two facts gives the output.
Input currents
V₋ = 0, so each input resistor has its full input voltage across it.
I1 = V1/R1 = 1.7/22 = 0.07727 mA
I2 = V2/R2 = 1.6/10 = 0.16 mA
If = I1 + I2 = 0.2373 mA
Output voltage
Vout = −Rf·If = −10·0.2373 = −2.373 V
Answer
Vout = −2.373 V
7.Series & parallel resistors
Answer: IR1 = 2.143 A
Series and parallel resistors: in series the same current flows through each resistor and R = R₁ + R₂ + …. In parallel each resistor has the same voltage and 1/R = 1/R₁ + 1/R₂ + …. A ladder network is reduced one pair at a time until a single equivalent resistance remains.
Combine resistors from the far end
Start at the end farthest from the source and work back towards it. Resistors carrying the same current are in series; resistors across the same two nodes are in parallel.
R3 + R4 = 4 + 8 = 12 Ω
R2 ∥ 12 = 6·12/(6+12) = 4 Ω
Req = R1 + 4 = 3 + 4 = 7 Ω
Current from the source
The source sees only Req, so Ohm’s law gives the current it delivers. That current flows through R₁.
IR1 = V1/Req = 15/7 = 2.143 A
Answer
IR1 = 2.143 A
8.Series & parallel resistors
Answer: IR1 = 1.296 A
Series and parallel resistors: in series the same current flows through each resistor and R = R₁ + R₂ + …. In parallel each resistor has the same voltage and 1/R = 1/R₁ + 1/R₂ + …. A ladder network is reduced one pair at a time until a single equivalent resistance remains.
Combine resistors from the far end
Start at the end farthest from the source and work back towards it. Resistors carrying the same current are in series; resistors across the same two nodes are in parallel.
R5 + R6 = 5 + 30 = 35 Ω
R4 ∥ 35 = 3.59 Ω
R3 + 3.59 = 33.59 Ω
R2 ∥ 33.59 = 1.888 Ω
Req = R1 + 1.888 = 12 + 1.888 = 13.89 Ω
Current from the source
The source sees only Req, so Ohm’s law gives the current it delivers. That current flows through R₁.
IR1 = V1/Req = 18/13.89 = 1.296 A
Answer
IR1 = 1.296 A
9.Thévenin & Norton
Answer: Vth = 0.8182 V
Thévenin’s theorem: any linear two-terminal network behaves like a single voltage source Vth in series with a resistance Rth. Norton’s theorem gives the same network as a current source IN = Vth/Rth in parallel with Rth.
Find Rth with every source switched off
Replace voltage sources with shorts and current sources with opens, then look into the circuit from a–b.
R1 ∥ R2 = 20·2/(20+2) = 1.818 Ω
Rth = (R1 ∥ R2) + R3 = 1.818 + 20 = 21.82 Ω
Find Vth, the open-circuit voltage
With a–b open, no current flows through R₃, so there is no drop across it and V_b = V_A. R₁ and R₂ form a voltage divider.
Vth = V1·R2/(R1+R2) = 9·2/(20+2) = 0.8182 V
10.Thévenin & Norton
Answer: PL = 8.627 W
Thévenin’s theorem: any linear two-terminal network behaves like a single voltage source Vth in series with a resistance Rth. Norton’s theorem gives the same network as a current source IN = Vth/Rth in parallel with Rth.
Find Rth with every source switched off
Replace voltage sources with shorts and current sources with opens, then look into the circuit from a–b.
R1 ∥ R2 = 3·25/(3+25) = 2.679 Ω
Rth = (R1 ∥ R2) + R3 = 2.679 + 15 = 17.68 Ω
Find Vth, the open-circuit voltage
With a–b open, the only path for Iₛ is through R₃ into node A. Find V_A by superposition of V₁ and Iₛ, then add the drop across R₃.
VA = V1·R2/(R1+R2) + Is·(R1∥R2) = 10.71 + 1·2.679 = 13.39 V
Vth = VB = VA + Is·R3 = 13.39 + 1·15 = 28.39 V
Connect the load to the Thévenin equivalent
The Thévenin source and R_th in series behave exactly like the original circuit at a–b, so the load sees a simple series loop.