The inputs of the logic circuit are A = 1, B = 0 and C = 1. Exactly one of its gates has the output 1. Click that gate.
- 1G1
- 2G2
- 3G3
The inputs of the logic circuit are A = 1, B = 0 and C = 1. Exactly one of its gates has the output 1. Click that gate.
The propagation delay of every gate is written under it. Find the worst-case propagation delay tpd from the inputs to the output F.
In this Karnaugh map exactly one 1 has no neighbouring 1, so it stays a group of one cell (a full minterm of four literals) in the minimal SOP form. Neighbours across the map edges count. Click that cell.
Use the Karnaugh map to find the minimal sum-of-products (SOP) form of F(A, B, C) = Σm(2, 3, 4, 5, 6, 7). How many product terms N does it have?
A positive-edge-triggered JK flip-flop starts with Q = 0 and receives the inputs shown at 6 rising clock edges. How many times N does Q change state?
A positive-edge-triggered JK flip-flop starts with Q = 0 and receives the inputs shown at 7 rising clock edges. How many times N does Q change state?
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