Digital logic: gates, K-maps & flip-flops worksheet with answers

The inputs of the logic circuit are A = 0, B = 1 and C = 1. Exactly one of its gates has the output 1. Click that gate.

1. 1N1
2. 2G1
3. 3G2

The inputs of the logic circuit are A = 0, B = 0 and C = 0. Exactly one of its gates has the output 0. Click that gate.

1. 1G1
2. 2G2
3. 3G3

In this Karnaugh map exactly one 1 has no neighbouring 1, so it stays a group of one cell (a full minterm of four literals) in the minimal SOP form. Neighbours across the map edges count. Click that cell.

1. 1AB = 00, CD = 00
2. 2AB = 00, CD = 01
3. 3AB = 00, CD = 11
4. 4AB = 00, CD = 10
5. 5AB = 01, CD = 00
6. 6AB = 01, CD = 01
7. 7AB = 01, CD = 11
8. 8AB = 01, CD = 10
9. 9AB = 11, CD = 00
10. 10AB = 11, CD = 01
11. 11AB = 11, CD = 11
12. 12AB = 11, CD = 10
13. 13AB = 10, CD = 00
14. 14AB = 10, CD = 01
15. 15AB = 10, CD = 11
16. 16AB = 10, CD = 10

Use the Karnaugh map to find the minimal product-of-sums (POS) form of F(A, B, C, D) = Σm(0, 9, 10, 14, 15). How many sum terms (factors) N does it have?

A positive-edge-triggered JK flip-flop starts with Q = 0 and receives the inputs shown. Click the first clock edge at which Q goes from 1 back to 0.

1. 1clock edge 1
2. 2clock edge 2
3. 3clock edge 3
4. 4clock edge 4
5. 5clock edge 5
6. 6clock edge 6
7. 7clock edge 7

A 4-bit binary up counter starts at 8 (decimal, Q = 1000). Which count Q (in decimal) does it show after 44 clock pulses?