Digital logic: gates, K-maps & flip-flops worksheet with answers

The inputs of the logic circuit are A = 1, B = 1 and C = 0. Exactly one of its gates has the output 1. Click that gate.

1. 1N1
2. 2G1
3. 3G2

The function F = ((B′ + C)′·A′)′ is 0 for exactly one combination of the inputs. Click that row of the truth table.

1. 1ABC = 000
2. 2ABC = 001
3. 3ABC = 010
4. 4ABC = 011
5. 5ABC = 100
6. 6ABC = 101
7. 7ABC = 110
8. 8ABC = 111

Use the Karnaugh map to find the minimal product-of-sums (POS) form of F(A, B, C) = Σm(1, 4, 5, 7). How many sum terms (factors) N does it have?

In this Karnaugh map exactly one 1 has no neighbouring 1, so it stays a group of one cell (a full minterm of four literals) in the minimal SOP form. Neighbours across the map edges count. Click that cell.

1. 1AB = 00, CD = 00
2. 2AB = 00, CD = 01
3. 3AB = 00, CD = 11
4. 4AB = 00, CD = 10
5. 5AB = 01, CD = 00
6. 6AB = 01, CD = 01
7. 7AB = 01, CD = 11
8. 8AB = 01, CD = 10
9. 9AB = 11, CD = 00
10. 10AB = 11, CD = 01
11. 11AB = 11, CD = 11
12. 12AB = 11, CD = 10
13. 13AB = 10, CD = 00
14. 14AB = 10, CD = 01
15. 15AB = 10, CD = 11
16. 16AB = 10, CD = 10

A 4-bit Johnson counter Q₃Q₂Q₁Q₀ starts at 0000. At every clock edge the bits shift one place to the right (Q₃ → Q₂ → Q₁ → Q₀) and Q₃ receives the inverse of Q₀. Give the state Q = Q₃Q₂Q₁Q₀ as a decimal number after 10 clock edges.

A positive-edge-triggered D flip-flop starts with Q = 0 and receives the inputs shown. Click the first clock edge at which Q goes from 1 back to 0.

1. 1clock edge 1
2. 2clock edge 2
3. 3clock edge 3
4. 4clock edge 4
5. 5clock edge 5
6. 6clock edge 6
7. 7clock edge 7