Digital logic: gates, K-maps & flip-flops worksheet with answers

Click the cell of the 4-variable Karnaugh map that belongs to minterm m5 (variables A, B, C, D with A the most significant bit).

1. 1AB = 00, CD = 00
2. 2AB = 00, CD = 01
3. 3AB = 00, CD = 11
4. 4AB = 00, CD = 10
5. 5AB = 01, CD = 00
6. 6AB = 01, CD = 01
7. 7AB = 01, CD = 11
8. 8AB = 01, CD = 10
9. 9AB = 11, CD = 00
10. 10AB = 11, CD = 01
11. 11AB = 11, CD = 11
12. 12AB = 11, CD = 10
13. 13AB = 10, CD = 00
14. 14AB = 10, CD = 01
15. 15AB = 10, CD = 11
16. 16AB = 10, CD = 10

The inputs of the logic circuit are A = 0, B = 0 and C = 0. Exactly one of its gates has the output 0. Click that gate.

1. 1N1
2. 2G1
3. 3G2

A 4-to-1 multiplexer has its select inputs S₁ = A and S₀ = B, and its data inputs tied to I₀ = C′, I₁ = 0, I₂ = 1, I₃ = 1. For how many of the 8 combinations of A, B and C is the output F = 1? Find N.

A 4-to-1 multiplexer has its select inputs S₁ = A and S₀ = B, and its data inputs tied to I₀ = C′, I₁ = 1, I₂ = 0, I₃ = 1. For how many of the 8 combinations of A, B and C is the output F = 1? Find N.

A positive-edge-triggered D flip-flop starts with Q = 0 and receives the inputs shown. Click the first clock edge at which Q goes from 1 back to 0.

1. 1clock edge 1
2. 2clock edge 2
3. 3clock edge 3
4. 4clock edge 4
5. 5clock edge 5
6. 6clock edge 6
7. 7clock edge 7
8. 8clock edge 8

A positive-edge-triggered JK flip-flop starts with Q = 0 and receives the inputs shown at 6 rising clock edges. How many times N does Q change state?