The propagation delay of every gate is written under it. Find the worst-case propagation delay tpd from the inputs to the output F.
Digital logic: gates, K-maps & flip-flops worksheet with answers
For the logic circuit shown, how many of the 8 combinations of the inputs A, B and C give the output F = 1? Find N.
Use the Karnaugh map to find the minimal sum-of-products (SOP) form of F(A, B, C, D) = Σm(0, 1, 3, 4, 5, 9, 12, 14, 15). How many product terms N does it have?
In this Karnaugh map exactly one 1 has no neighbouring 1, so it stays a group of one cell (a full minterm of four literals) in the minimal SOP form. Neighbours across the map edges count. Click that cell.
- 1AB = 00, CD = 00
- 2AB = 00, CD = 01
- 3AB = 00, CD = 11
- 4AB = 00, CD = 10
- 5AB = 01, CD = 00
- 6AB = 01, CD = 01
- 7AB = 01, CD = 11
- 8AB = 01, CD = 10
- 9AB = 11, CD = 00
- 10AB = 11, CD = 01
- 11AB = 11, CD = 11
- 12AB = 11, CD = 10
- 13AB = 10, CD = 00
- 14AB = 10, CD = 01
- 15AB = 10, CD = 11
- 16AB = 10, CD = 10
A 4-bit ring counter Q₃Q₂Q₁Q₀ starts at 1001. At every clock edge the bits shift one place to the right (Q₃ → Q₂ → Q₁ → Q₀) and Q₃ receives Q₀. Give the state Q = Q₃Q₂Q₁Q₀ as a decimal number after 7 clock edges.
A positive-edge-triggered T flip-flop starts with Q = 0 and receives the inputs shown at 8 rising clock edges. How many times N does Q change state?
Answer key
- 1. tpd = 18 ns
- 2. N = 4
- 3. N = 5
- 4. AB = 01, CD = 10
- 5. Q = 3
- 6. N = 5
Full step-by-step solutions: practise this topic on examproblems.com.