Digital Electronics: cram pack

Formula sheets, the key method steps for every topic and 6 practice problems, with full solutions at the back.

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1Formulas and methods

Number systems

Place values
binary 2k, octal 8k, hex 16k
To decimal
Σ dk·bk
From decimal
divide by the base, read the remainders bottom-up
Hex ↔ binary
one hex digit = 4 bits
Two’s complement
invert the bits and add 1

Digital logic: gates, K-maps & flip-flops

Basic gates
A·B, A + B, A′, (A·B)′, (A + B)′, A ⊕ B
Boolean rules
X + X′ = 1, X·X′ = 0, X + XY = X, XY + XY′ = X
De Morgan
(X·Y)′ = X′ + Y′, (X + Y)′ = X′·Y′
Karnaugh map order
00, 01, 11, 10 (Gray code)
Group of 2ᵏ cells
loses k variables
4-to-1 multiplexer
F = A′B′I0 + A′BI1 + AB′I2 + ABI3
Flip-flops
D: Q⁺ = D, T: Q⁺ = T ⊕ Q, JK: Q⁺ = JQ′ + K′Q
Counters
n-bit: 2ⁿ states; mod-N: smallest n with 2ⁿ ≥ N; fout = fclk/N
Ripple counter
fmax = 1/(n·tpd)
Ring and Johnson counters
n and 2n states

Method

  1. For a circuit, work from the inputs to the output one gate at a time and write the value on every wire, or write its expression and fill in the truth table.
  2. For simplification, put the 1s (and the don’t-cares as X) into a Karnaugh map with Gray-code rows and columns: 00, 01, 11, 10.
  3. Cover the 1s with as few and as large groups of 1, 2, 4, 8 or 16 cells as possible, wrapping round the edges; each group is one product term made of the variables that stay constant. Group the 0s for the POS form.
  4. For flip-flops and counters, read the inputs at each active clock edge, write the state after every edge, and remember that an n-bit counter wraps round after 2ⁿ states.

Data acquisition & sampling

Nyquist criterion
fs > 2·fmax, fN = fs/2
Alias frequency
fa = |f − k·fs|, k = round(f/fs)
Step size
1 LSB = VFSR/2ᴺ
Quantisation error (rounding)
±½ LSB
Truncating ADC code
D = ⌊Vin/LSB⌋
Bits for a resolution r
2ᴺ ≥ span/r
Ideal SQNR, full-scale sine
SQNR = 6.02·N + 1.76 dB
Data rate
channels × fs × N bit/s
Multiplexed ADC
fs = 1/(n·(tc + tset))
UART
Tb = 1/baud; 8N1 = 10 bits per byte; bytes/s = baud/bits per frame
Baud rate divider
baud = fclk/(16·D)

Method

  1. Write down what is given: sampling rate, signal frequencies, number of bits, input range, baud rate.
  2. For sampling questions, compare each frequency with fs/2; a higher frequency appears at fa = |f − k·fs| with the nearest multiple of fs.
  3. For resolution questions, find 1 LSB = VFSR/2ᴺ, or the smallest N with 2ᴺ ≥ span/resolution.
  4. For data rates and UART links, count everything that is sent: channels, samples per second, bits or whole bytes per sample, and the start, parity and stop bits of every frame.

2Practice problems

1.Number systemsMedium
8-bit two's complement0−12806403201608040201

Set the bits so they store −7 in 8-bit two's complement. Read as an unsigned number, what is the pattern's value U?

N = −78 bit
U =
2.Number systemsHard
32 bit1 px800 px600 pxM = ? KiB

An uncompressed image is 800 × 600 pixels with 32 bits per pixel. How much memory M does it take, in KiB (1 KiB = 1024 bytes)?

800 × 600 px32 bit/px1 KiB = 1024 B
M = KiB
3.Digital logic: gates, K-maps & flip-flopsMedium
ABC000111100101324576

Simplify F = A′B + AB′C′ + B′C′ to its minimal sum-of-products form. How many literals L does the simplified expression contain?

F = A′B + AB′C′ + B′C′
L =
4.Digital logic: gates, K-maps & flip-flopsHard
CLKJK123456

A positive-edge-triggered JK flip-flop starts with Q = 0 and receives the inputs shown at 6 rising clock edges. How many times N does Q change state?

Q₀ = 0JK
N =
5.Data acquisition & samplingMedium
Vin​N = 10VFSR​2ᴺ − 101 LSB

Find the ideal signal-to-quantisation-noise ratio SQNR of a 10-bit ADC for a full-scale sine wave.

N = 10
SQNR = dB
6.Data acquisition & samplingHard
Vin​N = ?VFSR​2ᴺ − 101 LSB

An audio measurement needs an ideal signal-to-quantisation-noise ratio of at least 40 dB for a full-scale sine wave. Find the smallest number of ADC bits N.

SQNR ≥ 40 dB
N =

3Solutions

1.Number systems

Answer: U = 249

Setting bits: each bit is worth a power of two (128, 64, …, 1). One hex digit is exactly four bits, and in 8-bit two's complement the leftmost bit is worth −128. Bitwise operations work on each bit position separately.

Invert and add one

7 = 0000 0111
inverted: 1111 1000
+1 → 1111 1001

Read it as unsigned

1111 1001₂ = 256 − 7 = 249

Answer

U = 249
2.Number systems

Answer: M = 1875 KiB

Positional number systems: each digit is worth its value times a power of the base. In binary the places are worth 1, 2, 4, 8, 16, …; in hexadecimal 1, 16, 256, …, with A–F standing for 10–15. In 8-bit two's complement the leftmost bit is worth −128 instead of +128, which is how negative numbers are stored.

Bits and bytes

800·600·32 = 15360000 bit = 1920000 B

Convert to KiB

1920000/1024 = 1875 KiB

Answer

M = 1875 KiB
3.Digital logic: gates, K-maps & flip-flops

Answer: L = 4

Boolean algebra: the rules that simplify expressions are X + X′ = 1 and X·X′ = 0, X + X = X, absorption X + X·Y = X, the combining rule X·Y + X·Y′ = X, X + X′Y = X + Y and the consensus theorem XY + X′Z + YZ = XY + X′Z. De Morgan's laws turn (X·Y)′ into X′ + Y′ and (X + Y)′ into X′·Y′. A Karnaugh map applies these rules graphically: every group of two neighbouring cells is one use of XY + XY′ = X.

Minterms of the expression

A′B → m(2, 3)
AB′C′ → m(4)
B′C′ → m(0, 4)
ABC00011110011001131214050706

Group and read off

F = B′C′ + A′B

Count the literals

L = 4

Answer

L = 4
4.Digital logic: gates, K-maps & flip-flops

Answer: N = 3

Flip-flops and counters: a flip-flop changes only at the active clock edge. D copies its input (Q⁺ = D); T toggles when T = 1; JK holds for 00, resets for 01, sets for 10 and toggles for 11. An n-bit binary counter has 2ⁿ states and counts modulo 2ⁿ; a mod-N counter goes 0, 1, …, N − 1 and back to 0, and needs the smallest n with 2ⁿ ≥ N flip-flops. Each stage of a ripple counter halves the frequency, so the last output of a mod-N counter runs at fclk/N. A Johnson counter of n flip-flops has 2n states, a ring counter n.

Q after every edge

A JK flip-flop: 00 holds, 01 resets (Q = 0), 10 sets (Q = 1), 11 toggles.

1: J = 1, K = 0 → Q = 1
2: J = 1, K = 0 → Q = 1
3: J = 1, K = 0 → Q = 1
4: J = 1, K = 1 → Q = 0
5: J = 0, K = 1 → Q = 0
6: J = 1, K = 0 → Q = 1

Count the changes

0 → 1 → 1 → 1 → 0 → 0 → 1
N = 3

Answer

N = 3
5.Data acquisition & sampling

Answer: SQNR = 61.96 dB

ADC resolution: an N-bit converter divides its full-scale range VFSR into 2ᴺ codes, from 0 to 2ᴺ − 1. One step is 1 LSB = VFSR/2ᴺ: the smallest change the converter can show. A truncating ADC gives the code ⌊Vin/LSB⌋; a rounding ADC is never more than ½ LSB away from the true value, its quantisation error. Every extra bit halves the LSB and adds about 6 dB to the ideal signal-to-quantisation-noise ratio SQNR = 6.02·N + 1.76 dB for a full-scale sine. To reach a resolution r over a span, choose the smallest N with 2ᴺ ≥ span/r.

Ideal SQNR

SQNR = 6.02·10 + 1.76 = 61.96 dB

Answer

SQNR = 61.96 dB
6.Data acquisition & sampling

Answer: N = 7

ADC resolution: an N-bit converter divides its full-scale range VFSR into 2ᴺ codes, from 0 to 2ᴺ − 1. One step is 1 LSB = VFSR/2ᴺ: the smallest change the converter can show. A truncating ADC gives the code ⌊Vin/LSB⌋; a rounding ADC is never more than ½ LSB away from the true value, its quantisation error. Every extra bit halves the LSB and adds about 6 dB to the ideal signal-to-quantisation-noise ratio SQNR = 6.02·N + 1.76 dB for a full-scale sine. To reach a resolution r over a span, choose the smallest N with 2ᴺ ≥ span/r.

Solve for N

N ≥ (40 − 1.76)/6.02 = 6.352

Round up

N = 7
check: 6.02·7 + 1.76 = 43.9 dB ≥ 40 dB

Answer

N = 7

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