Digital Electronics: cram pack

Formula sheets, the key method steps for every topic and 6 practice problems, with full solutions at the back.

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1Formulas and methods

Number systems

Place values: binary 2^k, octal 8^k, hex 16^k
To decimal: Σ d_k·b^k
From decimal: divide by the base, read the remainders bottom-up
Hex ↔ binary: one hex digit = 4 bits
Two’s complement: invert the bits and add 1

Digital logic: gates, K-maps & flip-flops

Basic gates: A·B, A + B, A′, (A·B)′, (A + B)′, A ⊕ B
Boolean rules: X + X′ = 1, X·X′ = 0, X + XY = X, XY + XY′ = X
De Morgan: (X·Y)′ = X′ + Y′, (X + Y)′ = X′·Y′
Karnaugh map order: 00, 01, 11, 10 (Gray code)
Group of 2ᵏ cells: loses k variables
4-to-1 multiplexer: F = A′B′I₀ + A′BI₁ + AB′I₂ + ABI₃
Flip-flops: D: Q⁺ = D, T: Q⁺ = T ⊕ Q, JK: Q⁺ = JQ′ + K′Q
Counters: n-bit: 2ⁿ states; mod-N: smallest n with 2ⁿ ≥ N; f_out = f_clk/N
Ripple counter: f_max = 1/(n·t_pd)
Ring and Johnson counters: n and 2n states

Method

For a circuit, work from the inputs to the output one gate at a time and write the value on every wire, or write its expression and fill in the truth table.
For simplification, put the 1s (and the don’t-cares as X) into a Karnaugh map with Gray-code rows and columns: 00, 01, 11, 10.
Cover the 1s with as few and as large groups of 1, 2, 4, 8 or 16 cells as possible, wrapping round the edges; each group is one product term made of the variables that stay constant. Group the 0s for the POS form.
For flip-flops and counters, read the inputs at each active clock edge, write the state after every edge, and remember that an n-bit counter wraps round after 2ⁿ states.

Data acquisition & sampling

Nyquist criterion: f_s > 2·f_max, f_N = f_s/2
Alias frequency: f_a = |f − k·f_s|, k = round(f/f_s)
Step size: 1 LSB = V_FSR/2ᴺ
Quantisation error (rounding): ±½ LSB
Truncating ADC code: D = ⌊V_in/LSB⌋
Bits for a resolution r: 2ᴺ ≥ span/r
Ideal SQNR, full-scale sine: SQNR = 6.02·N + 1.76 dB
Data rate: channels × f_s × N bit/s
Multiplexed ADC: f_s = 1/(n·(t_c + t_set))
UART: T_b = 1/baud; 8N1 = 10 bits per byte; bytes/s = baud/bits per frame
Baud rate divider: baud = f_clk/(16·D)

Method

Write down what is given: sampling rate, signal frequencies, number of bits, input range, baud rate.
For sampling questions, compare each frequency with f_s/2; a higher frequency appears at f_a = |f − k·f_s| with the nearest multiple of f_s.
For resolution questions, find 1 LSB = V_FSR/2ᴺ, or the smallest N with 2ᴺ ≥ span/resolution.
For data rates and UART links, count everything that is sent: channels, samples per second, bits or whole bytes per sample, and the start, parity and stop bits of every frame.

2Practice problems

1.Number systemsMedium

The 8-bit pattern 1010 1100 stores a signed integer in two's complement. What is its value N in decimal?

1010 11008 bit

N =

2.Number systemsHard

Set the bits to the 8-bit result of 1111 0111 OR 1110 0000. What is the result's value R in decimal?

1111 0111OR1110 0000

R =

3.Digital logic: gates, K-maps & flip-flopsMedium

Use the Karnaugh map to find the minimal product-of-sums (POS) form of F(A, B, C, D) = Σm(0, 3, 5, 7, 8, 12, 13). How many sum terms (factors) N does it have?

F(A, B, C, D) = Σm(0, 3, 5, 7, 8, 12, 13)

N =

4.Digital logic: gates, K-maps & flip-flopsHard

A positive-edge-triggered JK flip-flop starts with Q = 0 and receives the inputs shown at 7 rising clock edges. How many times N does Q change state?

Q₀ = 0JK

N =

5.Data acquisition & samplingMedium

A 62.5 kHz sine wave is sampled at 50 kHz without an anti-aliasing filter. At which frequency f_a does it appear in the samples? Give it in kHz.

f = 62.5 kHzf_s = 50 kHz

f_a = kHz

6.Data acquisition & samplingHard

A microcontroller with a 4 MHz clock sets its UART baud rate as f_clk/(16·D), with D a whole number rounded to the nearest value. The target is 9600 baud. Find the percentage error of the real baud rate (positive when it is too fast).

f_clk = 4 MHztarget = 9600 Bd

e = %

3Solutions

1.Number systems

Answer: N = −84

Positional number systems: each digit is worth its value times a power of the base. In binary the places are worth 1, 2, 4, 8, 16, …; in hexadecimal 1, 16, 256, …, with A–F standing for 10–15. In 8-bit two's complement the leftmost bit is worth −128 instead of +128, which is how negative numbers are stored.

Add the place values

The other bits keep their normal positive values.

−128 + 32 + 8 + 4 = −84

Answer

N = −84

2.Number systems

Answer: R = 247

Setting bits: each bit is worth a power of two (128, 64, …, 1). One hex digit is exactly four bits, and in 8-bit two's complement the leftmost bit is worth −128. Bitwise operations work on each bit position separately.

Bit by bit

OR gives 1 where at least one bit is 1.

1111 0111

OR 1110 0000

= 1111 0111

Value of the result

1111 0111₂ = 247

Answer

R = 247

3.Digital logic: gates, K-maps & flip-flops

Answer: N = 4

Karnaugh maps: the cells are ordered in Gray code (00, 01, 11, 10), so neighbouring cells, including the ones across the edges, differ in exactly one variable. Group the 1s in rectangles of 1, 2, 4, 8 or 16 cells, as large as possible and as few as possible, until every 1 is covered. Each group is one product term: the variables that stay constant inside it. A group of 2ᵏ cells loses k variables. Don't-cares (X) may be used to make groups bigger but never have to be covered. Grouping the 0s instead gives the minimal POS form.

Group the 0s

Every group is a rectangle of 2ᵏ cells; edge cells are neighbours of the cells on the opposite edge.

(C′ + D)

(B + C + D′)

(A′ + C′)

(A + B′ + D)

Minimal POS form

F = (C′ + D)(B + C + D′)(A′ + C′)(A + B′ + D)

N = 4

Answer

N = 4

4.Digital logic: gates, K-maps & flip-flops

Answer: N = 3

Flip-flops and counters: a flip-flop changes only at the active clock edge. D copies its input (Q⁺ = D); T toggles when T = 1; JK holds for 00, resets for 01, sets for 10 and toggles for 11. An n-bit binary counter has 2ⁿ states and counts modulo 2ⁿ; a mod-N counter goes 0, 1, …, N − 1 and back to 0, and needs the smallest n with 2ⁿ ≥ N flip-flops. Each stage of a ripple counter halves the frequency, so the last output of a mod-N counter runs at f_clk/N. A Johnson counter of n flip-flops has 2n states, a ring counter n.

Q after every edge

A JK flip-flop: 00 holds, 01 resets (Q = 0), 10 sets (Q = 1), 11 toggles.

1: J = 0, K = 1 → Q = 0

2: J = 0, K = 1 → Q = 0

3: J = 0, K = 0 → Q = 0

4: J = 1, K = 0 → Q = 1

5: J = 1, K = 0 → Q = 1

6: J = 1, K = 1 → Q = 0

7: J = 1, K = 0 → Q = 1

Count the changes

0 → 0 → 0 → 0 → 1 → 1 → 0 → 1

N = 3

Answer

N = 3

5.Data acquisition & sampling

Answer: f_a = 12.5 kHz

Sampling: an ADC measures the signal f_s times per second. By the Nyquist–Shannon theorem a frequency f is captured correctly only while f < f_s/2, the Nyquist (folding) frequency, so the sampling rate must exceed twice the highest signal frequency. A higher frequency is not lost: it shows up as an alias at f_a = |f − k·f_s|, with the whole number k that brings the result between 0 and f_s/2. The samples cannot tell the two apart, so an analogue anti-aliasing filter must remove everything above f_s/2 before the ADC.

Nyquist frequency

f_s/2 = 25 kHz < f = 62.5 kHz

Nearest multiple of the sampling rate

k = round(62.5/50) = 1

Alias frequency

f_a = |62.5 − 1·50| = 12.5 kHz

Answer

f_a = 12.5 kHz

The dashed curve in the figure is the alias: it passes through exactly the same samples.

6.Data acquisition & sampling

Answer: e = 0.1603 %

UART: an asynchronous serial link sends each byte as a frame: one start bit (low), the data bits, an optional parity bit and one or two stop bits (high). The baud rate is the number of bits per second, so one bit lasts T_b = 1/baud and a frame of n bits lasts n/baud. The common 8N1 format has 10 bits per byte. The baud generator divides the clock: baud = f_clk/(16·D) with a whole number D, so the real baud rate differs slightly from the target; an error below about 2 % is usually acceptable.

Divider

D = 4·10⁶/(16·9600) = 26.04 → 26

Real baud rate

4·10⁶/(16·26) = 9615 Bd

Error

(9615 − 9600)/9600·100 = 0.1603 %

Answer

e = 0.1603 %

An error below about 2 % is usually acceptable.

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